Tcwg-commits June 2019

tcwg-commits@lists.linaro.org

6 participants
15913 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (395b675a9 -> 34dc0e1ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 395b675a9 0: update: llvm-linux: boot new 34dc0e1ee 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (395b675a9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 70 +- 02-build_llvm/console.log | 11948 +++++++++++++++---------------- 03-build_linux/console.log | 1806 ++--- 04-boot_linux/console.log | 464 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 25 - console.log | 14319 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 14304 insertions(+), 14342 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[llvm] branch master updated (ae7898988aa -> 08a4b34e50b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from ae7898988aa [NFC][Codegen] Revisit test coverage for X % C == 0 fold on [...] new 9e1d7394457 hwasan: Remove the old frame descriptor mechanism. new 08a4b34e50b [X86] CombineShuffleWithExtract - recurse through EXTRACT_S [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 18 ++--- .../Instrumentation/HWAddressSanitizer.cpp | 81 ---------------------- test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll | 14 ++-- test/CodeGen/X86/shuffle-vs-trunc-512.ll | 14 ++-- test/Instrumentation/HWAddressSanitizer/basic.ll | 2 - .../HWAddressSanitizer/frame-descriptor.ll | 27 -------- .../HWAddressSanitizer/with-calls.ll | 1 - 7 files changed, 17 insertions(+), 140 deletions(-) delete mode 100644 test/Instrumentation/HWAddressSanitizer/frame-descriptor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[lldb] branch master updated (66dd26deb -> 0bb6a4484)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from 66dd26deb Fixing a couple of wrong logical operator bugs. new 0bb6a4484 Make sure the thread list is updated before you set the stop [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../gdb_remote_client/TestRecognizeBreakpoint.py | 139 +++++++++++++++++++++ .../gdb_remote_client/gdbclientutils.py | 5 + .../{operating_system.py => operating_system_2.py} | 33 +++-- .../Process/gdb-remote/ProcessGDBRemote.cpp | 17 +-- source/Target/Process.cpp | 10 +- 5 files changed, 188 insertions(+), 16 deletions(-) create mode 100644 packages/Python/lldbsuite/test/functionalities/gdb_remote_clien [...] copy packages/Python/lldbsuite/test/functionalities/gdb_remote_client/{operating_s [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig updated (f135a8d4eca -> db3161f8a48)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig in repository toolchain/ci/gcc. from f135a8d4eca 2019-06-27 Aaron Sawdey <acsawdey(a)linux.ibm.com> adds cbbdeb30f53 2019-06-27 Steven G. Kargl <kargl(a)gcc.gnu.org> adds d094ea44490 [Darwin, PPC] Do not use longcall for 64b code. adds 3c3d8e04ffe [Darwin, PPC] Correct whitespace in specs. adds ba037a7a594 [Darwin, PPC] Allow the user to override the use of hard fl [...] adds d43b7a0fca6 PR tree-optimization/91010 * tree-vect-stmts.c (scan_oper [...] adds df47a8c7f4b PR c++/91024 * gimplify.c (collect_fallthrough_labels): I [...] adds d1ca0650375 PR c++/55442 - memory-hog with highly recursive constexpr. adds 05f69af8f19 Add --disable-tm-clone-registry libgcc configure option. adds 318df1b8d27 Daily bump. adds 3934ae0eaee [Arm] Remove constraint strings from define_expand construc [...] adds 19ef494ebf0 x86: fix CVT{,T}PD2PI insns adds 5ab2ad068c2 add file missing from earlier commit adds b0be674a1b0 [ARC][COMMITTED] Fix slsr-13 regressions. adds c6b5a505d1d x86: fix vgf2p8affine*qb insns adds db3161f8a48 x86: improve GFNI insns No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 65 +++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c.opt | 4 + gcc/config/arc/arc.c | 2 +- gcc/config/arm/arm-fixed.md | 54 +- gcc/config/arm/arm.md | 627 +++++++++++---------- gcc/config/arm/iwmmxt.md | 16 +- gcc/config/arm/neon.md | 454 +++++++-------- gcc/config/arm/sync.md | 10 +- gcc/config/arm/thumb1.md | 24 +- gcc/config/arm/vec-common.md | 54 +- gcc/config/i386/sse.md | 47 +- gcc/config/rs6000/darwin.h | 2 +- gcc/config/rs6000/rs6000.c | 14 +- gcc/cp/ChangeLog | 6 + gcc/cp/constexpr.c | 29 +- gcc/doc/install.texi | 5 + gcc/doc/invoke.texi | 16 +- gcc/fortran/ChangeLog | 8 +- gcc/fortran/match.c | 28 +- gcc/gimplify.c | 2 + gcc/testsuite/ChangeLog | 24 +- gcc/testsuite/g++.dg/vect/simd-10.cc | 8 + .../g++.dg/warn/Wimplicit-fallthrough-4.C | 22 + gcc/testsuite/gcc.target/i386/cvtpd2pi.c | 36 ++ gcc/testsuite/gcc.target/i386/gfni-5.c | 19 + gcc/testsuite/gfortran.dg/common_1.f | 14 + gcc/testsuite/gfortran.dg/common_26.f90 | 14 + gcc/tree-vect-stmts.c | 5 +- libgcc/ChangeLog | 7 + libgcc/Makefile.in | 4 +- libgcc/configure | 15 + libgcc/configure.ac | 10 + 34 files changed, 985 insertions(+), 667 deletions(-) create mode 100644 gcc/testsuite/g++.dg/vect/simd-10.cc create mode 100644 gcc/testsuite/g++.dg/warn/Wimplicit-fallthrough-4.C create mode 100644 gcc/testsuite/gcc.target/i386/cvtpd2pi.c create mode 100644 gcc/testsuite/gcc.target/i386/gfni-5.c create mode 100644 gcc/testsuite/gfortran.dg/common_1.f create mode 100644 gcc/testsuite/gfortran.dg/common_26.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig updated (1b7f24cd6b -> 10d06d8219)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from 1b7f24cd6b Change arm_objfile_data_key to use type-safe registry adds e395f487b3 i386: Check vector length for scatter/gather prefetch instructions adds 0c823d25a6 Automatic date update in version.in adds 60d53d7f03 PowerPC notoc call stub tests adds c432bbbaaa [GOLD] R_PPC64_REL16_HIGH relocs adds f073a3e8c6 [GOLD] PowerPC linkage table error adds f60c61e60e [GOLD] PowerPC tweak relnum tests adds 999d6dff80 Plugin target handling adds 781152ec18 Prevent an attempt to allocate an excessive amount of memory [...] adds 7e56c51c79 Prevent attempts to allocate excessive amounts of memory whe [...] adds 10d06d8219 Handle either order of name and linkage name No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 19 ++++++ bfd/compress.c | 17 +++++ bfd/config.bfd | 5 -- bfd/configure | 15 ++--- bfd/configure.ac | 15 ++--- bfd/elf.c | 12 ++++ bfd/format.c | 9 ++- bfd/targets.c | 8 +-- bfd/version.h | 2 +- binutils/ChangeLog | 7 ++ binutils/objdump.c | 21 +++++- elfcpp/ChangeLog | 6 ++ elfcpp/powerpc.h | 7 ++ gas/ChangeLog | 9 +++ gdb/ChangeLog | 5 ++ gdb/dwarf2read.c | 10 ++- gdb/testsuite/ChangeLog | 5 ++ gdb/testsuite/gdb.dwarf2/ada-linkage-name.c | 41 ++++++++++++ gdb/testsuite/gdb.dwarf2/ada-linkage-name.exp | 95 +++++++++++++++++++++++++++ gold/ChangeLog | 20 ++++++ gold/powerpc.cc | 57 ++++++++++++++-- ld/ChangeLog | 8 +++ ld/testsuite/ld-powerpc/callstub-1.d | 29 ++++++++ ld/testsuite/ld-powerpc/callstub-1.s | 9 +++ ld/testsuite/ld-powerpc/callstub-2.d | 35 ++++++++++ ld/testsuite/ld-powerpc/callstub-2.s | 8 +++ ld/testsuite/ld-powerpc/powerpc.exp | 2 + opcodes/ChangeLog | 24 +++++++ opcodes/i386-dis-evex-len.h | 84 +++++++++++++++++++++++ opcodes/i386-dis-evex-prefix.h | 8 +-- opcodes/i386-dis-evex-w.h | 16 ++--- opcodes/i386-dis.c | 12 ++++ 32 files changed, 571 insertions(+), 49 deletions(-) create mode 100644 gdb/testsuite/gdb.dwarf2/ada-linkage-name.c create mode 100644 gdb/testsuite/gdb.dwarf2/ada-linkage-name.exp create mode 100644 ld/testsuite/ld-powerpc/callstub-1.d create mode 100644 ld/testsuite/ld-powerpc/callstub-1.s create mode 100644 ld/testsuite/ld-powerpc/callstub-2.d create mode 100644 ld/testsuite/ld-powerpc/callstub-2.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig updated (e334d84b6 -> 16a34c031)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards e334d84b6 0: update: binutils-gcc-linux: all new 16a34c031 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e334d84b6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 40 +- 02-prepare_abe/console.log | 340 +- 03-build_abe-binutils/console.log | 11357 ++++---- 04-build_abe-stage1/console.log | 15470 ++++++----- 05-build_linux/console.log | 24390 ++++++++--------- 06-boot_linux/console.log | 6 +- console.log | 51603 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 51514 insertions(+), 51704 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (249155c20f9b -> 556e2f6020bf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 249155c20f9b Merge branch 'parisc-5.2-4' of git://git.kernel.org/pub/sc [...] adds 2e5db6eb3c23 be2net: fix link failure after ethtool offline test adds aad1dcc4f011 ppp: mppe: Add softdep to arc4 adds a1e5388b4d5f net: stmmac: fixed new system time seconds value calculation adds d0bb82fd6018 net: stmmac: set IC bit when transmitting frames with HW t [...] adds 8ac8a01092b2 sis900: fix TX completion adds c492d4c74dd3 tipc: change to use register_pernet_device adds 45d5cb137c36 net/sched: cbs: Fix error path of cbs_module_init adds 9354544cbccf net/tls: fix page double free on TX cleanup adds 55655e3d1197 net/packet: fix memory leak in packet_set_ring() adds 2bf4ecbcc7d8 net: macb: do not copy the mac address if NULL adds 4f07b80c9733 tipc: check msg->req data len in tipc_nl_compat_bearer_disable adds 904d88d743b0 qmi_wwan: Fix out-of-bounds read adds 38c73529de13 ipv4: Use return value of inet_iif() for __raw_v4_lookup i [...] adds b8e8a86337c2 net/ipv6: Fix misuse of proc_dointvec "skip_notify_on_dev_down" adds 30d8177e8ac7 bonding: Always enable vlan tx offload adds 4480879251fb net/smc: hold conns_lock before calling smc_lgr_register_conn() adds 8c33bf1b0a96 net/smc: Fix error path in smc_init adds 8a53058bd9ba Merge branch 'smc-fixes' adds ee4297420d56 team: Always enable vlan tx offload adds 5b18f1289808 ipv4: reset rt_iif for recirculated mcast/bcast out pkts adds 48dd73d08d4d net: aquantia: fix vlans not working over bridged network adds 22e72b5e049b net: dsa: microchip: Use gpiod_set_value_cansleep() adds 9b1c1ef13b35 ipv6: constify rt6_nexthop() adds 2c6b55f45d53 ipv6: fix neighbour resolution with raw socket adds 13696531dc90 Merge branch 'ipv6-fix-neighbour-resolution-with-raw-socket' adds 25bff6d5478b sctp: change to hold sk after auth shkey is created successfully adds 89ed5b519004 af_packet: Block execution of tasks waiting for transmit t [...] adds c84afab02c31 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net adds 19e5e2ae9c88 csky: Fixup libgcc unwind error adds 139ca2580550 Merge tag 'csky-for-linus-5.2-fixup-gcc-unwind' of git://g [...] adds 3647e42b55dc afs: Fix over zealous "vnode modified" warnings adds a6853b9ce81a afs: Fix vlserver record corruption adds 90fa9b64523a afs: Fix uninitialised spinlock afs_volume::cb_break_lock adds 2cd42d19cffa afs: Fix setting of i_blocks adds cd0f3aaebc5b Merge tag 'afs-fixes-20190620' of git://git.kernel.org/pub [...] adds 53f2ac9d3aa8 arm64: dts: ls1028a: Fix CPU idle fail. adds a019ab406797 arm64: defconfig: Enable FSL_EDMA driver adds c91476761094 Merge tag 'imx-fixes-5.2-2' of git://git.kernel.org/pub/sc [...] adds cf18ea7593ad ARM: dts: Blank D-Link DIR-685 console adds 36558020128b ARM: dts: gemini Fix up DNS-313 compatible string adds ef51ea44a96f Merge tag 'gemini-dts-v5.2' of git://git.kernel.org/pub/sc [...] adds 27e23d897527 ARM: omap2: remove incorrect __init annotation adds 9c8434516bd9 MAINTAINERS: BCM2835: Add internal Broadcom mailing list adds 64f35709d573 MAINTAINERS: BCM53573: Add internal Broadcom mailing list adds 2f7da158cc79 Merge tag 'arm-soc/for-5.3/maintainers' of https://github. [...] adds 01dfdd7b4693 ARM: dts: meson8: fix GPU interrupts and drop an undocumen [...] adds f3b7cbe2200f ARM: dts: meson8b: drop undocumented property from the Mal [...] adds 26d65140e92a ARM: dts: meson8b: fix the operating voltage of the Mali GPU adds 4232db2e2abe Merge tag 'amlogic-fixes' of https://git.kernel.org/pub/sc [...] adds 3cf10132ac8d ARM: dts: imx6ul: fix PWM[1-4] interrupts adds e73f65930f88 Merge tag 'imx-fixes-5.2-3' of git://git.kernel.org/pub/sc [...] adds fe2da896fd94 Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/l [...] adds 21acee4ecf9c HID: intel-ish-hid: Fix a use after free in load_fw_from_host() adds dcf768b0ac86 HID: chicony: add another quirk for PixArt mouse adds 315ffcc9a1e0 HID: uclogic: Add support for Huion HS64 tablet adds 3a9a2c86ce6e HID: logitech-dj: Fix forwarding of very long HID++ reports adds 0a95fc733da3 HID: multitouch: Add pointstick support for ALPS Touchpad adds b12bbdc5dd88 HID: intel-ish-hid: fix wrong driver_data usage adds 763cf1f2d9bf Merge branch 'for-linus' of git://git.kernel.org/pub/scm/l [...] adds 9014143bab2f fork: don't check parent_tidptr with CLONE_PIDFD adds bee19cd8f241 samples: make pidfd-metadata fail gracefully on older kernels adds 6fd2fe494b17 copy_process(): don't use ksys_close() on cleanups adds 30d158b143b6 proc: remove useless d_is_dir() check adds 7a702b4e82d8 Merge tag 'for-linus-20190627' of gitolite.kernel.org:pub/ [...] adds dec7e6494e1a dm init: fix incorrect uses of kstrndup() adds 10c9c8e7c09b dm init: remove trailing newline from calls to DMERR() and [...] adds 211ad4b73303 dm log writes: make sure super sector log updates are writ [...] adds a0651926553c dm table: don't copy from a NULL pointer in realloc_argv() adds 2eba4e640b2c dm verity: use message limit for data block corruption message adds 65ee21eb633c Merge tag 'for-5.2/dm-fixes-2' of git://git.kernel.org/pub [...] adds 41b3588dba6e clk: ti: clkctrl: Fix returning uninitialized data adds e63b063ecd24 clk: meson: fix MPLL 50M binding id typo adds 3ff46efbcd90 clk: meson: meson8b: fix a typo in the VPU parent names ar [...] adds f18d43046ad2 Merge tag 'clk-meson-5.2-1-fixes' of https://github.com/Ba [...] adds 9caec6620f25 clk: tegra210: Fix default rates for HDA clocks adds c8edb316b9bb clk: Do a DT parent lookup even when index < 0 adds 74684cce5ebd clk: socfpga: stratix10: fix divider entry for the emac clocks adds 556e2f6020bf Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pu [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 2 + arch/arm/boot/dts/gemini-dlink-dir-685.dts | 2 +- arch/arm/boot/dts/gemini-dlink-dns-313.dts | 2 +- arch/arm/boot/dts/imx6ul.dtsi | 8 +-- arch/arm/boot/dts/meson8.dtsi | 5 +- arch/arm/boot/dts/meson8b.dtsi | 11 ++-- arch/arm/mach-omap2/prm3xxx.c | 2 +- arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 18 +++---- arch/arm64/configs/defconfig | 1 + arch/csky/kernel/signal.c | 5 ++ drivers/clk/clk.c | 2 +- drivers/clk/meson/g12a.c | 4 +- drivers/clk/meson/g12a.h | 2 +- drivers/clk/meson/meson8b.c | 10 ++-- drivers/clk/socfpga/clk-s10.c | 4 +- drivers/clk/tegra/clk-tegra210.c | 2 + drivers/clk/ti/clkctrl.c | 7 ++- drivers/hid/hid-ids.h | 3 ++ drivers/hid/hid-logitech-dj.c | 4 +- drivers/hid/hid-multitouch.c | 4 ++ drivers/hid/hid-quirks.c | 1 + drivers/hid/hid-uclogic-core.c | 2 + drivers/hid/hid-uclogic-params.c | 2 + drivers/hid/intel-ish-hid/ishtp-fw-loader.c | 2 +- drivers/hid/intel-ish-hid/ishtp-hid-client.c | 4 +- drivers/hid/intel-ish-hid/ishtp/bus.c | 15 +++++- drivers/md/dm-init.c | 10 ++-- drivers/md/dm-log-writes.c | 23 ++++++++- drivers/md/dm-table.c | 2 +- drivers/md/dm-verity-target.c | 4 +- drivers/net/bonding/bond_main.c | 2 +- drivers/net/dsa/microchip/ksz_common.c | 6 +-- .../net/ethernet/aquantia/atlantic/aq_filters.c | 10 +++- drivers/net/ethernet/aquantia/atlantic/aq_nic.c | 1 + drivers/net/ethernet/aquantia/atlantic/aq_nic.h | 1 + .../ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c | 19 ++++--- drivers/net/ethernet/cadence/macb_main.c | 2 +- drivers/net/ethernet/emulex/benet/be_ethtool.c | 28 ++++++++--- drivers/net/ethernet/sis/sis900.c | 16 +++--- .../net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 22 +++++--- drivers/net/ppp/ppp_mppe.c | 1 + drivers/net/team/team.c | 2 +- drivers/net/usb/qmi_wwan.c | 2 +- drivers/net/vrf.c | 2 +- fs/afs/callback.c | 4 +- fs/afs/inode.c | 31 +++++++----- fs/afs/internal.h | 8 ++- fs/afs/volume.c | 1 + fs/proc/base.c | 3 +- include/dt-bindings/clock/g12a-clkc.h | 2 +- include/linux/intel-ish-client-if.h | 1 + include/net/ip6_route.h | 4 +- include/net/route.h | 1 + include/net/tls.h | 15 ------ kernel/fork.c | 58 +++++++--------------- net/bluetooth/6lowpan.c | 4 +- net/ipv4/ip_output.c | 12 +++++ net/ipv4/raw.c | 2 +- net/ipv4/route.c | 33 ++++++++++++ net/ipv6/ip6_output.c | 2 +- net/ipv6/route.c | 5 +- net/netfilter/nf_flow_table_ip.c | 2 +- net/packet/af_packet.c | 23 +++++++-- net/packet/internal.h | 1 + net/sched/sch_cbs.c | 9 +++- net/sctp/endpointola.c | 8 +-- net/smc/af_smc.c | 5 +- net/smc/smc_core.c | 3 ++ net/tipc/core.c | 12 ++--- net/tipc/netlink_compat.c | 18 +++++-- net/tls/tls_main.c | 3 +- samples/pidfd/pidfd-metadata.c | 8 ++- 73 files changed, 356 insertions(+), 201 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (21f32a9683f -> 180a937d9a6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/llvm-project. from 21f32a9683f Merging r355033: adds cf7a59f2d7d Merging r359809: ------------------------------------------ [...] adds 180a937d9a6 Merging r354633: No new revisions were added by this update. Summary of changes: clang/lib/AST/MicrosoftMangle.cpp | 7 +++-- clang/lib/CodeGen/CGDebugInfo.cpp | 36 +++++++++------------- clang/test/CodeGenCXX/char8_t.cpp | 12 +++++--- .../test/CodeGenCXX/debug-info-template-member.cpp | 2 +- .../CodeGenCXX/debug-info-var-template-partial.cpp | 17 ++++++++++ 5 files changed, 44 insertions(+), 30 deletions(-) create mode 100644 clang/test/CodeGenCXX/debug-info-var-template-partial.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (1ad887400 -> 110810e00)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 1ad887400 2: update: llvm-linux: 25 new 110810e00 2: update: llvm-linux: 25 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1ad887400) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 139 +- 02-build_llvm/console.log | 11756 +++++++++++++++++------------------ 03-build_linux/console.log | 688 ++- 05-check_regression/console.log | 14 +- 06-update_baseline/console.log | 86 +- console.log | 12683 +++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 7 files changed, 12691 insertions(+), 12689 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (32ef9292bea -> 633d222d30b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from 32ef9292bea AMDGPU: Make fixing i1 copies robust against re-ordering adds a166b903d0e Fix lld build on Windows with MSVC due to C2461 adds 0a2b7b79fac Revert "[CodeGen] [SelectionDAG] More efficient code for X [...] adds 1fd1c609795 [X86] combineX86ShufflesRecursively - merge shuffles with m [...] adds 6b3f56b65fa [WebAssembly] Fix p2align in assembler. adds 774eabd0978 Revert "[LiveDebugValues] Emit the debug entry values" adds bb55ece2692 [OPENMP][NVPTX]Relax flush directive. adds 2dcd2c2493b [llvm-objdump] Update the doc for --disassemble-functions. adds 954014a0fac Add a missing '__uncvref_t' to the SFINAE constraints for o [...] adds f288cf9dfa1 [OPENMP]Generate correctly implicit flags for mapped data. adds bfd3f694805 [WebAssembly] AsmParser: better atomic inst detection adds c5486b23bc7 Correct the file path. NFC. adds bd34e50cf0a [NFC][CodeGen] Add negative test for X u% C == 0 fold (D63391) adds 1cf9e72cbc0 Update -analyze -scalar-evolution output for multiple exit [...] adds 6ed459fd41c Use "willreturn" in isGuaranteedToTransferExecutionToSuccessor adds c627aa2fa9c [PowerPC][NFC] Remove unused (and unsupported) fusion featu [...] adds f7a19f684bd [GN] Set exit code to 1 if changes are needed adds 564b03729b2 [GN] Update build file adds a95ca2b5ff1 [x86] prevent crashing from select narrowing with AVX512 adds 223df5b5402 [libcxxabi] Use an explicit list to export symbols from the dylib adds 22afca2ce02 [NFC][GVN] Pre-commit unary FNeg tests to fpmath.ll adds 7ecf1ec49a8 [x86] remove whitespace; NFC adds 559c6e17cd8 Make nrvo-string test more robust. adds fa36593f4c0 Convert line endings to LF. adds 8007ff1ab15 [compiler-rt] Rename lit.*.cfg.* -> lit.*.cfg.py.* adds 6e62a796d50 [GVN] Add support for unary FNeg to GVN pass adds 379a9f5e240 [sanitizer_common] Switch from zx_clock_get_new to zx_clock_get adds d9a59aeb049 [libFuzzer] Migrate to the new exception syscalls on Fuchsia adds 3b56e390dd1 Pattern match struct types in test case. adds 24dba1fe972 [WebAssembly] Enable an atomic.notify MC test adds 30cab5d6eef [NFC][GVNSink] Pre-commit unary FNeg test to fpmath.ll adds 4a8dc615346 [JITLink][MachO/x86-64] Add a testcase for X86_64_RELOC_GOT. adds a59cf878223 [NFC][APInt] Add (exhaustive) test for multiplicativeInverse() adds 29d05c005fa [CodeGen] [SelectionDAG] More efficient code for X % C == 0 [...] adds 13fde7a89a5 [analyzer] Fix clang-tidy crash on GCCAsmStmt adds c29abb50f29 Revert "[JITLink][MachO/x86-64] Add a testcase for X86_64_R [...] adds d11ea6518c1 hwasan: Teach the runtime to identify the local variable be [...] adds 5378afc02a3 hwasan: Use llvm.read_register intrinsic to read the PC on [...] adds 559b2e0187a hwasan: Fix an off-by-one error in PrintTagsAroundAddr. adds 4fcf0004fa7 [LangRef] Clarify codegen expectations for intrinsics with [...] adds ddc2804e1a5 Fix ASAN error caused by commit r364512. adds 92e625c2233 [InlineCost] make InlineCost assignable adds ecb7ac35f9d [GlobalISel][IRTranslator] Fix some PHI bugs related to jum [...] adds 9a89d657b1a Fixing a couple of wrong logical operator bugs. adds 5e66db6b8cd GlobalISel: Convert rest of MachineIRBuilder to using Register adds 1178dc3d0bf AMDGPU/GlobalISel: Convert to using Register adds c6fe8436e88 [PowerPC][NFC] Use `|=` to update `Simplified` flag adds 3018d1845b6 GlobalISel: Use Register adds 07fd88d7358 [AMDGPU] Packed thread ids in function call ABI adds 588a1709703 [NFC][PowerPC] Move XS*QP series instruction apart from XS* [...] adds 3b715d67dde [Support] Add fs::getUmask() function and change fs::setPer [...] adds 1c7aec1c936 [Support] Fix add fs::getUmask() patch adds e832adea0ff [X86] Remove some duplicate patterns that already exist as [...] adds 2adab5a1426 Silence gcc warning in testcase [NFC] adds cbb88a51699 [X86] Connect the output chain properly when combining vzex [...] adds 8be372b1901 [ARM] MVE vector shuffles adds be05b85db9f [ARM] Select MVE add and sub adds 9a92be1b355 [HardwareLoops] Loop counter guard intrinsic adds 62889b0ea54 [ARM] Select MVE fp add and sub adds 8ab8a60a1ec [CTU] Add missing statistics adds fc4102417b1 [ARM] Mark div and rem as expand for MVE adds 2bc48f503a1 [AVR] Don't look for the TargetFrameLowering in the FrameLo [...] adds 07e53fee145 [ARM] MVE loads and stores adds e662b6985a8 [DebugInfo] GSYM cleanups after D63104/r364427 adds 29ff1b4f465 [ARM] Fix integer UB in MVE load/store immediate handling. adds eb7080ac6e5 [ARM] Widening loads and narrowing stores adds 493a1202595 [DebugInfo] Simplify GSYM::AddressRange and GSYM::AddressRanges adds 02e743586e9 [DebugInfo] Fix setStartAddress after r364637 adds fd0ad4b24d6 [ELF] Do not produce DT_JMPREL and DT_PLTGOT if .rela.plt i [...] adds ff70cbc8957 [ARM] MVE patterns for VABS and VNEG adds 28839440352 [ARM] Mark math routines as non-legal for MVE adds 9af44742538 [NFC][Codegen] Revisit test coverage for X % C == 0 fold adds 9dbdfe6b785 [ARM] Add MVE mul patterns adds a54e1a0f012 [X86] CombineShuffleWithExtract - only require 1 source to [...] adds 1d572ce3955 [AMDGPU][MC] Enabled constant expressions as operands of sendmsg adds 13d9c723c89 [NFC][NewGVN] Pre-commit unary FNeg test to fpmath.ll adds 405f8fc812c [OPENMP]Fix checks for DSA in simd constructs. adds 40b88e07e2d [Hexagon] driver uses out-of-date option name and binary name adds 9fab46ca0bd [NFC][Float2Int] Pre-commit unary FNeg test to basic.ll adds b7c31ff4a22 [OPENMP]Fix DSA for loop iteration variables in simd loops. adds d12966c0883 [AMDGPU][MC] Fix for sanitizer failure in 364645 adds 9f1dffdb024 [NFC][InstCombine] Shift amount reassociation: add flag pre [...] adds 176b9f65168 [llvm-cov[ Fix lcov coverage report contains functions from [...] adds e39e958da36 [ARM] Add support for the MVE long shift instructions adds 73f9d9aa64b [OPENMP]Fix top DSA for static members. new e1eb25ff3e5 [AMDGPU][MC] Fix 2 for sanitizer failure in 364645 new 3b4f086df4a [NFC][InstCombine] Shift amount reassociation: revisit flag [...] new 633d222d30b [WebAssembly] Added visibility and ident directives to Wasm [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/lib/CodeGen/CGOpenMPRuntime.cpp | 26 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 8 +- clang/lib/Driver/ToolChains/Hexagon.cpp | 4 +- clang/lib/Sema/SemaOpenMP.cpp | 24 +- clang/lib/StaticAnalyzer/Core/CoreEngine.cpp | 5 + clang/test/Analysis/egraph-asm-goto-no-crash.cpp | 26 + clang/test/CodeGenObjC/strong-in-c-struct.m | 28 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 2 +- clang/test/OpenMP/simd_loop_messages.cpp | 32 +- clang/test/OpenMP/target_codegen.cpp | 4 +- clang/test/OpenMP/target_firstprivate_codegen.cpp | 12 +- clang/test/OpenMP/target_map_codegen.cpp | 40 +- clang/test/OpenMP/target_parallel_codegen.cpp | 4 +- clang/test/OpenMP/target_parallel_for_codegen.cpp | 4 +- .../OpenMP/target_parallel_for_simd_codegen.cpp | 4 +- clang/test/OpenMP/target_simd_codegen.cpp | 4 +- clang/test/OpenMP/target_teams_codegen.cpp | 6 +- .../OpenMP/target_teams_distribute_codegen.cpp | 6 +- .../target_teams_distribute_simd_codegen.cpp | 6 +- compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp | 54 +- compiler-rt/lib/hwasan/hwasan.cpp | 36 +- compiler-rt/lib/hwasan/hwasan.h | 8 +- compiler-rt/lib/hwasan/hwasan_report.cpp | 96 +- .../lib/sanitizer_common/sanitizer_fuchsia.cc | 2 +- .../lib/sanitizer_common/sanitizer_ring_buffer.h | 2 +- .../lib/sanitizer_common/sanitizer_symbolizer.cc | 10 + .../lib/sanitizer_common/sanitizer_symbolizer.h | 28 + .../sanitizer_symbolizer_internal.h | 12 +- .../sanitizer_symbolizer_libcdep.cc | 79 +- compiler-rt/test/asan/CMakeLists.txt | 24 +- .../Android/{lit.local.cfg => lit.local.cfg.py} | 0 .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../Helpers/{lit.local.cfg => lit.local.cfg.py} | 0 .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../Windows/{lit.local.cfg => lit.local.cfg.py} | 0 .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/asan/{lit.cfg => lit.cfg.py} | 2 +- .../asan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/builtins/CMakeLists.txt | 8 +- .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../test/builtins/Unit/{lit.cfg => lit.cfg.py} | 2 +- .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/builtins/{lit.cfg => lit.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/cfi/CMakeLists.txt | 8 +- .../icall/{lit.local.cfg => lit.local.cfg.py} | 0 .../cross-dso/{lit.local.cfg => lit.local.cfg.py} | 0 .../cfi/icall/{lit.local.cfg => lit.local.cfg.py} | 0 compiler-rt/test/cfi/{lit.cfg => lit.cfg.py} | 0 .../cfi/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/crt/CMakeLists.txt | 4 +- compiler-rt/test/crt/{lit.cfg => lit.cfg.py} | 0 .../crt/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/dfsan/CMakeLists.txt | 4 +- compiler-rt/test/dfsan/{lit.cfg => lit.cfg.py} | 0 .../dfsan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/fuzzer/CMakeLists.txt | 12 +- compiler-rt/test/fuzzer/{lit.cfg => lit.cfg.py} | 0 .../fuzzer/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- .../unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/gwp_asan/CMakeLists.txt | 12 +- compiler-rt/test/gwp_asan/{lit.cfg => lit.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- .../unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/hwasan/CMakeLists.txt | 4 +- .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../test/hwasan/TestCases/stack-uar-dynamic.c | 23 + .../test/hwasan/TestCases/stack-uar-realign.c | 20 + compiler-rt/test/hwasan/TestCases/stack-uar.c | 23 +- compiler-rt/test/hwasan/{lit.cfg => lit.cfg.py} | 0 .../hwasan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/interception/CMakeLists.txt | 4 +- .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 .../test/{lit.common.cfg => lit.common.cfg.py} | 2 +- compiler-rt/test/lit.common.configured.in | 2 +- compiler-rt/test/lsan/CMakeLists.txt | 8 +- .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../lsan/{lit.common.cfg => lit.common.cfg.py} | 2 +- .../lsan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/msan/CMakeLists.txt | 8 +- .../msan/Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/msan/{lit.cfg => lit.cfg.py} | 0 .../msan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/profile/CMakeLists.txt | 4 +- .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 compiler-rt/test/profile/{lit.cfg => lit.cfg.py} | 2 +- .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/safestack/CMakeLists.txt | 4 +- compiler-rt/test/safestack/{lit.cfg => lit.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/sanitizer_common/CMakeLists.txt | 8 +- .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../FreeBSD/{lit.local.cfg => lit.local.cfg.py} | 0 .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../NetBSD/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 .../{lit.common.cfg => lit.common.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/scudo/CMakeLists.txt | 8 +- compiler-rt/test/scudo/{lit.cfg => lit.cfg.py} | 0 .../scudo/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/scudo/standalone/CMakeLists.txt | 4 +- .../unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/shadowcallstack/CMakeLists.txt | 4 +- .../test/shadowcallstack/{lit.cfg => lit.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/tsan/CMakeLists.txt | 16 +- .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../tsan/Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- .../libcxx/{lit.local.cfg => lit.local.cfg.py} | 0 .../{lit.local.cfg => lit.local.cfg.py} | 0 compiler-rt/test/tsan/{lit.cfg => lit.cfg.py} | 4 +- .../tsan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/ubsan/CMakeLists.txt | 8 +- .../Misc/Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Function/{lit.local.cfg => lit.local.cfg.py} | 0 .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../ubsan/{lit.common.cfg => lit.common.cfg.py} | 2 +- .../ubsan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/ubsan_minimal/CMakeLists.txt | 4 +- .../{lit.common.cfg => lit.common.cfg.py} | 2 +- .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/xray/CMakeLists.txt | 8 +- .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/xray/{lit.cfg => lit.cfg.py} | 0 .../xray/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- ...{lit.common.unit.cfg => lit.common.unit.cfg.py} | 0 .../unittests/lit.common.unit.configured.in | 2 +- compiler-rt/unittests/lit_unittest_cfg_utils.py | 2 +- debuginfo-tests/nrvo-string.cpp | 7 +- libcxx/include/optional | 2 +- .../optional.object.assign/assign_value.pass.cpp | 12 + libcxxabi/lib/itanium-base.exp | 373 ++++ libcxxabi/lib/new-delete.exp | 20 + libcxxabi/lib/personality-sjlj.exp | 1 + libcxxabi/lib/personality-v0.exp | 1 + libcxxabi/src/CMakeLists.txt | 21 + lld/COFF/SymbolTable.cpp | 4 +- lld/ELF/SyntheticSections.cpp | 2 +- .../ELF/linkerscript/empty-relaplt-dyntags.test | 44 + .../Darwin-Kernel/DynamicLoaderDarwinKernel.h | 2 +- .../MacOSX-DYLD/DynamicLoaderMacOSXDYLD.h | 2 +- llvm/docs/CommandGuide/llvm-objdump.rst | 10 +- llvm/docs/LangRef.rst | 10 + llvm/include/llvm/Analysis/InlineCost.h | 4 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 3 + .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 94 +- .../llvm/CodeGen/GlobalISel/RegBankSelect.h | 4 +- .../llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 21 +- llvm/include/llvm/DebugInfo/CodeView/TypeHashing.h | 6 +- llvm/include/llvm/DebugInfo/GSYM/FileEntry.h | 9 +- llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h | 22 +- llvm/include/llvm/DebugInfo/GSYM/InlineInfo.h | 10 +- llvm/include/llvm/DebugInfo/GSYM/LineEntry.h | 2 +- llvm/include/llvm/DebugInfo/GSYM/Range.h | 70 +- llvm/include/llvm/DebugInfo/GSYM/StringTable.h | 2 +- llvm/include/llvm/IR/Intrinsics.td | 6 + llvm/include/llvm/Support/FileSystem.h | 13 +- llvm/lib/Analysis/ScalarEvolution.cpp | 24 +- llvm/lib/Analysis/ValueTracking.cpp | 5 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 50 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 14 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 100 +- llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 20 +- llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 44 +- llvm/lib/CodeGen/HardwareLoops.cpp | 121 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 159 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 8 +- llvm/lib/DebugInfo/GSYM/FunctionInfo.cpp | 3 +- llvm/lib/DebugInfo/GSYM/InlineInfo.cpp | 2 +- llvm/lib/DebugInfo/GSYM/LLVMBuild.txt | 2 +- llvm/lib/DebugInfo/GSYM/Range.cpp | 52 +- llvm/lib/MC/MCParser/WasmAsmParser.cpp | 54 + llvm/lib/Support/APInt.cpp | 2 + llvm/lib/Support/Unix/Path.inc | 14 +- llvm/lib/Support/Windows/Path.inc | 7 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 12 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 29 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 74 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 4 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 262 +-- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 57 +- llvm/lib/Target/AMDGPU/SIDefines.h | 13 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 97 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 108 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 42 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 350 ++- llvm/lib/Target/ARM/ARMISelLowering.h | 8 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 31 + llvm/lib/Target/ARM/ARMInstrMVE.td | 223 +- llvm/lib/Target/ARM/ARMInstrNEON.td | 224 +- .../Target/ARM/Disassembler/ARMDisassembler.cpp | 4 +- .../Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 11 +- llvm/lib/Target/AVR/AVRFrameLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPC.td | 5 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 66 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 2 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 - llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 - .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 81 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 10 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 39 +- llvm/lib/Target/X86/X86InstrAVX512.td | 6 +- .../Instrumentation/HWAddressSanitizer.cpp | 25 +- llvm/lib/Transforms/Scalar/GVN.cpp | 1 + llvm/test/Analysis/ScalarEvolution/trip-count14.ll | 4 + .../GlobalISel/arm64-irtranslator-switch.ll | 1141 ++++++++++ .../CodeGen/AArch64/urem-seteq-vec-nonsplat.ll | 329 ++- llvm/test/CodeGen/AArch64/urem-seteq-vec-splat.ll | 161 +- llvm/test/CodeGen/AArch64/urem-seteq.ll | 112 +- llvm/test/CodeGen/AMDGPU/call-constexpr.ll | 1 + .../CodeGen/AMDGPU/callee-special-input-vgprs.ll | 178 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll | 2 +- llvm/test/CodeGen/AMDGPU/zext-lid.ll | 26 +- llvm/test/CodeGen/ARM/shift_parts.ll | 221 ++ llvm/test/CodeGen/Thumb2/mve-basic.ll | 35 + llvm/test/CodeGen/Thumb2/mve-bitcasts.ll | 3 +- llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 1243 +++++++++++ llvm/test/CodeGen/Thumb2/mve-fmath.ll | 2322 ++++++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll | 169 ++ llvm/test/CodeGen/Thumb2/mve-ldst-offset.ll | 1222 ++++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-postinc.ll | 1245 +++++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-preinc.ll | 1245 +++++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-regimm.ll | 158 ++ llvm/test/CodeGen/Thumb2/mve-loadstore.ll | 175 ++ llvm/test/CodeGen/Thumb2/mve-shuffle.ll | 624 ++++++ llvm/test/CodeGen/Thumb2/mve-simple-arith.ll | 385 ++++ llvm/test/CodeGen/Thumb2/mve-vdup.ll | 138 ++ llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll | 127 ++ llvm/test/CodeGen/X86/avx512-select.ll | 58 + llvm/test/CodeGen/X86/jump_sign.ll | 2 +- .../test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll | 27 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 27 +- llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 1421 ++++++++---- llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll | 461 ++-- llvm/test/CodeGen/X86/urem-seteq.ll | 143 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 5 +- llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 79 - .../MIR/X86/multiple-param-dbg-value-entry.mir | 83 - .../Instrumentation/HWAddressSanitizer/prologue.ll | 3 + llvm/test/MC/AMDGPU/sopp-err.s | 103 +- llvm/test/MC/AMDGPU/sopp.s | 126 +- .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt | 4 +- llvm/test/MC/Disassembler/AMDGPU/sopp_vi.txt | 23 +- llvm/test/MC/WebAssembly/atomics-encodings.s | 99 +- llvm/test/MC/WebAssembly/basic-assembly.s | 81 +- llvm/test/MC/WebAssembly/reloc-pic.s | 4 +- llvm/test/MC/WebAssembly/simd-encodings.s | 4 +- llvm/test/Transforms/Float2Int/basic.ll | 16 + llvm/test/Transforms/GVN/fpmath.ll | 10 + llvm/test/Transforms/GVNSink/fpmath.ll | 23 + llvm/test/Transforms/HardwareLoops/loop-guards.ll | 339 +++ llvm/test/Transforms/HardwareLoops/scalar-while.ll | 96 + .../HardwareLoops/unconditional-latch.ll | 75 +- .../InstCombine/shift-amount-reassociation.ll | 83 +- llvm/test/Transforms/NewGVN/fpmath.ll | 11 + llvm/test/tools/llvm-cov/multiple-files.test | 12 + llvm/tools/llvm-cov/CoverageExporterLcov.cpp | 2 +- llvm/unittests/ADT/APIntTest.cpp | 17 + llvm/unittests/Analysis/ValueTrackingTest.cpp | 3 + llvm/unittests/DebugInfo/GSYM/CMakeLists.txt | 5 - llvm/unittests/DebugInfo/GSYM/GSYMTest.cpp | 125 +- llvm/unittests/Support/Path.cpp | 53 + .../utils/gn/build/sync_source_lists_from_cmake.py | 14 +- .../gn/secondary/compiler-rt/test/hwasan/BUILD.gn | 4 +- llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn | 1 - openmp/libomptarget/deviceRTLs/nvptx/src/sync.cu | 2 +- .../deviceRTLs/nvptx/test/parallel/flush.c | 35 + 280 files changed, 16448 insertions(+), 2642 deletions(-) create mode 100644 clang/test/Analysis/egraph-asm-goto-no-crash.cpp rename compiler-rt/test/asan/TestCases/Android/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Darwin/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Helpers/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Windows/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/asan/{lit.cfg => lit.cfg.py} (99%) rename compiler-rt/test/asan/{lit.site.cfg.in => lit.site.cfg.py.in} (89%) rename compiler-rt/test/builtins/TestCases/Darwin/{lit.local.cfg => lit.local.cfg. [...] rename compiler-rt/test/builtins/Unit/{lit.cfg => lit.cfg.py} (98%) rename compiler-rt/test/builtins/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/builtins/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/builtins/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/cfi/cross-dso/icall/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/cfi/cross-dso/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/cfi/icall/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/cfi/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/cfi/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/crt/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/crt/{lit.site.cfg.in => lit.site.cfg.py.in} (88%) rename compiler-rt/test/dfsan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/dfsan/{lit.site.cfg.in => lit.site.cfg.py.in} (85%) rename compiler-rt/test/fuzzer/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/fuzzer/{lit.site.cfg.in => lit.site.cfg.py.in} (99%) rename compiler-rt/test/fuzzer/unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/gwp_asan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/gwp_asan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/gwp_asan/unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/hwasan/TestCases/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/hwasan/TestCases/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) create mode 100644 compiler-rt/test/hwasan/TestCases/stack-uar-dynamic.c create mode 100644 compiler-rt/test/hwasan/TestCases/stack-uar-realign.c rename compiler-rt/test/hwasan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/hwasan/{lit.site.cfg.in => lit.site.cfg.py.in} (87%) rename compiler-rt/test/interception/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/{lit.common.cfg => lit.common.cfg.py} (99%) rename compiler-rt/test/lsan/TestCases/Darwin/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/lsan/TestCases/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/lsan/TestCases/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/lsan/{lit.common.cfg => lit.common.cfg.py} (98%) rename compiler-rt/test/lsan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/msan/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/msan/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/msan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/msan/{lit.site.cfg.in => lit.site.cfg.py.in} (87%) rename compiler-rt/test/profile/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/profile/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/profile/{lit.cfg => lit.cfg.py} (98%) rename compiler-rt/test/profile/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/safestack/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/safestack/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/sanitizer_common/TestCases/Darwin/{lit.local.cfg => lit.lo [...] rename compiler-rt/test/sanitizer_common/TestCases/FreeBSD/{lit.local.cfg => lit.l [...] rename compiler-rt/test/sanitizer_common/TestCases/Linux/{lit.local.cfg => lit.loc [...] rename compiler-rt/test/sanitizer_common/TestCases/NetBSD/{lit.local.cfg => lit.lo [...] rename compiler-rt/test/sanitizer_common/TestCases/Posix/{lit.local.cfg => lit.loc [...] rename compiler-rt/test/sanitizer_common/Unit/{lit.site.cfg.in => lit.site.cfg.py. [...] rename compiler-rt/test/sanitizer_common/{lit.common.cfg => lit.common.cfg.py} (100%) rename compiler-rt/test/sanitizer_common/{lit.site.cfg.in => lit.site.cfg.py.in} (96%) rename compiler-rt/test/scudo/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/scudo/{lit.site.cfg.in => lit.site.cfg.py.in} (84%) rename compiler-rt/test/scudo/standalone/unit/{lit.site.cfg.in => lit.site.cfg.py. [...] rename compiler-rt/test/shadowcallstack/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/shadowcallstack/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/tsan/Darwin/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/tsan/libcxx/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/libdispatch/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/{lit.cfg => lit.cfg.py} (98%) rename compiler-rt/test/tsan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/ubsan/TestCases/Misc/Linux/{lit.local.cfg => lit.local.cfg [...] rename compiler-rt/test/ubsan/TestCases/TypeCheck/Function/{lit.local.cfg => lit.l [...] rename compiler-rt/test/ubsan/TestCases/TypeCheck/Linux/{lit.local.cfg => lit.loca [...] rename compiler-rt/test/ubsan/{lit.common.cfg => lit.common.cfg.py} (98%) rename compiler-rt/test/ubsan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/ubsan_minimal/{lit.common.cfg => lit.common.cfg.py} (97%) rename compiler-rt/test/ubsan_minimal/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/xray/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/xray/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/xray/{lit.site.cfg.in => lit.site.cfg.py.in} (99%) rename compiler-rt/unittests/{lit.common.unit.cfg => lit.common.unit.cfg.py} (100%) create mode 100644 libcxxabi/lib/itanium-base.exp create mode 100644 libcxxabi/lib/new-delete.exp create mode 100644 libcxxabi/lib/personality-sjlj.exp create mode 100644 libcxxabi/lib/personality-v0.exp create mode 100644 lld/test/ELF/linkerscript/empty-relaplt-dyntags.test create mode 100644 llvm/test/CodeGen/ARM/shift_parts.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-div-expand.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-fmath.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-offset.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-postinc.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-preinc.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-ldst-regimm.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-loadstore.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-shuffle.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-simple-arith.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-vdup.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll delete mode 100644 llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir delete mode 100644 llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir create mode 100644 llvm/test/Transforms/GVNSink/fpmath.ll create mode 100644 llvm/test/Transforms/HardwareLoops/loop-guards.ll create mode 100644 openmp/libomptarget/deviceRTLs/nvptx/test/parallel/flush.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits June 2019