Tcwg-commits June 2019

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (e41d1c49a1 -> 3a3a077c4a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/binutils-gdb. from e41d1c49a1 Automatic date update in version.in adds 66eb1ed388 Fix gdb build with -std=gnu++11 adds 7ccbb4437a sim/or1k: Regenerate sim adds 688cea90bc sim/common: Wire in df/di conversion adds f1cc84f594 sim/common: wire up new unordered comparisons adds b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations adds 3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction adds 57a63d27dc sim/testsuite/or1k: Add tests for unordered compares adds 4c04873103 Fix "set integer-command unlimited junk" adds f8164777cd Automatic date update in version.in adds d4b87b1eb6 PowerPC comment fixes adds e3fa7860f4 Fix alpha testsuite regression adds 3a3a077c4a Regenerate with approved autotools version No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 9 + bfd/Makefile.in | 1 - bfd/configure | 28 +- bfd/elf64-ppc.c | 10 +- bfd/version.h | 2 +- binutils/ChangeLog | 6 + binutils/Makefile.in | 9 +- binutils/aclocal.m4 | 10 +- binutils/doc/Makefile.in | 9 +- gas/ChangeLog | 6 + gas/Makefile.in | 1 - gas/configure | 28 +- gas/doc/Makefile.in | 1 - gdb/ChangeLog | 15 + gdb/cli/cli-setshow.c | 23 +- gdb/compile/compile.c | 2 +- gdb/testsuite/ChangeLog | 5 + gdb/testsuite/gdb.base/settings.exp | 11 + gdb/thread.c | 6 +- ld/ChangeLog | 12 + ld/Makefile.in | 1 - ld/configure | 28 +- ld/testsuite/ld-alpha/tlsbin.rd | 2 +- ld/testsuite/ld-alpha/tlsbinr.rd | 2 +- ld/testsuite/ld-alpha/tlspic.rd | 4 +- libctf/ChangeLog | 4 + libctf/configure | 2 +- sim/ChangeLog | 10 + sim/common/ChangeLog | 11 + sim/common/cgen-accfp.c | 49 + sim/common/cgen-fpu.h | 2 + sim/or1k/arch.c | 2 +- sim/or1k/arch.h | 2 +- sim/or1k/cpu.c | 78 +- sim/or1k/cpu.h | 174 ++- sim/or1k/cpuall.h | 2 +- sim/or1k/decode.c | 568 ++++++++-- sim/or1k/decode.h | 21 +- sim/or1k/model.c | 1456 +++++++++++++++++++++----- sim/or1k/sem-switch.c | 602 ++++++++++- sim/or1k/sem.c | 672 +++++++++++- sim/testsuite/sim/or1k/ChangeLog | 13 + sim/testsuite/sim/or1k/adrp.S | 73 ++ sim/testsuite/sim/or1k/fpu-unordered.S | 97 ++ sim/testsuite/sim/or1k/fpu64a32-unordered.S | 100 ++ sim/testsuite/sim/or1k/{fpu.S => fpu64a32.S} | 135 ++- 46 files changed, 3771 insertions(+), 533 deletions(-) create mode 100644 sim/testsuite/sim/or1k/adrp.S create mode 100644 sim/testsuite/sim/or1k/fpu-unordered.S create mode 100644 sim/testsuite/sim/or1k/fpu64a32-unordered.S copy sim/testsuite/sim/or1k/{fpu.S => fpu64a32.S} (50%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (e0176cf1 -> d8dc45da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards e0176cf1 2: update: binutils-gcc-linux: 19560 new d8dc45da 2: update: binutils-3a3a077c4acaed1ab231a376ff9faf6b71b7a0f1: 19560 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e0176cf1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ne [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 141 +- 02-prepare_abe/console.log | 406 +- 03-build_abe-binutils/console.log | 9335 +++++------ 04-build_abe-stage1/console.log | 19795 ++++++++++++----------- 05-build_linux/console.log | 881 +- 07-check_regression/console.log | 6 +- 08-update_baseline/console.log | 10 +- console.log | 30706 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 9 files changed, 30158 insertions(+), 31136 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (b1daec0eae6 -> 9bc707c0e5d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project. from b1daec0eae6 [X86] Correct instruction operands in evex-to-vex-compress. [...] adds 02eac87ba3e [llvm-ar][test] Add to MRI test coverage adds 7957fc6547e [IntrinsicEmitter] Extend argument overloading with forward [...] adds 9d28473a355 [ARM][TTI] Scan for existing loop intrinsics adds 179e0fa8815 [NFC] Simplify Call query adds a78e025558b [ELF] Loosen the condition that changes absolute relocation [...] adds 49779275360 [clangd] Treat lambdas as functions when preparing hover response adds f9ad6e57d96 [clang-scan-deps] Fix -DBUILD_SHARED_LIBS=ON build adds 8d59f5370d4 Revert [llvm-ar][test] Add to MRI test coverage adds 51c2fa0e2ac Improve reduction intrinsics by overloading result value. adds 818dd8666a5 [WebAssembly] Modernize include path handling adds 95a9ee5e2f2 [OpenCL] Move OpenCLBuiltins.td and remove unused include adds 86b7f865ac5 [llvm-objcopy] Implement IHEX reader adds 848d3d0d2c4 [ARM] Refactor handling of IT mask operands. adds 181bf0cefb2 [DebugInfo] Use FrameDestroy to extend stack locations to e [...] adds 076ae0d2e2f [DebugInfo] Move Value struct out of DebugLocEntry as DbgVa [...] adds e1aea858968 [X86][SSE] Add SSE4A nt store tests on X86 as well as X64 adds 7b395133029 [llvm-nm] Additional lit tests for command line options adds a6b87aa7ee1 [X86][SSE] Add tests for underaligned nt stores adds ad17e289f0e DWARF: Don't create lldb CompileUnits for DWARF type units adds 0baf136a4d0 [X86][SSE] Avoid assert for broadcast(horiz-op()) cases for [...] adds a284f4fa7ca [X86][AVX] Add broadcast(v4f64 hadd) test adds 88e636dfc15 [Clangd] Fixed clangd diagnostics priority adds b00dbcbb43b [ThinLTO][Bitcode] Add 'entrycount' to FS_COMBINED_PROFILE. NFC adds 1fca3b1972d [AMDGPU][MC] Enabled constant expressions as operands of s_ [...] adds bf2b2f08b02 [DebugInfo] Honour variable fragments in LiveDebugValues adds 6b56ad164ce [CodeGen] Add getMachineMemOperand + MachineMemOperand::Fla [...] adds 286e1d2c2d6 [ARM] Set up infrastructure for MVE vector instructions. adds d2cd9c23b4e [NFC] Sink a function call into LiveDebugValues::process adds 407c8f1f493 Extra error checking to ARMAttributeParser adds 0eb763c5597 [lld][ELF] Add tests for bad subsection length in .ARM.attributes adds 31d68804fd4 Added AST matcher for ignoring elidable constructors adds ab240c5eee4 [clang-tidy] Fixed abseil-duration-unnecessary-conversion t [...] adds 86b510aa584 [docs][llvm-dwarfdump] Add missing options and behaviour to [...] adds 0be2d25ecc7 [FIX] Forces shrink wrapping to consider any memory access [...] adds e6820dac99a [docs][llvm-symbolizer] Fix formatting issue with --functions adds 1278a192823 Remove ';' after namespace's closing bracket [NFC] adds 757a2f13fd9 [X86] Use fresh MemOps when emitting VAARG64 adds 08a4a0e9656 Fix GCC compiler warning. NFC. adds 93f96b2be93 [clang-tidy] Made abseil-upgrade-duration-conversions tests [...] adds 8f30e322aba [CMake] Add fallbacks for copying clang-resource-headers to [...] adds 0030306555d [clang-tidy] Fixed abseil-time-subtraction to work on C++17 adds 558369b5495 [clang-tidy] Made abseil-faster-strsplit-delimiter tests pa [...] adds 3bc6e2a7aa3 [EarlyCSE] Ensure equal keys have the same hash value adds aeb89f8b33d [NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsic [...] adds 2bda177da01 [AMDGPU] ImmArg and SourceOfDivergence for permlane/dpp adds 587497b87d0 [clang][NewPM] Fix broken -O0 test from the AlwaysInliner adds ab2c0ed01ed [clang][NewPM] Fix broken profile test adds 113320d3b69 [CMake] Fix lldb-dotest for single-config generators in sta [...] adds a0781b6e3a3 [CMake] Fix generated Xcode-project ignoring output directo [...] adds 9f8ce3feb22 [clang][NewPM] Fix split debug test adds 896ece41e47 [Codegen] Merge tail blocks with no successors after block [...] adds a9d8388e80c [NFC] Updated testcase for D54411/rL363284 adds 4d93fb528ec [InstCombine] auto-generate complete test checks; NFC adds 09f56b51ec8 [clang][NewPM] Fix broken -O0 test from missing assumptions adds 34ec6929a1f PR42182: Allow thread-local to use __cxa_thread_atexit when [...] adds eb88badff96 Fix a bug w/inbounds invalidation in LFTR adds 64c1d456c1b [libc++] Add missing #include in <cwchar> tests adds 5bf7f81aa8c [InstCombine] add test for failed libfunction prototype mat [...] adds 42a3fc133d3 [LFTR] Stylistic cleanup as suggested in last review commen [...] adds c37be296342 [LFTR] Rename variable to minimize confusion [NFC] adds 4244dd5e3f9 [docs] Fix TableGen/LangRef typos adds 17965d42f42 C++ DR712 and others: handle non-odr-use resulting from an [...] adds 67d4a6d48cf [clang-tidy] Make ClangTidyCheck::OptionsView public. adds 335f9883f06 [AMDGPU] gfx1010: small test change for wave32. NFC adds ed9c7ec73df [lit] Disable test on darwin when building shared libs. adds 8bcc9bb5959 [AMDGPU] gfx1010 base changes for wave32 adds 675be5db469 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-i [...] adds 8608afa964d Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-i [...] adds 7d4e7efd2e1 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl [...] adds 21a29a9e653 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl [...] adds 48904571961 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl [...] adds ea28a063fd8 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine- [...] adds e00198f7a87 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg [...] adds a37d925d3d8 Revert "[NFC][CodeGen] Forgot 2 unary FNeg tests in X86/fma [...] adds a0d06a626ff Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intr [...] adds 0a3fe05047e Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ an [...] adds 2aff82bfa67 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-int [...] adds d3eaa332e4a Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intr [...] adds 31da4f80d5b Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scal [...] adds d331e71bdb6 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fne [...] adds 5d9271802ba Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patt [...] adds 8984dbc27c3 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patt [...] adds 07514a1b162 Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combine [...] adds 79ec1a29572 Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll f [...] adds 038e01dc9a7 Add a clarifying comment about branching on poison adds 24f40858118 [SimplifyCFG] NFC, update Switch tests as a baseline. adds ad81d427caa [LangRef] Clarify poison semantics adds 6b936d88a46 [dfsan] Introduce dfsan_flush(). adds 2f8c6f93626 [ORC] Rename MaterializationResponsibility resolve and emit [...] adds ccecd22db9c [AMDGPU] gfx1010 AMDGPUSetCCOp definition adds 9c6806b1641 gn build: Merge r363242 adds 901d04fc6df [Coverage] Load code coverage data from archives adds 2fa83cb7ee0 [libFuzzer] simplify the DFT trace collection using the new [...] adds a5b12be60f9 fix whitespaces adds 6e6e3af55bb [Remarks] Refactor optimization remarks setup adds 1c88445840c [MachinePiepliner] Don't check boundary node in checkValidN [...] adds cf34a2bd5d6 [X86Disassembler] Unify the EVEX and VEX code in emitContex [...] adds fb0a40f0648 [GlobalISel][IRTranslator] Add debug loc with line 0 to con [...] adds 4336a9496d4 [AMDGPU] gfx10 documentation update. NFC. adds 2ce370c9572 [libc++] Fix build with gcc 4.8 adds 0feb6e52f18 Symbolize: Remove dead code. NFCI. adds 49275272e3e Use fully qualified name when printing S_CONSTANT records adds b1027a480ac [llvm-objcopy] Fix sparc target endianness adds 0476d069e39 PR23833, DR2140: an lvalue-to-rvalue conversion on a glvalu [...] adds 347ec0faa79 [NFC] Replace a plugin header with a non-plugin header adds 68a2fef9ae5 [AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32 adds aca017e8025 Remove unused SK_LValueToRValue initialization step. adds 8a8131a3f64 [AMDGPU] gfx1010 wave32 clang support adds 1e4882c8906 [Coverage] Speculative fix for r363325 for an older compiler adds e4147ea1ef4 Revert "[Remarks] Refactor optimization remarks setup" adds c43e67bfffd [AMDGPU] gfx1011/gfx1012 targets adds cafccd7a534 [AMDGPU] gfx1011/gfx1012 clang support adds 2c074bb39e2 [Targets] Move soft-float-abi filtering to `initFeatureMap` adds 5b188f8dac0 Add REQUIRES: zlib to test added in r363325 as the profile [...] adds 4121bdc3d49 [X86] Add target triple for live-debug-values-fragments.mir adds 4129e3e0f8e DebugInfo: Include enumerators in pubnames adds d54d4f99059 [llvm-objcopy] Changed command line parsing errors adds 5b4285d82de [ELF][RISCV] Create dummy .sdata for __global_pointer$ if . [...] adds 3d02b895eda Revert 363295, it caused PR42276. Also revert follow-ups 36 [...] adds 95c9020d977 gn build: Merge r363204 (clang-scan-deps) adds e0de6002e8f [llvm-objcopy] Remove no-op flush of errs adds 5e83d8fff43 Move commentary on opcode translation for code16 mov instru [...] adds 77cc50ff7d5 Fixed typos in Log.h adds d8aca8886ff Make UniqueCStringMap work with non-default-constructible t [...] new 9bc707c0e5d Revert r363326 "[libFuzzer] simplify the DFT trace collecti [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-tidy/ClangTidyCheck.h | 14 +- .../abseil/DurationUnnecessaryConversionCheck.cpp | 5 +- .../abseil/FasterStrsplitDelimiterCheck.cpp | 27 +- .../clang-tidy/abseil/TimeSubtractionCheck.cpp | 51 +- .../abseil/UpgradeDurationConversionsCheck.cpp | 24 +- clang-tools-extra/clangd/Diagnostics.cpp | 20 +- clang-tools-extra/clangd/XRefs.cpp | 47 +- .../clangd/unittests/DiagnosticsTests.cpp | 13 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 80 +- .../abseil-duration-unnecessary-conversion.cpp | 3 +- .../abseil-faster-strsplit-delimiter.cpp | 2 +- .../test/clang-tidy/abseil-time-subtraction.cpp | 2 +- .../abseil-upgrade-duration-conversions.cpp | 2 +- clang/docs/ClangCommandLineReference.rst | 4 + clang/docs/LibASTMatchersReference.html | 26 + clang/include/clang/ASTMatchers/ASTMatchers.h | 38 + clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Driver/Options.td | 5 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Basic/Targets/AMDGPU.cpp | 7 + clang/lib/Basic/Targets/ARM.cpp | 33 +- clang/lib/Basic/Targets/ARM.h | 6 + clang/lib/CodeGen/BackendUtil.cpp | 15 +- clang/lib/CodeGen/CGBuiltin.cpp | 24 +- clang/lib/CodeGen/CGDebugInfo.cpp | 9 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 12 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 11 + clang/lib/Driver/ToolChains/HIP.cpp | 10 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 41 +- clang/lib/Frontend/InitHeaderSearch.cpp | 8 + clang/lib/Sema/CMakeLists.txt | 7 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- clang/test/CodeGen/arm-soft-float-abi-filtering.c | 9 + clang/test/CodeGen/builtin-movdir.c | 6 +- clang/test/CodeGen/lifetime.c | 3 +- clang/test/CodeGen/lto-newpm-pipeline.c | 2 + clang/test/CodeGen/split-debug-single-file.c | 10 +- clang/test/CodeGenCXX/cxx11-thread-local.cpp | 6 + clang/test/CodeGenOpenCL/amdgpu-features.cl | 4 + clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 12 +- clang/test/Driver/amdgpu-features.c | 6 + clang/test/Driver/amdgpu-macros.cl | 14 + clang/test/Driver/amdgpu-mcpu.cl | 4 + clang/test/Driver/wasm-toolchain.cpp | 2 + clang/test/Profile/gcc-flag-compatibility.c | 12 +- ...clang-check-mac-libcxx-fixed-compilation-db.cpp | 2 + clang/tools/clang-scan-deps/CMakeLists.txt | 1 + .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 76 +- clang/unittests/ASTMatchers/ASTMatchersTest.h | 78 +- compiler-rt/include/sanitizer/dfsan_interface.h | 6 + compiler-rt/lib/dfsan/dfsan.cc | 6 + compiler-rt/lib/dfsan/done_abilist.txt | 2 + compiler-rt/test/dfsan/flush.c | 28 + libcxx/include/charconv | 2 +- .../test/std/depr/depr.c.headers/wchar_h.pass.cpp | 1 + libcxx/test/std/strings/c.strings/cwchar.pass.cpp | 1 + lld/ELF/Relocations.cpp | 8 +- lld/ELF/Symbols.cpp | 1 + lld/ELF/Symbols.h | 3 + lld/ELF/SyntheticSections.cpp | 17 + lld/ELF/SyntheticSections.h | 10 + lld/ELF/Writer.cpp | 14 +- lld/test/ELF/invalid/bad-arm-attributes.s | 8 + lld/test/ELF/invalid/bad-arm-attributes2.s | 8 + lld/test/ELF/riscv-gp-dummy-sdata.s | 25 + lld/test/ELF/riscv-gp.s | 26 + lldb/cmake/modules/LLDBFramework.cmake | 34 +- lldb/include/lldb/Core/UniqueCStringMap.h | 88 +- lldb/include/lldb/Symbol/Symtab.h | 2 +- lldb/include/lldb/Utility/Log.h | 4 +- lldb/lit/SymbolFile/DWARF/debug-types-dwarf5.s | 94 + .../lit/SymbolFile/DWARF/debug-types-line-tables.s | 17 + lldb/source/API/SBFrame.cpp | 2 +- .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.cpp | 4 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 5 + .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.h | 1 + .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 380 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 13 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 24 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h | 8 +- .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.cpp | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.h | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwp.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwp.h | 2 +- lldb/source/Symbol/Symtab.cpp | 71 +- lldb/unittests/Core/CMakeLists.txt | 1 + lldb/unittests/Core/UniqueCStringMapTest.cpp | 53 + lldb/utils/lldb-dotest/CMakeLists.txt | 6 +- llvm/docs/AMDGPUUsage.rst | 3682 +++++++++++++------- llvm/docs/CommandGuide/llvm-cov.rst | 6 + llvm/docs/CommandGuide/llvm-dwarfdump.rst | 39 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 8 +- llvm/docs/LangRef.rst | 63 +- llvm/docs/TableGen/LangRef.rst | 4 +- llvm/include/llvm/Analysis/ValueTracking.h | 6 + llvm/include/llvm/BinaryFormat/ELF.h | 4 +- llvm/include/llvm/CodeGen/MachineFunction.h | 6 + llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 55 +- llvm/include/llvm/IR/Intrinsics.h | 28 +- llvm/include/llvm/IR/Intrinsics.td | 23 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 28 +- .../ProfileData/Coverage/CoverageMappingReader.h | 10 +- llvm/include/llvm/Support/TargetParser.h | 4 +- .../llvm/Support/X86DisassemblerDecoderCommon.h | 36 +- llvm/lib/Analysis/ValueTracking.cpp | 18 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 9 +- .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h | 178 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 22 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 8 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 5 + llvm/lib/CodeGen/BranchFolding.cpp | 38 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 17 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 282 +- llvm/lib/CodeGen/MachineFunction.cpp | 9 + llvm/lib/CodeGen/MachinePipeliner.cpp | 5 + llvm/lib/CodeGen/ShrinkWrap.cpp | 9 + .../DebugInfo/Symbolize/SymbolizableObjectFile.cpp | 16 +- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 1 - llvm/lib/ExecutionEngine/Orc/Core.cpp | 17 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp | 4 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 4 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 4 +- llvm/lib/IR/Function.cpp | 140 +- llvm/lib/IR/IRBuilder.cpp | 2 +- llvm/lib/IR/Verifier.cpp | 12 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | 11 +- .../ProfileData/Coverage/CoverageMappingReader.cpp | 196 +- llvm/lib/Support/ARMAttributeParser.cpp | 6 + llvm/lib/Support/TargetParser.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 52 + llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 2 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 4 +- llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td | 5 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 12 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 14 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 221 +- llvm/lib/Target/AMDGPU/GCNProcessors.td | 8 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 +- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 44 +- llvm/lib/Target/AMDGPU/SIDefines.h | 5 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 32 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 + llvm/lib/Target/AMDGPU/SIInstructions.td | 25 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 32 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 85 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 45 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 89 + llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 17 + llvm/lib/Target/AMDGPU/VOPCInstructions.td | 23 + llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 15 + llvm/lib/Target/ARM/ARMInstrFormats.td | 80 + llvm/lib/Target/ARM/ARMInstrMVE.td | 363 ++ llvm/lib/Target/ARM/ARMInstrThumb2.td | 1 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 4 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 12 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 38 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 564 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.../Generic/expand-experimental-reductions.ll | 44 +- .../test/CodeGen/PowerPC/BreakableToken-reduced.ll | 4 +- .../CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll | 3 +- llvm/test/CodeGen/PowerPC/licm-tocReg.ll | 4 +- .../CodeGen/PowerPC/ppc64-sibcall-shrinkwrap.ll | 6 +- llvm/test/CodeGen/PowerPC/sms-simple.ll | 78 + .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 4 +- llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll | 1642 +++++++-- llvm/test/CodeGen/Thumb2/v8_IT_3.ll | 4 +- llvm/test/CodeGen/WinEH/wineh-noret-cleanup.ll | 7 +- .../CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 2 +- llvm/test/CodeGen/X86/MachineSink-eflags.ll | 9 +- .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 657 ---- .../CodeGen/X86/avx512vl-intrinsics-fast-isel.ll | 1402 +------- llvm/test/CodeGen/X86/cmov.ll | 2 +- llvm/test/CodeGen/X86/combine-fabs.ll | 32 - llvm/test/CodeGen/X86/combine-fcopysign.ll | 38 - llvm/test/CodeGen/X86/conditional-tailcall.ll | 198 +- llvm/test/CodeGen/X86/copy-eflags.ll | 4 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llvm/test/CodeGen/X86/fsxor-alignment.ll | 26 +- llvm/test/CodeGen/X86/haddsub-shuf.ll | 79 + llvm/test/CodeGen/X86/i386-shrink-wrapping.ll | 125 +- llvm/test/CodeGen/X86/loop-search.ll | 19 +- llvm/test/CodeGen/X86/machine-cp.ll | 26 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 3 +- llvm/test/CodeGen/X86/mul-constant-result.ll | 261 +- llvm/test/CodeGen/X86/neg_fp.ll | 9 +- llvm/test/CodeGen/X86/nontemporal-3.ll | 1002 ++++++ llvm/test/CodeGen/X86/shrink-wrap-chkstk-x86_64.ll | 32 +- llvm/test/CodeGen/X86/tail-merge-after-mbp.mir | 43 +- llvm/test/CodeGen/X86/tail-opts.ll | 33 +- llvm/test/CodeGen/X86/tail-threshold.ll | 25 +- llvm/test/CodeGen/X86/test-shrink-bug.ll | 22 +- llvm/test/CodeGen/X86/vec_fneg.ll | 14 - llvm/test/CodeGen/X86/vec_logical.ll | 17 - llvm/test/CodeGen/X86/vector-reduce-add-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-add.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-and-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-and.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-mul-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-or-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-or.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-xor-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-xor.ll | 88 +- llvm/test/CodeGen/X86/x86-shrink-wrapping.ll | 1446 +++++--- llvm/test/CodeGen/X86/xchg-nofold.ll | 3 +- llvm/test/CodeGen/XCore/fneg.ll | 10 - llvm/test/DebugInfo/AArch64/cfi-eof-prologue.ll | 2 +- llvm/test/DebugInfo/ARM/partial-subreg.ll | 24 - llvm/test/DebugInfo/COFF/global-constants.ll | 150 +- llvm/test/DebugInfo/COFF/pieces.ll | 5 +- .../MIR/X86/live-debug-values-fragments.mir | 259 ++ llvm/test/DebugInfo/X86/dbg-addr.ll | 6 +- llvm/test/DebugInfo/X86/debug-loc-offset.mir | 6 - llvm/test/DebugInfo/X86/gnu-public-names.ll | 366 +- llvm/test/DebugInfo/X86/pr19307.mir | 6 - llvm/test/MC/AMDGPU/gfx1011_dlops.s | 53 + llvm/test/MC/AMDGPU/gfx1011_err.s | 50 + llvm/test/MC/AMDGPU/smem.s | 126 +- llvm/test/MC/AMDGPU/sopk-err.s | 66 +- llvm/test/MC/AMDGPU/sopk.s | 38 + llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s | 158 + llvm/test/MC/ARM/mve-minmax.s | 15 + llvm/test/MC/ARM/mve-reductions.s | 28 + llvm/test/MC/ARM/mve-vpt.s | 57 + .../MC/Disassembler/AMDGPU/gfx1011_dasm_dlops.txt | 53 + .../AMDGPU/xdl-insts-gfx1011-gfx1012.txt | 158 + llvm/test/MC/Disassembler/ARM/mve-minmax.txt | 11 + llvm/test/MC/Disassembler/ARM/mve-reductions.txt | 27 + llvm/test/MC/Disassembler/ARM/mve-vpt.txt | 13 + llvm/test/Transforms/EarlyCSE/commute.ll | 53 +- .../test/Transforms/HardwareLoops/ARM/structure.ll | 68 + .../IndVarSimplify/2011-10-27-lftrnull.ll | 4 +- .../IndVarSimplify/2011-11-01-lftrptr.ll | 10 +- .../Transforms/IndVarSimplify/lftr-dead-ivs.ll | 8 +- llvm/test/Transforms/IndVarSimplify/lftr.ll | 2 +- .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 274 +- llvm/test/Transforms/InstCombine/sqrt-nofast.ll | 32 +- llvm/test/Transforms/InstCombine/sqrt.ll | 43 +- .../LoopStrengthReduce/AArch64/small-constant.ll | 22 +- .../LoopVectorize/AArch64/reduction-small-size.ll | 6 +- .../SLPVectorizer/AArch64/gather-cost.ll | 2 +- .../SLPVectorizer/AArch64/gather-root.ll | 10 +- .../Transforms/SLPVectorizer/AArch64/horizontal.ll | 6 +- .../Transforms/SLPVectorizer/AArch64/transpose.ll | 2 +- llvm/test/Transforms/SimplifyCFG/ARM/cttz-ctlz.ll | 21 +- .../Transforms/SimplifyCFG/ARM/select-trunc-i64.ll | 17 +- .../ARM/switch-to-lookup-table-constant-expr.ll | 24 +- .../SimplifyCFG/ARM/switch-to-lookup-table.ll | 19 +- .../Transforms/SimplifyCFG/CoveredLookupTable.ll | 31 +- .../SimplifyCFG/X86/disable-lookup-table.ll | 53 +- .../SimplifyCFG/X86/speculate-cttz-ctlz.ll | 477 ++- .../SimplifyCFG/X86/switch-covered-bug.ll | 32 +- .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 25 +- .../SimplifyCFG/X86/switch_to_lookup_table.ll | 1345 ++++--- .../Transforms/SimplifyCFG/switch-dead-default.ll | 169 +- .../Transforms/SimplifyCFG/switch-masked-bits.ll | 23 +- .../SimplifyCFG/switch-on-const-select.ll | 191 +- .../Transforms/SimplifyCFG/switch-range-to-icmp.ll | 79 +- .../SimplifyCFG/switch_create-custom-dl.ll | 592 ++-- llvm/test/Transforms/SimplifyCFG/switch_create.ll | 591 ++-- .../Transforms/SimplifyCFG/switch_switch_fold.ll | 76 +- llvm/test/Transforms/SimplifyCFG/switch_thread.ll | 153 +- llvm/test/Transforms/SimplifyCFG/switch_undef.ll | 15 +- llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll | 40 +- .../Inputs/universal_bin_wrapping_archives/obj1.c | 1 + .../universal_bin_wrapping_archives/obj1_32.o | Bin 0 -> 1340 bytes .../Inputs/universal_bin_wrapping_archives/obj2.c | 1 + .../universal_bin_wrapping_archives/obj2_32.o | Bin 0 -> 1340 bytes .../universal_bin_wrapping_archives | Bin 0 -> 6240 bytes .../universal_bin_wrapping_archives.proftext | 8 + .../llvm-cov/universal_bin_wrapping_archives.test | 45 + .../{sysv-i386.test => format-sysv-32-bit.test} | 1 - .../test/tools/llvm-nm/X86/format-sysv-64-bit.test | 5 + llvm/test/tools/llvm-nm/X86/macho-format-sysv.test | 8 + llvm/test/tools/llvm-nm/X86/portability.test | 25 + llvm/test/tools/llvm-nm/X86/posixELF.test | 4 - llvm/test/tools/llvm-nm/X86/sysv-x86_64.test | 13 - llvm/test/tools/llvm-nm/debug-syms.test | 32 + llvm/test/tools/llvm-nm/format-sysv-binding.test | 44 + llvm/test/tools/llvm-nm/format-sysv-layout.test | 28 + llvm/test/tools/llvm-nm/format-sysv-section.test | 35 + llvm/test/tools/llvm-nm/format-sysv-type.test | 44 + llvm/test/tools/llvm-nm/no-sort.test | 40 + llvm/test/tools/llvm-nm/numeric-sort.test | 44 + llvm/test/tools/llvm-nm/print-filename.test | 19 + llvm/test/tools/llvm-nm/print-size.test | 19 + llvm/test/tools/llvm-nm/undefined-only.test | 20 + .../tools/llvm-objcopy/ELF/Inputs/sections.hex | 15 + .../tools/llvm-objcopy/ELF/bad-output-format.test | 4 +- .../tools/llvm-objcopy/ELF/binary-input-arch.test | 10 +- .../tools/llvm-objcopy/ELF/binary-input-error.test | 4 +- ...mpress-and-decompress-debug-sections-error.test | 2 +- .../compress-debug-sections-invalid-format.test | 2 +- llvm/test/tools/llvm-objcopy/ELF/help-message.test | 2 +- llvm/test/tools/llvm-objcopy/ELF/ihex-reader.test | 203 ++ .../tools/llvm-objcopy/ELF/redefine-symbol.test | 4 +- .../llvm-objcopy/ELF/rename-section-flag.test | 2 +- .../tools/llvm-objcopy/ELF/rename-section.test | 4 +- .../tools/llvm-objcopy/ELF/set-section-flags.test | 6 +- .../llvm-objcopy/ELF/strip-multiple-files.test | 2 +- llvm/tools/llvm-objcopy/CopyConfig.cpp | 37 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 11 + llvm/tools/llvm-objcopy/ELF/ELFObjcopy.h | 2 + llvm/tools/llvm-objcopy/ELF/Object.cpp | 246 +- llvm/tools/llvm-objcopy/ELF/Object.h | 72 +- llvm/tools/llvm-objcopy/llvm-objcopy.cpp | 25 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 2 + .../unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp | 68 +- .../Orc/LazyCallThroughAndReexportsTest.cpp | 4 +- llvm/utils/TableGen/CodeGenTarget.cpp | 35 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 78 +- llvm/utils/TableGen/X86DisassemblerTables.cpp | 74 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 8 - llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 8 +- llvm/utils/gn/secondary/clang/test/BUILD.gn | 1 + .../secondary/clang/tools/clang-scan-deps/BUILD.gn | 20 + llvm/utils/lit/lit/llvm/config.py | 2 + 428 files changed, 24299 insertions(+), 17773 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 clang/test/CodeGen/arm-soft-float-abi-filtering.c create mode 100644 compiler-rt/test/dfsan/flush.c create mode 100644 lld/test/ELF/invalid/bad-arm-attributes.s create mode 100644 lld/test/ELF/invalid/bad-arm-attributes2.s create mode 100644 lld/test/ELF/riscv-gp-dummy-sdata.s create mode 100644 lld/test/ELF/riscv-gp.s create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-dwarf5.s create mode 100644 lldb/unittests/Core/UniqueCStringMapTest.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll create mode 100644 llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir create mode 100644 llvm/test/CodeGen/PowerPC/sms-simple.ll create mode 100644 llvm/test/CodeGen/X86/nontemporal-3.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir create mode 100644 llvm/test/MC/AMDGPU/gfx1011_dlops.s create mode 100644 llvm/test/MC/AMDGPU/gfx1011_err.s create mode 100644 llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s create mode 100644 llvm/test/MC/ARM/mve-minmax.s create mode 100644 llvm/test/MC/ARM/mve-reductions.s create mode 100644 llvm/test/MC/ARM/mve-vpt.s create mode 100644 llvm/test/MC/Disassembler/AMDGPU/gfx1011_dasm_dlops.txt create mode 100644 llvm/test/MC/Disassembler/AMDGPU/xdl-insts-gfx1011-gfx1012.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-minmax.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-reductions.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-vpt.txt create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives/obj1.c create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives/obj2.c create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/universal_bin_wrapping_archives.test rename llvm/test/tools/llvm-nm/X86/{sysv-i386.test => format-sysv-32-bit.test} (89%) create mode 100644 llvm/test/tools/llvm-nm/X86/format-sysv-64-bit.test create mode 100644 llvm/test/tools/llvm-nm/X86/macho-format-sysv.test create mode 100644 llvm/test/tools/llvm-nm/X86/portability.test delete mode 100644 llvm/test/tools/llvm-nm/X86/posixELF.test delete mode 100644 llvm/test/tools/llvm-nm/X86/sysv-x86_64.test create mode 100644 llvm/test/tools/llvm-nm/debug-syms.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-binding.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-layout.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-section.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-type.test create mode 100644 llvm/test/tools/llvm-nm/no-sort.test create mode 100644 llvm/test/tools/llvm-nm/numeric-sort.test create mode 100644 llvm/test/tools/llvm-nm/print-filename.test create mode 100644 llvm/test/tools/llvm-nm/print-size.test create mode 100644 llvm/test/tools/llvm-nm/undefined-only.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/Inputs/sections.hex create mode 100644 llvm/test/tools/llvm-objcopy/ELF/ihex-reader.test create mode 100644 llvm/utils/gn/secondary/clang/tools/clang-scan-deps/BUILD.gn -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (43cf9af1 -> ff0d96d7)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 43cf9af1 2: update: llvm-linux: 19135 new ff0d96d7 2: update: llvm-linux: 19135 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (43cf9af1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 122 +- 02-build_llvm/console.log | 11813 +++++++++++++++-------------- 03-build_linux/console.log | 3160 ++++---- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 54 +- console.log | 15155 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 7 files changed, 15159 insertions(+), 15161 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os updated (1192696069 -> cf27468602)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os in repository toolchain/ci/glibc. from 1192696069 powerpc: Remove optimized finite adds 55f82d328d aarch64: add STO_AARCH64_VARIANT_PCS and DT_AARCH64_VARIANT_PCS adds 82bc69c012 aarch64: handle STO_AARCH64_VARIANT_PCS adds a26e2e9fea Allow memset local PLT reference for powerpc soft-float. adds cf27468602 Add IPV6_ROUTER_ALERT_ISOLATE from Linux 5.1 to bits/in.h. No new revisions were added by this update. Summary of changes: ChangeLog | 22 ++++++++++++ elf/elf.h | 7 ++++ sysdeps/{mips => aarch64}/dl-dtprocnum.h | 6 ++-- sysdeps/aarch64/dl-machine.h | 42 +++++++++++++++++++--- sysdeps/aarch64/linkmap.h | 1 + sysdeps/unix/sysv/linux/bits/in.h | 1 + .../linux/powerpc/powerpc32/nofpu/localplt.data | 1 + 7 files changed, 73 insertions(+), 7 deletions(-) copy sysdeps/{mips => aarch64}/dl-dtprocnum.h (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os updated (3984c5cdfac -> 3f075e56068)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os in repository toolchain/ci/gcc. from 3984c5cdfac PR tree-optimization/89713 - Assume loop with an exit is finite adds fec050ace17 2019-06-13 Richard Biener <rguenther(a)suse.de> adds 43bbc1da377 /cp 2019-06-13 Paolo Carlini <paolo.carlini(a)oracle.com> adds 5e3e7fbe47b [ARC] Add documentation naked, ilink and firq adds 714ba8581de Revamp value_range::may_contain_p. adds 0decb67615e 2019-06-13 Richard Biener <rguenther(a)suse.de> adds b970d9709b8 * g++.dg/tree-ssa/ssa-dse-1.C: Don't match exact number of [...] adds c2174db34e0 * config/nvptx/nvptx.c (nvptx_sese_number, nvptx_sese_pseu [...] adds a9537ef0553 2019-06-13 Richard Biener <rguenther(a)suse.de> adds 7f00ec769bd PR tree-optimize/90869 * tree-ssa-alias.c (indirect_ref_m [...] adds 772f8aeaa6c testsuite - Require alias support for pr90760. adds 8b5954497b9 2019-06-13 Paolo Carlini <paolo.carlini(a)oracle.com> adds 80eb04fe59a Darwin, testsuite - Adjust two tests that fail on newer OS [...] adds 0cf6bd7db91 2019-06-13 Steven G. Kargl <kargl(a)gcc.gnu.org> adds dad2a8cf8dd 2019-06-13 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 91efeef45ed Darwin, testsuite - Fix pr71694 fail for m32. adds 8cdc2a743d1 2019-06-13 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 228d982b3f2 Darwin, Driver - Improve processing of macosx-version-min= adds 0a6c3056e8c PR tree-optimization/77820 * tree-ssa-threadedge.c (edge [...] adds 1ccd34b9a90 * config/i386/i386.md (SWIM1248s): Rename from SWIM1248x. [...] adds be20cbcfc94 * ChangeLog: Fix my last entry. adds 8a1af8348c4 PR bootstrap/90873 * tree-ssa-alias.c (indirect_ref_may_a [...] adds fa4a6ac33ea Daily bump. adds 4549e889f2d PR tree-optimization/90662 - strlen of a string in a vla pl [...] adds 3f075e56068 PR ipa/90401 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 106 +++++++++ gcc/DATESTAMP | 2 +- gcc/config/darwin-driver.c | 143 ++++++++++-- gcc/config/i386/i386-expand.c | 33 +-- gcc/config/i386/i386.md | 172 ++++++--------- gcc/config/nvptx/nvptx.c | 15 +- gcc/cp/ChangeLog | 19 ++ gcc/cp/decl.c | 75 +++---- gcc/cp/typeck2.c | 23 +- gcc/doc/extend.texi | 14 +- gcc/fortran/ChangeLog | 19 ++ gcc/fortran/dependency.c | 56 ++--- gcc/fortran/expr.c | 11 +- gcc/fortran/resolve.c | 26 +++ gcc/gimple-loop-versioning.cc | 2 +- gcc/ipa-prop.c | 239 ++++++++++++--------- gcc/testsuite/ChangeLog | 99 +++++++++ gcc/testsuite/g++.dg/cpp0x/alias-decl-1.C | 3 +- .../g++.dg/diagnostic/conflicting-specifiers-1.C | 1 + .../g++.dg/diagnostic/two-or-more-data-types-1.C | 1 + .../g++.dg/diagnostic/variably-modified-type-1.C | 12 ++ gcc/testsuite/g++.dg/ext/altivec-15.C | 2 +- gcc/testsuite/g++.dg/other/pr84792-1.C | 2 +- gcc/testsuite/g++.dg/other/pr84792-2.C | 2 +- gcc/testsuite/g++.dg/parse/error10.C | 2 +- gcc/testsuite/g++.dg/parse/error24.C | 2 +- gcc/testsuite/g++.dg/parse/error32.C | 2 +- gcc/testsuite/g++.dg/parse/error33.C | 2 +- gcc/testsuite/g++.dg/parse/pragma2.C | 3 +- gcc/testsuite/g++.dg/parse/saved1.C | 3 +- gcc/testsuite/g++.dg/pr71694.C | 1 + gcc/testsuite/g++.dg/template/operator6.C | 2 +- gcc/testsuite/g++.dg/template/pr61745.C | 3 +- gcc/testsuite/g++.dg/template/typedef41.C | 2 +- .../g++.dg/tree-ssa/alias-access-path-1.C | 24 +++ gcc/testsuite/g++.dg/tree-ssa/pr31146.C | 4 +- gcc/testsuite/g++.dg/tree-ssa/ssa-dse-1.C | 2 +- gcc/testsuite/g++.old-deja/g++.jason/crash10.C | 2 +- gcc/testsuite/gcc.dg/darwin-minversion-1.c | 2 +- gcc/testsuite/gcc.dg/darwin-minversion-2.c | 2 +- gcc/testsuite/gcc.dg/darwin-minversion-link.c | 26 +++ gcc/testsuite/gcc.dg/ipa/ipcp-agg-10.c | 78 +++++++ gcc/testsuite/gcc.dg/pr90760.c | 1 + gcc/testsuite/gcc.dg/pr90866-2.c | 24 +++ gcc/testsuite/gcc.dg/pr90866.c | 18 ++ gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-1.c | 30 +++ gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-2.c | 23 ++ gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-3.c | 25 +++ gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-4.c | 40 ++++ gcc/testsuite/gcc.dg/tree-ssa/split-path-6.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-version-1.c | 20 ++ gcc/testsuite/gcc.dg/vect/vect-version-2.c | 20 ++ gcc/testsuite/gcc.target/i386/pr90856.c | 14 ++ gcc/testsuite/gcc.target/sh/pr51244-20.c | 2 +- gcc/testsuite/gfortran.dg/pr68544.f90 | 13 ++ gcc/testsuite/gfortran.dg/pr85687.f90 | 2 +- gcc/testsuite/gfortran.dg/pr89344.f90 | 15 ++ gcc/tree-sra.c | 2 + gcc/tree-ssa-alias.c | 25 ++- gcc/tree-ssa-strlen.c | 14 +- gcc/tree-ssa-threadedge.c | 70 +++++- gcc/tree-vect-loop-manip.c | 206 +++++++++++------- gcc/tree-vectorizer.c | 6 +- gcc/tree-vectorizer.h | 2 + gcc/tree-vrp.c | 47 ++-- gcc/tree-vrp.h | 13 +- gcc/vr-values.c | 2 +- 67 files changed, 1397 insertions(+), 478 deletions(-) create mode 100644 gcc/testsuite/g++.dg/diagnostic/conflicting-specifiers-1.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/two-or-more-data-types-1.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/variably-modified-type-1.C create mode 100644 gcc/testsuite/g++.dg/tree-ssa/alias-access-path-1.C create mode 100644 gcc/testsuite/gcc.dg/darwin-minversion-link.c create mode 100644 gcc/testsuite/gcc.dg/ipa/ipcp-agg-10.c create mode 100644 gcc/testsuite/gcc.dg/pr90866-2.c create mode 100644 gcc/testsuite/gcc.dg/pr90866.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-3.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/phi_on_compare-4.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-version-1.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-version-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90856.c create mode 100644 gcc/testsuite/gfortran.dg/pr68544.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr89344.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os updated (e41d1c49a1 -> 3a3a077c4a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os in repository toolchain/ci/binutils-gdb. from e41d1c49a1 Automatic date update in version.in adds 66eb1ed388 Fix gdb build with -std=gnu++11 adds 7ccbb4437a sim/or1k: Regenerate sim adds 688cea90bc sim/common: Wire in df/di conversion adds f1cc84f594 sim/common: wire up new unordered comparisons adds b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations adds 3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction adds 57a63d27dc sim/testsuite/or1k: Add tests for unordered compares adds 4c04873103 Fix "set integer-command unlimited junk" adds f8164777cd Automatic date update in version.in adds d4b87b1eb6 PowerPC comment fixes adds e3fa7860f4 Fix alpha testsuite regression adds 3a3a077c4a Regenerate with approved autotools version No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 9 + bfd/Makefile.in | 1 - bfd/configure | 28 +- bfd/elf64-ppc.c | 10 +- bfd/version.h | 2 +- binutils/ChangeLog | 6 + binutils/Makefile.in | 9 +- binutils/aclocal.m4 | 10 +- binutils/doc/Makefile.in | 9 +- gas/ChangeLog | 6 + gas/Makefile.in | 1 - gas/configure | 28 +- gas/doc/Makefile.in | 1 - gdb/ChangeLog | 15 + gdb/cli/cli-setshow.c | 23 +- gdb/compile/compile.c | 2 +- gdb/testsuite/ChangeLog | 5 + gdb/testsuite/gdb.base/settings.exp | 11 + gdb/thread.c | 6 +- ld/ChangeLog | 12 + ld/Makefile.in | 1 - ld/configure | 28 +- ld/testsuite/ld-alpha/tlsbin.rd | 2 +- ld/testsuite/ld-alpha/tlsbinr.rd | 2 +- ld/testsuite/ld-alpha/tlspic.rd | 4 +- libctf/ChangeLog | 4 + libctf/configure | 2 +- sim/ChangeLog | 10 + sim/common/ChangeLog | 11 + sim/common/cgen-accfp.c | 49 + sim/common/cgen-fpu.h | 2 + sim/or1k/arch.c | 2 +- sim/or1k/arch.h | 2 +- sim/or1k/cpu.c | 78 +- sim/or1k/cpu.h | 174 ++- sim/or1k/cpuall.h | 2 +- sim/or1k/decode.c | 568 ++++++++-- sim/or1k/decode.h | 21 +- sim/or1k/model.c | 1456 +++++++++++++++++++++----- sim/or1k/sem-switch.c | 602 ++++++++++- sim/or1k/sem.c | 672 +++++++++++- sim/testsuite/sim/or1k/ChangeLog | 13 + sim/testsuite/sim/or1k/adrp.S | 73 ++ sim/testsuite/sim/or1k/fpu-unordered.S | 97 ++ sim/testsuite/sim/or1k/fpu64a32-unordered.S | 100 ++ sim/testsuite/sim/or1k/{fpu.S => fpu64a32.S} | 135 ++- 46 files changed, 3771 insertions(+), 533 deletions(-) create mode 100644 sim/testsuite/sim/or1k/adrp.S create mode 100644 sim/testsuite/sim/or1k/fpu-unordered.S create mode 100644 sim/testsuite/sim/or1k/fpu64a32-unordered.S copy sim/testsuite/sim/or1k/{fpu.S => fpu64a32.S} (50%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os updated (230c0a4c -> fe80980c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 230c0a4c 0: init: binutils-gcc-glibc: -5 new fe80980c 0: update: binutils-gcc-glibc: -5 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (230c0a4c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 211 +- 02-prepare_abe/console.log | 432 +- 03-build_abe-binutils/console.log | 11314 ++-- 04-build_abe-stage1/console.log | 19518 +++--- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 39457 ++++++------ 07-build_abe-stage2/console.log | 46844 +++++++------- 08-benchmark/benchmark-start.log | 2 +- 08-benchmark/benchmark.log | 17 +- 08-benchmark/console.log | 206 +- 09-check_regression/console.log | 18 +- 10-update_baseline/console.log | 16 +- console.log | 118330 +++++++++++++++++------------------ jenkins/manifest.sh | 22 +- 14 files changed, 118264 insertions(+), 118415 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (b1daec0eae6 -> d8aca8886ff)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from b1daec0eae6 [X86] Correct instruction operands in evex-to-vex-compress. [...] adds 02eac87ba3e [llvm-ar][test] Add to MRI test coverage adds 7957fc6547e [IntrinsicEmitter] Extend argument overloading with forward [...] adds 9d28473a355 [ARM][TTI] Scan for existing loop intrinsics adds 179e0fa8815 [NFC] Simplify Call query adds a78e025558b [ELF] Loosen the condition that changes absolute relocation [...] adds 49779275360 [clangd] Treat lambdas as functions when preparing hover response adds f9ad6e57d96 [clang-scan-deps] Fix -DBUILD_SHARED_LIBS=ON build adds 8d59f5370d4 Revert [llvm-ar][test] Add to MRI test coverage adds 51c2fa0e2ac Improve reduction intrinsics by overloading result value. adds 818dd8666a5 [WebAssembly] Modernize include path handling adds 95a9ee5e2f2 [OpenCL] Move OpenCLBuiltins.td and remove unused include adds 86b7f865ac5 [llvm-objcopy] Implement IHEX reader adds 848d3d0d2c4 [ARM] Refactor handling of IT mask operands. adds 181bf0cefb2 [DebugInfo] Use FrameDestroy to extend stack locations to e [...] adds 076ae0d2e2f [DebugInfo] Move Value struct out of DebugLocEntry as DbgVa [...] adds e1aea858968 [X86][SSE] Add SSE4A nt store tests on X86 as well as X64 adds 7b395133029 [llvm-nm] Additional lit tests for command line options adds a6b87aa7ee1 [X86][SSE] Add tests for underaligned nt stores adds ad17e289f0e DWARF: Don't create lldb CompileUnits for DWARF type units adds 0baf136a4d0 [X86][SSE] Avoid assert for broadcast(horiz-op()) cases for [...] adds a284f4fa7ca [X86][AVX] Add broadcast(v4f64 hadd) test adds 88e636dfc15 [Clangd] Fixed clangd diagnostics priority adds b00dbcbb43b [ThinLTO][Bitcode] Add 'entrycount' to FS_COMBINED_PROFILE. NFC adds 1fca3b1972d [AMDGPU][MC] Enabled constant expressions as operands of s_ [...] adds bf2b2f08b02 [DebugInfo] Honour variable fragments in LiveDebugValues adds 6b56ad164ce [CodeGen] Add getMachineMemOperand + MachineMemOperand::Fla [...] adds 286e1d2c2d6 [ARM] Set up infrastructure for MVE vector instructions. adds d2cd9c23b4e [NFC] Sink a function call into LiveDebugValues::process adds 407c8f1f493 Extra error checking to ARMAttributeParser adds 0eb763c5597 [lld][ELF] Add tests for bad subsection length in .ARM.attributes adds 31d68804fd4 Added AST matcher for ignoring elidable constructors adds ab240c5eee4 [clang-tidy] Fixed abseil-duration-unnecessary-conversion t [...] adds 86b510aa584 [docs][llvm-dwarfdump] Add missing options and behaviour to [...] adds 0be2d25ecc7 [FIX] Forces shrink wrapping to consider any memory access [...] adds e6820dac99a [docs][llvm-symbolizer] Fix formatting issue with --functions adds 1278a192823 Remove ';' after namespace's closing bracket [NFC] adds 757a2f13fd9 [X86] Use fresh MemOps when emitting VAARG64 adds 08a4a0e9656 Fix GCC compiler warning. NFC. adds 93f96b2be93 [clang-tidy] Made abseil-upgrade-duration-conversions tests [...] adds 8f30e322aba [CMake] Add fallbacks for copying clang-resource-headers to [...] adds 0030306555d [clang-tidy] Fixed abseil-time-subtraction to work on C++17 adds 558369b5495 [clang-tidy] Made abseil-faster-strsplit-delimiter tests pa [...] adds 3bc6e2a7aa3 [EarlyCSE] Ensure equal keys have the same hash value adds aeb89f8b33d [NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsic [...] adds 2bda177da01 [AMDGPU] ImmArg and SourceOfDivergence for permlane/dpp adds 587497b87d0 [clang][NewPM] Fix broken -O0 test from the AlwaysInliner adds ab2c0ed01ed [clang][NewPM] Fix broken profile test adds 113320d3b69 [CMake] Fix lldb-dotest for single-config generators in sta [...] adds a0781b6e3a3 [CMake] Fix generated Xcode-project ignoring output directo [...] adds 9f8ce3feb22 [clang][NewPM] Fix split debug test adds 896ece41e47 [Codegen] Merge tail blocks with no successors after block [...] adds a9d8388e80c [NFC] Updated testcase for D54411/rL363284 adds 4d93fb528ec [InstCombine] auto-generate complete test checks; NFC adds 09f56b51ec8 [clang][NewPM] Fix broken -O0 test from missing assumptions adds 34ec6929a1f PR42182: Allow thread-local to use __cxa_thread_atexit when [...] adds eb88badff96 Fix a bug w/inbounds invalidation in LFTR adds 64c1d456c1b [libc++] Add missing #include in <cwchar> tests adds 5bf7f81aa8c [InstCombine] add test for failed libfunction prototype mat [...] adds 42a3fc133d3 [LFTR] Stylistic cleanup as suggested in last review commen [...] adds c37be296342 [LFTR] Rename variable to minimize confusion [NFC] adds 4244dd5e3f9 [docs] Fix TableGen/LangRef typos adds 17965d42f42 C++ DR712 and others: handle non-odr-use resulting from an [...] adds 67d4a6d48cf [clang-tidy] Make ClangTidyCheck::OptionsView public. adds 335f9883f06 [AMDGPU] gfx1010: small test change for wave32. NFC adds ed9c7ec73df [lit] Disable test on darwin when building shared libs. adds 8bcc9bb5959 [AMDGPU] gfx1010 base changes for wave32 adds 675be5db469 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-i [...] adds 8608afa964d Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-i [...] adds 7d4e7efd2e1 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl [...] adds 21a29a9e653 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl [...] adds 48904571961 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl [...] adds ea28a063fd8 Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine- [...] adds e00198f7a87 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg [...] adds a37d925d3d8 Revert "[NFC][CodeGen] Forgot 2 unary FNeg tests in X86/fma [...] adds a0d06a626ff Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intr [...] adds 0a3fe05047e Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ an [...] adds 2aff82bfa67 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-int [...] adds d3eaa332e4a Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intr [...] adds 31da4f80d5b Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scal [...] adds d331e71bdb6 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fne [...] adds 5d9271802ba Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patt [...] adds 8984dbc27c3 Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patt [...] adds 07514a1b162 Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combine [...] adds 79ec1a29572 Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll f [...] adds 038e01dc9a7 Add a clarifying comment about branching on poison adds 24f40858118 [SimplifyCFG] NFC, update Switch tests as a baseline. adds ad81d427caa [LangRef] Clarify poison semantics adds 6b936d88a46 [dfsan] Introduce dfsan_flush(). adds 2f8c6f93626 [ORC] Rename MaterializationResponsibility resolve and emit [...] adds ccecd22db9c [AMDGPU] gfx1010 AMDGPUSetCCOp definition adds 9c6806b1641 gn build: Merge r363242 adds 901d04fc6df [Coverage] Load code coverage data from archives adds 2fa83cb7ee0 [libFuzzer] simplify the DFT trace collection using the new [...] adds a5b12be60f9 fix whitespaces adds 6e6e3af55bb [Remarks] Refactor optimization remarks setup adds 1c88445840c [MachinePiepliner] Don't check boundary node in checkValidN [...] adds cf34a2bd5d6 [X86Disassembler] Unify the EVEX and VEX code in emitContex [...] adds fb0a40f0648 [GlobalISel][IRTranslator] Add debug loc with line 0 to con [...] adds 4336a9496d4 [AMDGPU] gfx10 documentation update. NFC. adds 2ce370c9572 [libc++] Fix build with gcc 4.8 adds 0feb6e52f18 Symbolize: Remove dead code. NFCI. adds 49275272e3e Use fully qualified name when printing S_CONSTANT records adds b1027a480ac [llvm-objcopy] Fix sparc target endianness adds 0476d069e39 PR23833, DR2140: an lvalue-to-rvalue conversion on a glvalu [...] adds 347ec0faa79 [NFC] Replace a plugin header with a non-plugin header adds 68a2fef9ae5 [AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32 adds aca017e8025 Remove unused SK_LValueToRValue initialization step. adds 8a8131a3f64 [AMDGPU] gfx1010 wave32 clang support adds 1e4882c8906 [Coverage] Speculative fix for r363325 for an older compiler adds e4147ea1ef4 Revert "[Remarks] Refactor optimization remarks setup" adds c43e67bfffd [AMDGPU] gfx1011/gfx1012 targets adds cafccd7a534 [AMDGPU] gfx1011/gfx1012 clang support adds 2c074bb39e2 [Targets] Move soft-float-abi filtering to `initFeatureMap` adds 5b188f8dac0 Add REQUIRES: zlib to test added in r363325 as the profile [...] adds 4121bdc3d49 [X86] Add target triple for live-debug-values-fragments.mir adds 4129e3e0f8e DebugInfo: Include enumerators in pubnames adds d54d4f99059 [llvm-objcopy] Changed command line parsing errors adds 5b4285d82de [ELF][RISCV] Create dummy .sdata for __global_pointer$ if . [...] adds 3d02b895eda Revert 363295, it caused PR42276. Also revert follow-ups 36 [...] adds 95c9020d977 gn build: Merge r363204 (clang-scan-deps) adds e0de6002e8f [llvm-objcopy] Remove no-op flush of errs adds 5e83d8fff43 Move commentary on opcode translation for code16 mov instru [...] adds 77cc50ff7d5 Fixed typos in Log.h adds d8aca8886ff Make UniqueCStringMap work with non-default-constructible t [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/ClangTidyCheck.h | 14 +- .../abseil/DurationUnnecessaryConversionCheck.cpp | 5 +- .../abseil/FasterStrsplitDelimiterCheck.cpp | 27 +- .../clang-tidy/abseil/TimeSubtractionCheck.cpp | 51 +- .../abseil/UpgradeDurationConversionsCheck.cpp | 24 +- clang-tools-extra/clangd/Diagnostics.cpp | 20 +- clang-tools-extra/clangd/XRefs.cpp | 47 +- .../clangd/unittests/DiagnosticsTests.cpp | 13 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 80 +- .../abseil-duration-unnecessary-conversion.cpp | 3 +- .../abseil-faster-strsplit-delimiter.cpp | 2 +- .../test/clang-tidy/abseil-time-subtraction.cpp | 2 +- .../abseil-upgrade-duration-conversions.cpp | 2 +- clang/docs/ClangCommandLineReference.rst | 4 + clang/docs/LibASTMatchersReference.html | 26 + clang/include/clang/ASTMatchers/ASTMatchers.h | 38 + clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Driver/Options.td | 5 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Basic/Targets/AMDGPU.cpp | 7 + clang/lib/Basic/Targets/ARM.cpp | 33 +- clang/lib/Basic/Targets/ARM.h | 6 + clang/lib/CodeGen/BackendUtil.cpp | 15 +- clang/lib/CodeGen/CGBuiltin.cpp | 24 +- clang/lib/CodeGen/CGDebugInfo.cpp | 9 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 12 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 11 + clang/lib/Driver/ToolChains/HIP.cpp | 10 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 41 +- clang/lib/Frontend/InitHeaderSearch.cpp | 8 + clang/lib/Sema/CMakeLists.txt | 7 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- clang/test/CodeGen/arm-soft-float-abi-filtering.c | 9 + clang/test/CodeGen/builtin-movdir.c | 6 +- clang/test/CodeGen/lifetime.c | 3 +- clang/test/CodeGen/lto-newpm-pipeline.c | 2 + clang/test/CodeGen/split-debug-single-file.c | 10 +- clang/test/CodeGenCXX/cxx11-thread-local.cpp | 6 + clang/test/CodeGenOpenCL/amdgpu-features.cl | 4 + clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 12 +- clang/test/Driver/amdgpu-features.c | 6 + clang/test/Driver/amdgpu-macros.cl | 14 + clang/test/Driver/amdgpu-mcpu.cl | 4 + clang/test/Driver/wasm-toolchain.cpp | 2 + clang/test/Profile/gcc-flag-compatibility.c | 12 +- ...clang-check-mac-libcxx-fixed-compilation-db.cpp | 2 + clang/tools/clang-scan-deps/CMakeLists.txt | 1 + .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 76 +- clang/unittests/ASTMatchers/ASTMatchersTest.h | 78 +- compiler-rt/include/sanitizer/dfsan_interface.h | 6 + compiler-rt/lib/dfsan/dfsan.cc | 6 + compiler-rt/lib/dfsan/done_abilist.txt | 2 + compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp | 72 +- compiler-rt/lib/fuzzer/FuzzerFork.cpp | 19 +- compiler-rt/lib/fuzzer/dataflow/DataFlow.cpp | 120 +- compiler-rt/test/dfsan/flush.c | 28 + compiler-rt/test/fuzzer/Labels20Test.cpp | 41 + compiler-rt/test/fuzzer/OnlySomeBytesTest.cpp | 3 +- compiler-rt/test/fuzzer/dataflow.test | 100 +- libcxx/include/charconv | 2 +- .../test/std/depr/depr.c.headers/wchar_h.pass.cpp | 1 + libcxx/test/std/strings/c.strings/cwchar.pass.cpp | 1 + lld/ELF/Relocations.cpp | 8 +- lld/ELF/Symbols.cpp | 1 + lld/ELF/Symbols.h | 3 + lld/ELF/SyntheticSections.cpp | 17 + lld/ELF/SyntheticSections.h | 10 + lld/ELF/Writer.cpp | 14 +- lld/test/ELF/invalid/bad-arm-attributes.s | 8 + lld/test/ELF/invalid/bad-arm-attributes2.s | 8 + lld/test/ELF/riscv-gp-dummy-sdata.s | 25 + lld/test/ELF/riscv-gp.s | 26 + lldb/cmake/modules/LLDBFramework.cmake | 34 +- lldb/include/lldb/Core/UniqueCStringMap.h | 88 +- lldb/include/lldb/Symbol/Symtab.h | 2 +- lldb/include/lldb/Utility/Log.h | 4 +- lldb/lit/SymbolFile/DWARF/debug-types-dwarf5.s | 94 + .../lit/SymbolFile/DWARF/debug-types-line-tables.s | 17 + lldb/source/API/SBFrame.cpp | 2 +- .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.cpp | 4 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 5 + .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.h | 1 + .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 380 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 13 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 24 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h | 8 +- .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.cpp | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.h | 2 +- .../SymbolFile/DWARF/SymbolFileDWARFDwp.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwp.h | 2 +- lldb/source/Symbol/Symtab.cpp | 71 +- lldb/unittests/Core/CMakeLists.txt | 1 + lldb/unittests/Core/UniqueCStringMapTest.cpp | 53 + lldb/utils/lldb-dotest/CMakeLists.txt | 6 +- llvm/docs/AMDGPUUsage.rst | 3682 +++++++++++++------- llvm/docs/CommandGuide/llvm-cov.rst | 6 + llvm/docs/CommandGuide/llvm-dwarfdump.rst | 39 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 8 +- llvm/docs/LangRef.rst | 63 +- llvm/docs/TableGen/LangRef.rst | 4 +- llvm/include/llvm/Analysis/ValueTracking.h | 6 + llvm/include/llvm/BinaryFormat/ELF.h | 4 +- llvm/include/llvm/CodeGen/MachineFunction.h | 6 + llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 55 +- llvm/include/llvm/IR/Intrinsics.h | 28 +- llvm/include/llvm/IR/Intrinsics.td | 23 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 28 +- .../ProfileData/Coverage/CoverageMappingReader.h | 10 +- llvm/include/llvm/Support/TargetParser.h | 4 +- .../llvm/Support/X86DisassemblerDecoderCommon.h | 36 +- llvm/lib/Analysis/ValueTracking.cpp | 18 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 9 +- .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h | 178 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 22 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 8 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 5 + llvm/lib/CodeGen/BranchFolding.cpp | 38 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 17 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 282 +- llvm/lib/CodeGen/MachineFunction.cpp | 9 + llvm/lib/CodeGen/MachinePipeliner.cpp | 5 + llvm/lib/CodeGen/ShrinkWrap.cpp | 9 + .../DebugInfo/Symbolize/SymbolizableObjectFile.cpp | 16 +- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 1 - llvm/lib/ExecutionEngine/Orc/Core.cpp | 17 +- llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 4 +- llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp | 4 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 4 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 4 +- llvm/lib/IR/Function.cpp | 140 +- llvm/lib/IR/IRBuilder.cpp | 2 +- llvm/lib/IR/Verifier.cpp | 12 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 2 + llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | 11 +- .../ProfileData/Coverage/CoverageMappingReader.cpp | 196 +- llvm/lib/Support/ARMAttributeParser.cpp | 6 + llvm/lib/Support/TargetParser.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 52 + llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 2 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 4 +- llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td | 5 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 12 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 14 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 221 +- llvm/lib/Target/AMDGPU/GCNProcessors.td | 8 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 +- llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 44 +- llvm/lib/Target/AMDGPU/SIDefines.h | 5 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 32 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 + llvm/lib/Target/AMDGPU/SIInstructions.td | 25 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 32 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 85 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 45 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 89 + llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 17 + llvm/lib/Target/AMDGPU/VOPCInstructions.td | 23 + llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 15 + llvm/lib/Target/ARM/ARMInstrFormats.td | 80 + llvm/lib/Target/ARM/ARMInstrMVE.td | 363 ++ llvm/lib/Target/ARM/ARMInstrThumb2.td | 1 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 4 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 12 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 38 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 564 ++- .../Target/ARM/Disassembler/ARMDisassembler.cpp | 316 +- .../lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp | 33 +- llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h | 6 + .../Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 107 +- llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h | 15 + llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 24 + llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 4 +- .../X86/Disassembler/X86DisassemblerDecoder.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 38 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 10 +- llvm/lib/Transforms/IPO/AlwaysInliner.cpp | 13 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 7 +- llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 174 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 123 +- .../Analysis/CostModel/AArch64/vector-reduce.ll | 174 +- .../Analysis/CostModel/X86/reduce-add-widen.ll | 400 +-- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 400 +-- .../Analysis/CostModel/X86/reduce-and-widen.ll | 508 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 508 +-- .../Analysis/CostModel/X86/reduce-mul-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 440 +-- .../test/Analysis/CostModel/X86/reduce-or-widen.ll | 508 +-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 508 +-- .../Analysis/CostModel/X86/reduce-smax-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 420 +-- .../Analysis/CostModel/X86/reduce-smin-widen.ll | 402 +-- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 420 +-- .../Analysis/CostModel/X86/reduce-umax-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 420 +-- .../Analysis/CostModel/X86/reduce-umin-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 420 +-- .../Analysis/CostModel/X86/reduce-xor-widen.ll | 540 +-- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 540 +-- .../DivergenceAnalysis/AMDGPU/intrinsics.ll | 40 + .../CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll | 74 + llvm/test/CodeGen/AArch64/aarch64-addv.ll | 24 +- llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll | 92 +- llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll | 1082 ++++-- llvm/test/CodeGen/AArch64/arm64-vabs.ll | 12 +- llvm/test/CodeGen/AArch64/branch-relax-cbz.ll | 42 +- .../dont-shrink-wrap-stack-mayloadorstore.mir | 229 ++ llvm/test/CodeGen/AArch64/taildup-cfi.ll | 2 +- .../CodeGen/AArch64/vecreduce-add-legalization.ll | 58 +- .../CodeGen/AArch64/vecreduce-and-legalization.ll | 58 +- llvm/test/CodeGen/AArch64/vecreduce-bool.ll | 48 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 28 +- .../AArch64/vecreduce-propagate-sd-flags.ll | 4 +- .../CodeGen/AArch64/vecreduce-umax-legalization.ll | 58 +- llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll | 4 +- llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll | 4 + llvm/test/CodeGen/AMDGPU/fdot2.ll | 19 +- llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir | 2 +- llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll | 4 + llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll | 20 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll | 10 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot2.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot4.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot8.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot4.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot8.ll | 6 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 36 +- .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 66 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 8 +- llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 32 +- .../CodeGen/AMDGPU/si-annotate-cf-unreachable.ll | 4 +- .../AMDGPU/si-annotatecfg-multiple-backedges.ll | 12 +- llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll | 229 +- llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll | 1601 +++++++-- .../Generic/expand-experimental-reductions.ll | 44 +- .../test/CodeGen/PowerPC/BreakableToken-reduced.ll | 4 +- .../CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll | 3 +- llvm/test/CodeGen/PowerPC/licm-tocReg.ll | 4 +- .../CodeGen/PowerPC/ppc64-sibcall-shrinkwrap.ll | 6 +- llvm/test/CodeGen/PowerPC/sms-simple.ll | 78 + .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 4 +- llvm/test/CodeGen/Thumb/thumb-shrink-wrapping.ll | 1642 +++++++-- llvm/test/CodeGen/Thumb2/v8_IT_3.ll | 4 +- llvm/test/CodeGen/WinEH/wineh-noret-cleanup.ll | 7 +- .../CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 2 +- llvm/test/CodeGen/X86/MachineSink-eflags.ll | 9 +- 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llvm/utils/TableGen/IntrinsicEmitter.cpp | 78 +- llvm/utils/TableGen/X86DisassemblerTables.cpp | 74 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 8 - llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 8 +- llvm/utils/gn/secondary/clang/test/BUILD.gn | 1 + .../secondary/clang/tools/clang-scan-deps/BUILD.gn | 20 + llvm/utils/lit/lit/llvm/config.py | 2 + 434 files changed, 24470 insertions(+), 17957 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 clang/test/CodeGen/arm-soft-float-abi-filtering.c create mode 100644 compiler-rt/test/dfsan/flush.c create mode 100644 compiler-rt/test/fuzzer/Labels20Test.cpp create mode 100644 lld/test/ELF/invalid/bad-arm-attributes.s create mode 100644 lld/test/ELF/invalid/bad-arm-attributes2.s create mode 100644 lld/test/ELF/riscv-gp-dummy-sdata.s create mode 100644 lld/test/ELF/riscv-gp.s create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-dwarf5.s create mode 100644 lldb/unittests/Core/UniqueCStringMapTest.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll create mode 100644 llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir create mode 100644 llvm/test/CodeGen/PowerPC/sms-simple.ll create mode 100644 llvm/test/CodeGen/X86/nontemporal-3.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir create mode 100644 llvm/test/MC/AMDGPU/gfx1011_dlops.s create mode 100644 llvm/test/MC/AMDGPU/gfx1011_err.s create mode 100644 llvm/test/MC/AMDGPU/xdl-insts-gfx1011-gfx1012.s create mode 100644 llvm/test/MC/ARM/mve-minmax.s create mode 100644 llvm/test/MC/ARM/mve-reductions.s create mode 100644 llvm/test/MC/ARM/mve-vpt.s create mode 100644 llvm/test/MC/Disassembler/AMDGPU/gfx1011_dasm_dlops.txt create mode 100644 llvm/test/MC/Disassembler/AMDGPU/xdl-insts-gfx1011-gfx1012.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-minmax.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-reductions.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-vpt.txt create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives/obj1.c create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives/obj2.c create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/Inputs/universal_bin_wrapping_archives [...] create mode 100644 llvm/test/tools/llvm-cov/universal_bin_wrapping_archives.test rename llvm/test/tools/llvm-nm/X86/{sysv-i386.test => format-sysv-32-bit.test} (89%) create mode 100644 llvm/test/tools/llvm-nm/X86/format-sysv-64-bit.test create mode 100644 llvm/test/tools/llvm-nm/X86/macho-format-sysv.test create mode 100644 llvm/test/tools/llvm-nm/X86/portability.test delete mode 100644 llvm/test/tools/llvm-nm/X86/posixELF.test delete mode 100644 llvm/test/tools/llvm-nm/X86/sysv-x86_64.test create mode 100644 llvm/test/tools/llvm-nm/debug-syms.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-binding.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-layout.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-section.test create mode 100644 llvm/test/tools/llvm-nm/format-sysv-type.test create mode 100644 llvm/test/tools/llvm-nm/no-sort.test create mode 100644 llvm/test/tools/llvm-nm/numeric-sort.test create mode 100644 llvm/test/tools/llvm-nm/print-filename.test create mode 100644 llvm/test/tools/llvm-nm/print-size.test create mode 100644 llvm/test/tools/llvm-nm/undefined-only.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/Inputs/sections.hex create mode 100644 llvm/test/tools/llvm-objcopy/ELF/ihex-reader.test create mode 100644 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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (f6e6f8b0 -> b788eddd)

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