Tcwg-commits June 2019

tcwg-commits@lists.linaro.org

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15913 discussions

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (fcffc2faccf -> 2dda1ff0380)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from fcffc2faccf [X86] CombineShuffleWithExtract - handle cases with differe [...] adds d14389c0a55 [x86] split 256-bit vector selects if operands are vector concats adds 9ff09d49dae [analyzer][NFC] Tease apart and clang-format NoStoreFuncVisitor adds 33b46a6df0b [analyzer] Track indices of arrays adds c8d88ad1a91 [CodeGenPrepare][x86] shift both sides of a vector select w [...] adds e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] adds 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209) adds 9f2f1270096 [X86] Add TB_NO_REVERSE to some folding table entries where [...] adds 13de174b4c4 [llvm-objcopy] Add elf32-sparc and elf32-sparcel target adds 4f157320676 [yaml2obj][MachO] Don't fill dummy data for virtual sections adds 1d1cf30b738 PowerPC: Optimize SPE double parameter calling setup adds ee62c40eae9 [SimplifyCFG] Fix prof branch_weights MD while removing unr [...] adds a71ce4f1e8e DWARF: Avoid storing DIERefs in long-lived containers adds a9e5d2f35dd Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFrom [...] adds 966f4e874e0 [ARM] Extract some code from ARMConstantIslandPass adds f7c0b3aeb22 [ARM] Add ARMBasicBlockInfo.cpp adds a059efa885f [ARM] Remove ARMComputeBlockSize adds 5d6ee76c163 Describe stack-id as an enum adds 89d6905c595 [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off [...] adds 4bde5d3c081 [ARM] Fix another -Wunused-variable in -DLLVM_ENABLE_ASSERT [...] adds 43cf5ae48a0 [lldb] [test] Skip watchpoint tests on NetBSD if userdbregs [...] adds 25a043e78a9 [NFC][Codegen] Standalone tests for icmp eq/ne (urem %x, C) [...] adds ac14f7b10cf [lit] Delete empty lines at the end of lit.local.cfg NFC adds 46f9cbe28d4 [llvm-objdump] Use %08 instead of %016 to print leading add [...] adds 60d6fb2a634 [SCEV] Use NoWrapFlags when expanding a simple mul adds 9d81915fcaa Recommit [OpenCL] Move OpenCLBuiltins.td and remove unused include adds ef78e55205e [SelectionDAG] Fold insert_subvector(undef, extract_subvect [...] adds 5401c2db6ee Fix clang -Wcovered-switch-default after stack-id change by D60137 adds 2e46312ffd1 [DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting adds d5323f6a707 [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto adds 74ac20158a0 Test forward references in IntrinsicEmitter on Neon LD(2|3|4) adds 83773b77a5a [LV] Deny irregular types in interleavedAccessCanBeWidened adds 37b75336823 Promote -fdebug-compilation-dir from a cc1 flag to clang an [...] adds d2aab283e25 gn build: Merge r363530 adds 582f2692945 AsmPrinter: add doc-string for EmitLinkage adds d3d2edf901d [lldb] [test] Watchpoint tests can be always run as root on NetBSD adds f1e2827170b [X86][SSE] Avoid unnecessary stack codegen in NT store code [...] adds e40f879eb2c [HIP] Add the interface deriving the stub name of device kernels. adds d53027697ca [clangd] Detect C++ for extension-less source files in vsco [...] new 7dc917603be [clangd] Bump vscode-clangd v0.0.15. new 1bd3d00e7e5 [CodeGen] Check for HardwareLoop Latch ExitBlock new 2dda1ff0380 Fix a '>= 0' test on unsigned that I inadvertantly introduc [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clangd/clients/clangd-vscode/package.json | 6 +- clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ReleaseNotes.rst | 2 +- clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Driver/Options.td | 11 +- clang/lib/CodeGen/CGCUDANV.cpp | 26 +- clang/lib/CodeGen/CGCUDARuntime.h | 5 + clang/lib/CodeGen/CodeGenModule.cpp | 10 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 +- clang/lib/Sema/CMakeLists.txt | 8 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 729 +++++++++++---------- .../Analysis/diagnostics/track_subexpressions.cpp | 64 ++ .../inlining/placement-new-fp-suppression.cpp | 3 +- clang/test/CodeGenCXX/nrvo.cpp | 1 - clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/Driver/cl-options.c | 1 + clang/test/Driver/clang_f_opts.c | 6 +- libcxx/src/locale.cpp | 2 +- libunwind/src/UnwindRegistersRestore.S | 11 +- lld/test/ELF/arm-thunk-multipass-plt.s | 14 +- lld/test/ELF/arm-tls-gd32.s | 2 +- lld/test/ELF/gnu-ifunc-noplt-i386.s | 12 +- lld/test/ELF/ppc32-call-stub-nopic.s | 2 +- lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lldb/packages/Python/lldbsuite/test/dotest.py | 27 + lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 4 - .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 70 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 16 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 18 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 19 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 20 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/MC/MCExpr.h | 2 + llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 58 +- llvm/lib/CodeGen/HardwareLoops.cpp | 16 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 9 + llvm/lib/CodeGen/MIRPrinter.cpp | 5 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 22 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 66 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 + llvm/lib/MC/MCExpr.cpp | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIDefines.h | 7 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 135 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 229 +++++-- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 ++- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 ++- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/ARM/ARM.h | 5 - llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 146 +++++ llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 48 ++ llvm/lib/Target/ARM/ARMComputeBlockSize.cpp | 80 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 158 ++--- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 4 - llvm/lib/Target/ARM/CMakeLists.txt | 2 +- llvm/lib/Target/PowerPC/PPCCallingConv.cpp | 54 ++ llvm/lib/Target/PowerPC/PPCCallingConv.td | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 119 ++-- llvm/lib/Target/PowerPC/PPCISelLowering.h | 17 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 12 + llvm/lib/Target/PowerPC/PPCInstrSPE.td | 12 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 36 + llvm/lib/Target/X86/X86InstrFoldTables.cpp | 18 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 38 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 7 + llvm/test/Analysis/CostModel/ARM/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/PowerPC/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/RISCV/lit.local.cfg | 1 - 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.../MIR/ARM/live-debug-values-reg-copy.mir | 8 +- llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir | 6 +- llvm/test/DebugInfo/MIR/Mips/lit.local.cfg | 1 - .../MIR/Mips/live-debug-values-reg-copy.mir | 8 +- .../DebugInfo/MIR/X86/dbg-stack-value-range.mir | 4 +- llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir | 2 +- llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir | 16 +- .../MIR/X86/live-debug-values-reg-copy.mir | 6 +- .../MIR/X86/live-debug-values-restore.mir | 14 +- llvm/test/DebugInfo/MIR/lit.local.cfg | 1 - llvm/test/DebugInfo/SystemZ/lit.local.cfg | 1 - llvm/test/DebugInfo/X86/debug-loc-asan.mir | 22 +- llvm/test/DebugInfo/X86/debug-loc-offset.mir | 14 +- llvm/test/DebugInfo/X86/dw_op_minus.mir | 4 +- llvm/test/DebugInfo/X86/live-debug-vars-dse.mir | 2 +- llvm/test/DebugInfo/X86/pr19307.mir | 10 +- llvm/test/DebugInfo/X86/prolog-params.mir | 8 +- .../test/ExecutionEngine/JITLink/X86/lit.local.cfg | 1 - .../RuntimeDyld/AArch64/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/ARM/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/Mips/lit.local.cfg | 1 - .../RuntimeDyld/PowerPC/lit.local.cfg | 1 - .../RuntimeDyld/SystemZ/lit.local.cfg | 1 - .../ExecutionEngine/RuntimeDyld/X86/lit.local.cfg | 1 - .../AddressSanitizer/X86/lit.local.cfg | 1 - .../InstrProfiling/X86/lit.local.cfg | 1 - llvm/test/JitListener/lit.local.cfg | 1 - llvm/test/MC/ARM/AlignedBundling/lit.local.cfg | 1 - llvm/test/MC/ARM/lit.local.cfg | 1 - llvm/test/MC/AVR/lit.local.cfg | 1 - llvm/test/MC/AsmParser/lit.local.cfg | 1 - llvm/test/MC/BPF/lit.local.cfg | 1 - llvm/test/MC/COFF/ARM/lit.local.cfg | 1 - llvm/test/MC/COFF/cv-loc-unreachable-2.s | 2 +- llvm/test/MC/COFF/cv-loc-unreachable.s | 2 +- llvm/test/MC/COFF/lit.local.cfg | 1 - llvm/test/MC/Disassembler/AArch64/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/ARM/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Lanai/lit.local.cfg | 1 - llvm/test/MC/Disassembler/MSP430/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Mips/lit.local.cfg | 1 - llvm/test/MC/Disassembler/PowerPC/lit.local.cfg | 1 - llvm/test/MC/Disassembler/RISCV/lit.local.cfg | 1 - llvm/test/MC/Disassembler/Sparc/lit.local.cfg | 1 - llvm/test/MC/Disassembler/SystemZ/lit.local.cfg | 1 - .../test/MC/Disassembler/WebAssembly/lit.local.cfg | 1 - llvm/test/MC/Disassembler/X86/lit.local.cfg | 1 - llvm/test/MC/ELF/lit.local.cfg | 1 - llvm/test/MC/Hexagon/lit.local.cfg | 1 - llvm/test/MC/Lanai/lit.local.cfg | 1 - llvm/test/MC/MSP430/lit.local.cfg | 1 - llvm/test/MC/MachO/AArch64/lit.local.cfg | 1 - llvm/test/MC/MachO/ARM/lit.local.cfg | 1 - llvm/test/MC/MachO/lit.local.cfg | 1 - llvm/test/MC/Mips/lit.local.cfg | 1 - llvm/test/MC/RISCV/lit.local.cfg | 1 - llvm/test/MC/Sparc/lit.local.cfg | 1 - llvm/test/MC/X86/AlignedBundling/lit.local.cfg | 1 - llvm/test/Object/X86/lit.local.cfg | 1 - llvm/test/ObjectYAML/MachO/virtual_section.yaml | 226 +++++++ llvm/test/Other/X86/lit.local.cfg | 1 - llvm/test/ThinLTO/X86/lit.local.cfg | 1 - .../Transforms/ArgumentPromotion/X86/lit.local.cfg | 1 - .../Transforms/AtomicExpand/AArch64/lit.local.cfg | 1 - .../test/Transforms/AtomicExpand/ARM/lit.local.cfg | 1 - .../Transforms/CodeExtractor/X86/lit.local.cfg | 1 - .../CodeGenPrepare/AArch64/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/AMDGPU/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/ARM/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/lit.local.cfg | 1 - .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 49 +- .../ConstantHoisting/PowerPC/lit.local.cfg | 1 - .../Transforms/ConstantHoisting/X86/lit.local.cfg | 1 - .../Transforms/DivRemPairs/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/DivRemPairs/X86/lit.local.cfg | 1 - .../test/Transforms/ExpandMemCmp/X86/lit.local.cfg | 1 - .../Transforms/GlobalOpt/PowerPC/lit.local.cfg | 1 - .../Transforms/HardwareLoops/ARM/lit.local.cfg | 1 - .../test/Transforms/HardwareLoops/ARM/structure.ll | 76 +++ .../HardwareLoops/unconditional-latch.ll | 46 ++ .../test/Transforms/HotColdSplit/X86/lit.local.cfg | 1 - .../InferAddressSpaces/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/Inline/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/Inline/X86/lit.local.cfg | 1 - .../Transforms/InstCombine/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../LoadStoreVectorizer/AMDGPU/lit.local.cfg | 1 - .../LoadStoreVectorizer/NVPTX/lit.local.cfg | 1 - .../LoadStoreVectorizer/X86/lit.local.cfg | 1 - .../test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopIdiom/X86/lit.local.cfg | 1 - .../LoopIdiom/X86/unordered-atomic-memcpy.ll | 8 +- llvm/test/Transforms/LoopIdiom/basic.ll | 12 +- .../LoopIdiom/memcpy-debugify-remarks.ll | 2 +- llvm/test/Transforms/LoopReroll/basic.ll | 2 +- llvm/test/Transforms/LoopReroll/complex_reroll.ll | 2 +- llvm/test/Transforms/LoopReroll/nonconst_lb.ll | 4 +- llvm/test/Transforms/LoopReroll/ptrindvar.ll | 2 +- .../LoopStrengthReduce/2011-10-06-ReusePhi.ll | 4 +- .../LoopStrengthReduce/AMDGPU/lit.local.cfg | 1 - .../LoopStrengthReduce/ARM/lit.local.cfg | 1 - .../LoopStrengthReduce/X86/lit.local.cfg | 1 - .../LoopStrengthReduce/post-inc-icmpzero.ll | 2 +- .../Transforms/LoopUnroll/AArch64/lit.local.cfg | 1 - .../Transforms/LoopUnroll/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/ARM/lit.local.cfg | 1 - .../Transforms/LoopUnroll/Hexagon/lit.local.cfg | 1 - .../Transforms/LoopUnroll/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/AArch64/lit.local.cfg | 1 - .../Transforms/LoopVectorize/ARM/lit.local.cfg | 1 - .../Transforms/LoopVectorize/PowerPC/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/lit.local.cfg | 1 - .../X86/x86_fp80-interleaved-access.ll | 29 + llvm/test/Transforms/PGOProfile/X86/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/AMDGPU/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/SystemZ/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/X86/lit.local.cfg | 1 - .../Transforms/SafeStack/AArch64/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/ARM/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/X86/lit.local.cfg | 1 - .../AMDGPU/lit.local.cfg | 1 - .../SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/SPARC/lit.local.cfg | 1 - llvm/test/Transforms/SimplifyCFG/X86/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/sink-common-code.ll | 44 ++ llvm/test/Transforms/SimplifyCFG/switch-profmd.ll | 35 + .../Transforms/StackProtector/X86/lit.local.cfg | 1 - .../ThinLTOBitcodeWriter/x86/lit.local.cfg | 1 - .../intrinsic-arg-overloading-struct-ret.ll | 79 +++ llvm/test/tools/dsymutil/ARM/lit.local.cfg | 1 - llvm/test/tools/llvm-lib/lit.local.cfg | 1 - llvm/test/tools/llvm-lto2/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mc/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/SystemZ/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/lit.local.cfg | 1 - .../tools/llvm-objcopy/ELF/cross-arch-headers.test | 12 + llvm/test/tools/llvm-objdump/Mips/lit.local.cfg | 1 - .../tools/llvm-objdump/PowerPC/branch-offset.s | 4 +- .../tools/llvm-objdump/X86/print-symbol-addr.s | 35 +- llvm/test/tools/llvm-readobj/AArch64/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/ARM/lit.local.cfg | 1 - llvm/tools/llvm-objcopy/CopyConfig.cpp | 3 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 13 +- llvm/tools/yaml2obj/yaml2macho.cpp | 18 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 2 +- 398 files changed, 4207 insertions(+), 2318 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp delete mode 100644 llvm/lib/Target/ARM/ARMComputeBlockSize.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll create mode 100644 llvm/test/CodeGen/RISCV/split-offsets.ll create mode 100644 llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-co [...] create mode 100644 llvm/test/ObjectYAML/MachO/virtual_section.yaml create mode 100644 llvm/test/Transforms/HardwareLoops/unconditional-latch.ll create mode 100644 llvm/test/Transforms/LoopVectorize/X86/x86_fp80-interleaved-access.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/switch-profmd.ll create mode 100644 llvm/test/Verifier/intrinsic-arg-overloading-struct-ret.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (6ae85fe5 -> b0a8a6e5)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 6ae85fe5 0: update: llvm-linux: all new b0a8a6e5 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (6ae85fe5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 219 +- 02-build_llvm/console.log | 11827 +++++++++++++++++----------------- 03-build_linux/console.log | 822 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 25 - console.log | 12901 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 8 files changed, 12881 insertions(+), 12931 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (5f13aa40626 -> 14dc077c204)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5f13aa40626 [CodeGen] Check for HardwareLoop Latch ExitBlock new b6ebfc02b31 AMDGPU: Cleanup custom PseudoSourceValue definitions new baa4b8244b7 AMDGPU/GlobalISel: Fix default mapping for non-register operands new 14dc077c204 AMDGPU: Mark exp/exp.compr as inaccessiblememonly The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/IR/IntrinsicsAMDGPU.td | 4 +-- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 6 +++- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 39 +++++++++++++--------- .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 38 +++++++++++---------- 4 files changed, 51 insertions(+), 36 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[gcc] branch master updated (665de37f600 -> c81ddee1c5a)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 665de37f600 Improve PR64242 testcase new c830e807d3f * tree-ssa-alias.c (aliasing_component_refs_p): Consider o [...] new c81ddee1c5a [PR c++/90754] name lookup ICE The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 6 ++++++ gcc/cp/ChangeLog | 6 ++++++ gcc/cp/name-lookup.c | 18 ++++++++-------- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/g++.dg/lookup/pr90754.C | 11 ++++++++++ gcc/tree-ssa-alias.c | 39 ++++++++++++++++++++--------------- 6 files changed, 59 insertions(+), 26 deletions(-) create mode 100644 gcc/testsuite/g++.dg/lookup/pr90754.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (e01e060fe00d -> 9e0babf2c06c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/linux. from e01e060fe00d Merge tag 'platform-drivers-x86-v5.2-3' of git://git.infra [...] adds f3c74b38a55a RAS/CEC: Fix binary search function adds 0ade0b6240c4 RAS/CEC: Convert the timer callback to a workqueue adds f763cf8e47d3 Merge branch 'ras-urgent-for-linus' of git://git.kernel.or [...] adds cda03a9a7be6 clocksource/drivers/timer-ti-dm: Change to new style declaration adds 5d6168fc61b7 clocksource/drivers/arm_arch_timer: Don't trace count read [...] adds 6cb3dd75b00e Merge tag 'timers-v5.2-rc1' of https://git.linaro.org/peop [...] adds e3ff9c3678b4 timekeeping: Repair ktime_get_coarse*() granularity adds efba92d58fa3 Merge branch 'timers-urgent-for-linus' of git://git.kernel [...] adds 8e41f8726dcf mm/vmalloc: Fix calculation of direct map addr range adds 31e67340cc65 mm/vmalloc: Avoid rare case of flushing TLB with weird arguments adds e35faeb64146 x86/CPU: Add more Icelake model numbers adds b81ff1013eb8 x86/fpu: Use fault_in_pages_writeable() for pre-faulting adds 00e5a2bbcc31 x86/mm/KASLR: Compute the size of the vmemmap section properly adds aab8445c4e1c x86/fpu: Update kernel's FPU state before using for the fs [...] adds 87d3aa28f345 x86/resctrl: Don't stop walking closids when a locksetup g [...] adds c7563e62a6d7 x86/resctrl: Prevent NULL pointer dereference when local M [...] adds 71ab8323cc35 x86/kgdb: Return 0 from kgdb_arch_set_breakpoint() adds 8d3289f2fa1e x86/fpu: Don't use current->mm to check for a kthread adds f3176ec9420d x86/kasan: Fix boot with 5-level paging and KASAN adds 78f4e932f776 x86/microcode, cpuhotplug: Add a microcode loader CPU hotp [...] adds 963172d9c7e8 Merge branch 'x86-urgent-for-linus' of git://git.kernel.or [...] adds 9e0babf2c06c Linux 5.2-rc5 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/x86/include/asm/fpu/internal.h | 6 +-- arch/x86/include/asm/intel-family.h | 3 ++ arch/x86/kernel/cpu/microcode/core.c | 2 +- arch/x86/kernel/cpu/resctrl/monitor.c | 3 ++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 7 ++- arch/x86/kernel/fpu/core.c | 2 +- arch/x86/kernel/fpu/signal.c | 16 +++---- arch/x86/kernel/kgdb.c | 2 +- arch/x86/mm/kasan_init_64.c | 2 +- arch/x86/mm/kaslr.c | 11 ++++- drivers/clocksource/arm_arch_timer.c | 8 ++-- drivers/clocksource/timer-ti-dm.c | 2 +- drivers/ras/cec.c | 80 ++++++++++++++++++---------------- include/linux/cpuhotplug.h | 1 + kernel/time/timekeeping.c | 5 ++- mm/vmalloc.c | 14 +++--- 17 files changed, 96 insertions(+), 70 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (fcffc2faccf -> d53027697ca)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project. from fcffc2faccf [X86] CombineShuffleWithExtract - handle cases with differe [...] adds d14389c0a55 [x86] split 256-bit vector selects if operands are vector concats adds 9ff09d49dae [analyzer][NFC] Tease apart and clang-format NoStoreFuncVisitor adds 33b46a6df0b [analyzer] Track indices of arrays adds c8d88ad1a91 [CodeGenPrepare][x86] shift both sides of a vector select w [...] adds e20b388e2f9 [analyzer] Push correct version of 'Track indices of arrays' adds 52500216727 [AMDGPU] gfx10 conditional registers handling adds 490e83cd438 AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load [...] adds 4d4ef2a1671 [analyzer] ReturnVisitor: more portable test case adds 6d71be4e67e AMDGPU: Be explicit about whether the high-word in SI_PC_AD [...] adds 41abf2766e2 AMDGPU: Prepare for explicit absolute relocations in code g [...] adds 3a92aa29992 [docs] Fix a few problems with clang-tool docs to get the b [...] adds 2da0b89d92f [AsmPrinter] Make EmitLinkage and EmitVisibility public adds 9d8c94dfd76 [docs] Fix another bot warning by adding a blank line to se [...] adds 9b2d96024ae [docs] Fix another bot error by setting highlight language [...] adds 5a663bd77ac [InstSimplify] Fix addo/subo undef folds (PR42209) adds 9f2f1270096 [X86] Add TB_NO_REVERSE to some folding table entries where [...] adds 13de174b4c4 [llvm-objcopy] Add elf32-sparc and elf32-sparcel target adds 4f157320676 [yaml2obj][MachO] Don't fill dummy data for virtual sections adds 1d1cf30b738 PowerPC: Optimize SPE double parameter calling setup adds ee62c40eae9 [SimplifyCFG] Fix prof branch_weights MD while removing unr [...] adds a71ce4f1e8e DWARF: Avoid storing DIERefs in long-lived containers adds a9e5d2f35dd Re-commit r357452 (take 3): "SimplifyCFG SinkCommonCodeFrom [...] adds 966f4e874e0 [ARM] Extract some code from ARMConstantIslandPass adds f7c0b3aeb22 [ARM] Add ARMBasicBlockInfo.cpp adds a059efa885f [ARM] Remove ARMComputeBlockSize adds 5d6ee76c163 Describe stack-id as an enum adds 89d6905c595 [ARM] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off [...] adds 4bde5d3c081 [ARM] Fix another -Wunused-variable in -DLLVM_ENABLE_ASSERT [...] adds 43cf5ae48a0 [lldb] [test] Skip watchpoint tests on NetBSD if userdbregs [...] adds 25a043e78a9 [NFC][Codegen] Standalone tests for icmp eq/ne (urem %x, C) [...] adds ac14f7b10cf [lit] Delete empty lines at the end of lit.local.cfg NFC adds 46f9cbe28d4 [llvm-objdump] Use %08 instead of %016 to print leading add [...] adds 60d6fb2a634 [SCEV] Use NoWrapFlags when expanding a simple mul adds 9d81915fcaa Recommit [OpenCL] Move OpenCLBuiltins.td and remove unused include adds ef78e55205e [SelectionDAG] Fold insert_subvector(undef, extract_subvect [...] adds 5401c2db6ee Fix clang -Wcovered-switch-default after stack-id change by D60137 adds 2e46312ffd1 [DAGCombiner] [CodeGenPrepare] More comprehensive GEP splitting adds d5323f6a707 [libunwind][AArch64] Fix libunwind::Registers_arm64::jumpto adds 74ac20158a0 Test forward references in IntrinsicEmitter on Neon LD(2|3|4) adds 83773b77a5a [LV] Deny irregular types in interleavedAccessCanBeWidened adds 37b75336823 Promote -fdebug-compilation-dir from a cc1 flag to clang an [...] adds d2aab283e25 gn build: Merge r363530 adds 582f2692945 AsmPrinter: add doc-string for EmitLinkage adds d3d2edf901d [lldb] [test] Watchpoint tests can be always run as root on NetBSD adds f1e2827170b [X86][SSE] Avoid unnecessary stack codegen in NT store code [...] adds e40f879eb2c [HIP] Add the interface deriving the stub name of device kernels. new d53027697ca [clangd] Detect C++ for extension-less source files in vsco [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../clangd/clients/clangd-vscode/package.json | 4 + clang-tools-extra/docs/ReleaseNotes.rst | 5 +- .../clang-tidy/checks/android-cloexec-pipe.rst | 1 + .../cppcoreguidelines-pro-type-member-init.rst | 1 + clang/docs/ReleaseNotes.rst | 2 +- clang/include/clang/Basic/CMakeLists.txt | 6 - clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Driver/Options.td | 11 +- clang/lib/CodeGen/CGCUDANV.cpp | 26 +- clang/lib/CodeGen/CGCUDARuntime.h | 5 + clang/lib/CodeGen/CodeGenModule.cpp | 10 +- clang/lib/Driver/ToolChains/Clang.cpp | 9 +- clang/lib/Sema/CMakeLists.txt | 8 + .../clang/Basic => lib/Sema}/OpenCLBuiltins.td | 0 clang/lib/Sema/SemaLookup.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 729 +++++++++++---------- .../Analysis/diagnostics/track_subexpressions.cpp | 64 ++ .../inlining/placement-new-fp-suppression.cpp | 3 +- clang/test/CodeGenCXX/nrvo.cpp | 1 - clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/Driver/cl-options.c | 1 + clang/test/Driver/clang_f_opts.c | 6 +- libunwind/src/UnwindRegistersRestore.S | 11 +- lld/test/ELF/arm-thunk-multipass-plt.s | 14 +- lld/test/ELF/arm-tls-gd32.s | 2 +- lld/test/ELF/gnu-ifunc-noplt-i386.s | 12 +- lld/test/ELF/ppc32-call-stub-nopic.s | 2 +- lld/test/ELF/ppc32-call-stub-pic.s | 2 +- lldb/packages/Python/lldbsuite/test/dotest.py | 27 + lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 4 - .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 2 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 70 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 +- llvm/include/llvm/CodeGen/AsmPrinter.h | 16 +- llvm/include/llvm/CodeGen/MIRYamlMapping.h | 18 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 19 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 20 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 +- llvm/include/llvm/MC/MCExpr.h | 2 + llvm/lib/Analysis/InstructionSimplify.cpp | 19 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 58 +- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 9 + llvm/lib/CodeGen/MIRPrinter.cpp | 5 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 4 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 22 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 66 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 + llvm/lib/MC/MCExpr.cpp | 4 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SIDefines.h | 7 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 2 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 135 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 6 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 229 +++++-- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 9 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 7 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 81 ++- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 68 +- llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 87 ++- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 51 +- llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 5 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 29 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 15 + llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 25 +- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 50 +- llvm/lib/Target/AMDGPU/SMInstructions.td | 14 +- llvm/lib/Target/ARM/ARM.h | 5 - llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp | 146 +++++ llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 48 ++ llvm/lib/Target/ARM/ARMComputeBlockSize.cpp | 80 --- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 158 ++--- llvm/lib/Target/ARM/CMakeLists.txt | 2 +- llvm/lib/Target/PowerPC/PPCCallingConv.cpp | 54 ++ llvm/lib/Target/PowerPC/PPCCallingConv.td | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 119 ++-- llvm/lib/Target/PowerPC/PPCISelLowering.h | 17 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 12 + llvm/lib/Target/PowerPC/PPCInstrSPE.td | 12 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 1 + llvm/lib/Target/X86/X86ISelLowering.cpp | 36 + llvm/lib/Target/X86/X86InstrFoldTables.cpp | 18 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 38 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 7 + llvm/test/Analysis/CostModel/ARM/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/PowerPC/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/RISCV/lit.local.cfg | 1 - llvm/test/Analysis/CostModel/X86/lit.local.cfg | 1 - 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llvm/test/Transforms/Inline/X86/lit.local.cfg | 1 - .../Transforms/InstCombine/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/InstCombine/with_overflow.ll | 1 + llvm/test/Transforms/InstSimplify/call.ll | 16 +- .../LoadStoreVectorizer/AMDGPU/lit.local.cfg | 1 - .../LoadStoreVectorizer/NVPTX/lit.local.cfg | 1 - .../LoadStoreVectorizer/X86/lit.local.cfg | 1 - .../test/Transforms/LoopIdiom/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopIdiom/X86/lit.local.cfg | 1 - .../LoopIdiom/X86/unordered-atomic-memcpy.ll | 8 +- llvm/test/Transforms/LoopIdiom/basic.ll | 12 +- .../LoopIdiom/memcpy-debugify-remarks.ll | 2 +- llvm/test/Transforms/LoopReroll/basic.ll | 2 +- llvm/test/Transforms/LoopReroll/complex_reroll.ll | 2 +- llvm/test/Transforms/LoopReroll/nonconst_lb.ll | 4 +- llvm/test/Transforms/LoopReroll/ptrindvar.ll | 2 +- .../LoopStrengthReduce/2011-10-06-ReusePhi.ll | 4 +- .../LoopStrengthReduce/AMDGPU/lit.local.cfg | 1 - .../LoopStrengthReduce/ARM/lit.local.cfg | 1 - .../LoopStrengthReduce/X86/lit.local.cfg | 1 - .../LoopStrengthReduce/post-inc-icmpzero.ll | 2 +- .../Transforms/LoopUnroll/AArch64/lit.local.cfg | 1 - .../Transforms/LoopUnroll/AMDGPU/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/ARM/lit.local.cfg | 1 - .../Transforms/LoopUnroll/Hexagon/lit.local.cfg | 1 - .../Transforms/LoopUnroll/PowerPC/lit.local.cfg | 1 - llvm/test/Transforms/LoopUnroll/X86/lit.local.cfg | 1 - .../Transforms/LoopVectorize/AArch64/lit.local.cfg | 1 - .../Transforms/LoopVectorize/ARM/lit.local.cfg | 1 - .../Transforms/LoopVectorize/PowerPC/lit.local.cfg | 1 - .../Transforms/LoopVectorize/X86/lit.local.cfg | 1 - .../X86/x86_fp80-interleaved-access.ll | 29 + llvm/test/Transforms/PGOProfile/X86/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/AMDGPU/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/SystemZ/lit.local.cfg | 1 - .../Transforms/SLPVectorizer/X86/lit.local.cfg | 1 - .../Transforms/SafeStack/AArch64/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/ARM/lit.local.cfg | 1 - llvm/test/Transforms/SafeStack/X86/lit.local.cfg | 1 - .../AMDGPU/lit.local.cfg | 1 - .../SeparateConstOffsetFromGEP/NVPTX/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/SPARC/lit.local.cfg | 1 - llvm/test/Transforms/SimplifyCFG/X86/lit.local.cfg | 1 - .../Transforms/SimplifyCFG/sink-common-code.ll | 44 ++ llvm/test/Transforms/SimplifyCFG/switch-profmd.ll | 35 + .../Transforms/StackProtector/X86/lit.local.cfg | 1 - .../ThinLTOBitcodeWriter/x86/lit.local.cfg | 1 - .../intrinsic-arg-overloading-struct-ret.ll | 79 +++ llvm/test/tools/dsymutil/ARM/lit.local.cfg | 1 - llvm/test/tools/llvm-lib/lit.local.cfg | 1 - llvm/test/tools/llvm-lto2/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mc/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/SystemZ/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/X86/lit.local.cfg | 1 - llvm/test/tools/llvm-mca/lit.local.cfg | 1 - .../tools/llvm-objcopy/ELF/cross-arch-headers.test | 12 + llvm/test/tools/llvm-objdump/Mips/lit.local.cfg | 1 - .../tools/llvm-objdump/PowerPC/branch-offset.s | 4 +- .../tools/llvm-objdump/X86/print-symbol-addr.s | 35 +- llvm/test/tools/llvm-readobj/AArch64/lit.local.cfg | 1 - llvm/test/tools/llvm-readobj/ARM/lit.local.cfg | 1 - llvm/tools/llvm-objcopy/CopyConfig.cpp | 3 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 13 +- llvm/tools/yaml2obj/yaml2macho.cpp | 18 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 2 +- 392 files changed, 4066 insertions(+), 2303 deletions(-) rename clang/{include/clang/Basic => lib/Sema}/OpenCLBuiltins.td (100%) create mode 100644 llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp delete mode 100644 llvm/lib/Target/ARM/ARMComputeBlockSize.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll create mode 100644 llvm/test/CodeGen/RISCV/split-offsets.ll create mode 100644 llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-co [...] create mode 100644 llvm/test/ObjectYAML/MachO/virtual_section.yaml create mode 100644 llvm/test/Transforms/LoopVectorize/X86/x86_fp80-interleaved-access.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/switch-profmd.ll create mode 100644 llvm/test/Verifier/intrinsic-arg-overloading-struct-ret.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (1d74f4c4 -> 015c0c96)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 1d74f4c4 0: update: llvm-linux: all new 015c0c96 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1d74f4c4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-build_llvm/console.log | 11835 ++++++++++++++++--------------- 03-build_linux/console.log | 2968 ++++---- 04-boot_linux/console.log | 2 +- console.log | 14821 +++++++++++++++++++-------------------- jenkins/manifest.sh | 14 +- 6 files changed, 14827 insertions(+), 14829 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO updated (93fd8418745 -> 961f9b6c746)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/gcc. from 93fd8418745 Daily bump. adds ec223ee4b39 Daily bump. adds 5fadeb95c95 PR middle-end/64242 * config/pa/pa.md (nonlocal_goto): Re [...] adds 693d9a36238 Daily bump. adds 961f9b6c746 PR ada/80590 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 7 +++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 8 ++++++++ gcc/ada/exp_ch9.adb | 15 +++++++-------- gcc/config/pa/pa.md | 48 +++++++++++++++++++++++++++--------------------- 5 files changed, 50 insertions(+), 30 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO updated (15660a4de7 -> 9137726eb6)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/binutils-gdb. from 15660a4de7 Automatic date update in version.in adds 599d81557b Automatic date update in version.in adds 9137726eb6 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO updated (474d283d -> 4cc95e3e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os_LTO in repository toolchain/ci/base-artifacts. discards 474d283d 0: init: binutils-gcc-glibc: -5 new 4cc95e3e 0: init: binutils-gcc-glibc: -5 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (474d283d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-release-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 58 +- 02-prepare_abe/console.log | 344 +- 03-build_abe-binutils/console.log | 10358 ++-- 04-build_abe-stage1/console.log | 17548 +++--- 05-build_abe-linux/console.log | 288 +- 06-build_abe-glibc/console.log | 37935 ++++++------ 07-build_abe-stage2/console.log | 45523 +++++++------- 08-benchmark/benchmark-start.log | 2 +- 08-benchmark/benchmark.log | 13 +- 08-benchmark/console.log | 107 +- 10-update_baseline/console.log | 12 +- console.log | 112187 ++++++++++++++++++----------------- jenkins/manifest.sh | 14 +- 13 files changed, 112207 insertions(+), 112182 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

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