Tcwg-commits June 2019

tcwg-commits@lists.linaro.org

6 participants
15913 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (a5832f9b7 -> c5c1ecbed)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards a5832f9b7 0: update: llvm-linux: boot new c5c1ecbed 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a5832f9b7) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 214 +- 02-build_llvm/console.log | 11596 +++++++++++++++++------------------ 03-build_linux/console.log | 642 +- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 8 +- console.log | 12487 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 12470 insertions(+), 12495 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (633d222d30b -> 8023c844338)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from 633d222d30b [WebAssembly] Added visibility and ident directives to Wasm [...] adds 5cbff431782 [COFF] Fix .rsrc sections with differing permissions adds 0b8b4195371 [NFC][Codegen] Revisit test coverage for X % C == 0 fold on [...] adds 5be69ebe121 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds 021d2f20933 Update CODE_OWNERS.txt for clang-doc adds 5f8b9092fff [ODRHash] Fix null pointer dereference for ObjC selectors w [...] adds 7108df964aa hwasan: Remove the old frame descriptor mechanism. adds 8864b4360aa Make sure the thread list is updated before you set the sto [...] adds 978a08c8854 [X86] CombineShuffleWithExtract - recurse through EXTRACT_S [...] adds 7d78e5cc811 [UpdateChecks] Add support for armv7-apple-darwin adds 9db6073381d [GDBRemote] Remove code that flushes GDB remote packets adds 93a290fdc97 [clang-doc] De-duplicate comments and locations adds 36c3d1312a0 [unittests][Support] Fix LLVM-Unit :: Support/./SupportTest [...] adds 62a627ae781 Re-apply r364600 with fixes. adds 70a8027c60f [llvm-ar] Document response file support in --help adds d900ef0a5b1 [clang-doc] Handle anonymous namespaces adds 4b733ca617e Default to Secure PLT on PPC for musl libc. adds 1c6337ca5ab [TSan] Fix build build breakage on Android adds 9a6cef74d8a [demangle] Support for C++2a char8_t adds ab4b2364e56 [GVNSink] Add unary FNeg support to GVNSink pass adds 642fe780abe Revert enabling frame pointer elimination on OpenBSD for now. adds 30e5cf1d8f3 [NewGVN] Add unary FNeg support to NewGVN pass adds 597ba180086 [WebAssembly] Assembler: Improve section parsing. adds fc222e23cae [WebAssembly] Assembler: Allow offsets and p2align in symbol load. adds 1242d8f333a [OPENMP]Improve analysis of implicit captures. adds 573b241c68a [Lanai] auto-generate complete test checks; NFC adds b671535983f [NFC][NewGVN] Explicitly check fpmath metadata in fpmath.ll adds f2128b28cdb Get the expression parser to handle missing weak symbols. M [...] adds 9126c84f50f [x86] remove stale comment about cmov; NFC adds 35bcba4fae8 [WebAssembly] Allow @object in .type directives. adds 319c87d94fd [WebAssembly] Assembler: support .int16/32/64 directives. adds caf4cee6fe8 [clang][test][NFC] Explicitly specify clang ABI in AST Dumper test adds 69d9c314337 AMDGPU: Add baseline test for packed shufflevector adds da47e2cac38 Revert "[clang][NewPM] Fix broken profile test" adds 1504b6ee7ea [IndVars] Remove a bit of manual constant folding [NFC] adds ade51624327 AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics adds 6aafb3068f9 AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas adds 5ea3c9adb27 AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics adds b416d5fc8b8 AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics adds adb1f21e521 AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics adds fd82cf4f4d0 AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec adds be4148062b1 [TSan] Attempt to fix linker error for Linux on AArch64 adds 0d452097571 AMDGPU/GlobalISel: RegBankSelect for update.dpp adds a83e94ebf26 Use const auto * adds 7889d4ce66f AMDGPU/GlobalISel: Add some more tests for icmp select adds 765eba38c8d [Driver] Fix style issues of --print-supported-cpus after D63105 adds b72664fd21c Partial revert of "[llvm-ar] Document response file support [...] adds 2d756c4feb6 [LFTR] Fix post-inc pointer IV with truncated exit count (PR41998) adds 9e9eb62f9fd [APInt] Fix getBitsNeeded for INT_MIN values adds fe107fcde4d [IR][Patternmatch] Add m_SpecificInt_ULT() predicate adds e3a94ba4a92 [InstCombine] Shift amount reassociation (PR42391) adds 61a8b62b4c9 [LFTR] Remove unnecessary latch check; NFCI adds 77dc1e85683 [InstCombine] canonicalize fmin/fmax to LLVM intrinsics min [...] adds 8023c844338 [LFTR] Rephrase getLoopTest into "based-on" check; NFCI No new revisions were added by this update. Summary of changes: clang-tools-extra/CODE_OWNERS.TXT | 4 + clang-tools-extra/clang-doc/Representation.cpp | 39 + clang-tools-extra/clang-doc/Representation.h | 50 + clang-tools-extra/clang-doc/Serialize.cpp | 75 +- clang-tools-extra/clang-doc/tool/ClangDocMain.cpp | 7 +- .../unittests/clang-doc/MergeTest.cpp | 36 +- .../unittests/clang-doc/SerializeTest.cpp | 1 + clang/include/clang/Driver/Options.td | 6 +- clang/lib/AST/ODRHash.cpp | 7 +- clang/lib/CodeGen/BackendUtil.cpp | 6 - clang/lib/Driver/Driver.cpp | 20 +- clang/lib/Driver/ToolChains/Clang.cpp | 13 - clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Sema/SemaOpenMP.cpp | 58 +- .../AST/ast-dump-record-definition-data-json.cpp | 2 +- clang/test/Driver/frame-pointer-elim.c | 13 - clang/test/Driver/print-supported-cpus.c | 36 +- clang/test/Modules/odr_hash.mm | 31 + .../distribute_parallel_for_default_messages.cpp | 8 +- ...stribute_parallel_for_simd_default_messages.cpp | 8 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 4 +- .../target_parallel_for_default_messages.cpp | 4 +- .../target_parallel_for_simd_default_messages.cpp | 4 +- ...rget_teams_distribute_firstprivate_messages.cpp | 2 +- .../teams_distribute_firstprivate_messages.cpp | 2 +- .../teams_distribute_lastprivate_messages.cpp | 2 +- ...stribute_parallel_for_firstprivate_messages.cpp | 2 +- ...istribute_parallel_for_lastprivate_messages.cpp | 2 +- ..._distribute_parallel_for_reduction_messages.cpp | 4 +- ...stribute_parallel_for_simd_aligned_messages.cpp | 2 +- ...ute_parallel_for_simd_firstprivate_messages.cpp | 2 +- ...bute_parallel_for_simd_lastprivate_messages.cpp | 2 +- ...istribute_parallel_for_simd_linear_messages.cpp | 4 +- ...ribute_parallel_for_simd_reduction_messages.cpp | 4 +- .../OpenMP/teams_distribute_reduction_messages.cpp | 4 +- .../teams_distribute_simd_aligned_messages.cpp | 2 +- ...teams_distribute_simd_firstprivate_messages.cpp | 2 +- .../teams_distribute_simd_lastprivate_messages.cpp | 2 +- .../teams_distribute_simd_linear_messages.cpp | 4 +- .../teams_distribute_simd_reduction_messages.cpp | 4 +- clang/test/OpenMP/teams_firstprivate_messages.cpp | 2 +- clang/test/OpenMP/teams_reduction_messages.cpp | 4 +- clang/test/Profile/gcc-flag-compatibility.c | 12 +- clang/tools/driver/cc1_main.cpp | 9 +- compiler-rt/lib/tsan/rtl/tsan_interceptors.cc | 3 + compiler-rt/lib/tsan/rtl/tsan_platform.h | 1 + compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 34 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cc | 4 + compiler-rt/lib/tsan/rtl/tsan_rtl_aarch64.S | 8 - libcxxabi/src/demangle/ItaniumDemangle.h | 4 + libcxxabi/test/test_demangle.pass.cpp | 3 + lld/COFF/Writer.cpp | 32 +- lld/test/COFF/Inputs/id.res.o | Bin 0 -> 220 bytes lld/test/COFF/resource-objs.test | 5 + lldb/include/lldb/Expression/IRExecutionUnit.h | 12 +- lldb/include/lldb/Symbol/Symbol.h | 7 +- lldb/include/lldb/lldb-enumerations.h | 2 + .../test/expression_command/weak_symbols/Makefile | 26 + .../weak_symbols/TestWeakSymbols.py | 83 + .../test/expression_command/weak_symbols/dylib.c | 14 + .../test/expression_command/weak_symbols/dylib.h | 8 + .../test/expression_command/weak_symbols/main.c | 23 + .../weak_symbols/module.modulemap | 3 + .../gdb_remote_client/TestRecognizeBreakpoint.py | 139 ++ .../gdb_remote_client/gdbclientutils.py | 5 + .../gdb_remote_client/operating_system_2.py | 62 + lldb/source/Expression/IRExecutionUnit.cpp | 91 +- lldb/source/Expression/IRInterpreter.cpp | 5 +- .../Plugins/ExpressionParser/Clang/IRForTarget.cpp | 18 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 2 + .../gdb-remote/GDBRemoteCommunicationClient.cpp | 7 - .../Process/gdb-remote/ProcessGDBRemote.cpp | 17 +- .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 10 +- lldb/source/Symbol/Block.cpp | 4 +- lldb/source/Symbol/Symbol.cpp | 15 +- lldb/source/Target/Process.cpp | 10 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 4 + llvm/include/llvm/IR/PatternMatch.h | 14 + llvm/lib/MC/MCParser/WasmAsmParser.cpp | 45 +- llvm/lib/Support/APInt.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 3 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 35 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 18 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 48 + .../Instrumentation/HWAddressSanitizer.cpp | 81 - llvm/lib/Transforms/Scalar/GVNSink.cpp | 1 + llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 143 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 1 + llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 38 +- .../CodeGen/AArch64/urem-seteq-vec-nonsplat.ll | 493 ++++- llvm/test/CodeGen/AArch64/urem-seteq-vec-splat.ll | 40 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 112 +- .../GlobalISel/regbankselect-amdgcn.atomic.dec.mir | 80 + .../GlobalISel/regbankselect-amdgcn.atomic.inc.mir | 80 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 106 + .../GlobalISel/regbankselect-amdgcn.ds.append.mir | 36 + .../regbankselect-amdgcn.ds.bpermute.mir | 24 + .../GlobalISel/regbankselect-amdgcn.ds.consume.mir | 36 + .../GlobalISel/regbankselect-amdgcn.ds.fmax.mir | 83 + .../GlobalISel/regbankselect-amdgcn.ds.fmin.mir | 83 + .../GlobalISel/regbankselect-amdgcn.ds.permute.mir | 24 + .../GlobalISel/regbankselect-amdgcn.fcmp.mir | 67 + .../regbankselect-amdgcn.groupstaticsize.mir | 14 + .../GlobalISel/regbankselect-amdgcn.icmp.mir | 67 + ...bankselect-amdgcn.s.get.waveid.in.workgroup.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.getpc.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.getreg.mir | 14 + .../regbankselect-amdgcn.s.memrealtime.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.memtime.mir | 14 + .../GlobalISel/regbankselect-amdgcn.update.dpp.mir | 82 + llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 928 +++++++++ llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll | 14 +- llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll | 117 +- llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll | 2 + .../test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll | 14 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 14 +- llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 2104 ++++++++++++++++---- llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll | 87 +- .../JITLink/X86/MachO_x86-64_relocations.s | 12 + .../Instrumentation/HWAddressSanitizer/basic.ll | 2 - .../HWAddressSanitizer/frame-descriptor.ll | 27 - .../HWAddressSanitizer/with-calls.ll | 1 - llvm/test/MC/WebAssembly/basic-assembly.s | 13 +- llvm/test/Transforms/GVNSink/fpmath.ll | 3 +- .../IndVarSimplify/2011-11-01-lftrptr.ll | 7 +- .../test/Transforms/IndVarSimplify/lftr-pr41998.ll | 5 +- .../InstCombine/double-float-shrink-1.ll | 11 +- llvm/test/Transforms/InstCombine/fast-math.ll | 53 +- .../Transforms/InstCombine/float-shrink-compare.ll | 37 +- .../InstCombine/shift-amount-reassociation.ll | 60 +- llvm/test/Transforms/NewGVN/fpmath.ll | 14 +- llvm/tools/llvm-ar/llvm-ar.cpp | 1 + llvm/unittests/ADT/APIntTest.cpp | 17 +- llvm/unittests/IR/PatternMatch.cpp | 21 + llvm/unittests/Support/Path.cpp | 5 +- llvm/utils/UpdateTestChecks/asm.py | 9 + 138 files changed, 5540 insertions(+), 1231 deletions(-) create mode 100644 lld/test/COFF/Inputs/id.res.o create mode 100644 lld/test/COFF/resource-objs.test create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpe [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.con [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmin.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.per [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groups [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memr [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update [...] create mode 100644 llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll delete mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/frame-descriptor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (f6122b30b -> 1873aadef)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards f6122b30b 0: update: llvm-linux: 16 new 1873aadef 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f6122b30b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 167 +- 02-build_llvm/console.log | 11917 ++++++++++++++++++------------------ 03-build_linux/console.log | 765 +-- 06-update_baseline/console.log | 28 - console.log | 12877 ++++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 6 files changed, 12908 insertions(+), 12854 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig updated (db3161f8a48 -> a850edcd2d9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig in repository toolchain/ci/gcc. from db3161f8a48 x86: improve GFNI insns adds 7552912ca27 [Darwin] Fix a couple of Wformat-diag build warnings. adds a512236ef3f [Darwin, PPC] Install the same headers as other sub-targets. adds 675f77b1c7b Fix PR target/91009 adds 0cbd830840f Update pc-relative support. adds 3f5fde6db61 Daily bump. adds 338bc01ab52 Remove trailing whitespace in C++ front end. adds 2074c859e78 * expr.c (expand_expr_real_1) <BIT_FIELD_REF>: Apply the b [...] adds d0de0a2767e * gcc-interface/decl.c (set_nonaliased_component_on_array_ [...] adds 5882c515921 * gcc-interface/trans.c (mark_visited_r): Set TYPE_SIZES_G [...] adds f44097414c1 * gcc-interface/decl.c (gnat_to_gnu_field): Rework error m [...] adds 07e38949400 * gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type [...] adds b1e46fb1fdb * gcc-interface/utils.c (unchecked_convert): Tweak comment [...] adds a850edcd2d9 * gcc-interface/decl.c (gnat_to_gnu_entity): Beep up comme [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 35 +++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 62 ++++ gcc/ada/gcc-interface/decl.c | 349 ++++++++++++--------- gcc/ada/gcc-interface/gigi.h | 4 +- gcc/ada/gcc-interface/trans.c | 3 +- gcc/ada/gcc-interface/utils.c | 150 ++++++--- gcc/config.gcc | 2 - gcc/config/darwin-c.c | 2 +- gcc/config/darwin-driver.c | 4 +- gcc/config/rs6000/predicates.md | 55 +++- gcc/config/rs6000/rs6000.h | 7 - gcc/config/rs6000/rs6000.md | 24 +- gcc/cp/cp-tree.h | 30 +- gcc/cp/cxx-pretty-print.c | 1 - gcc/cp/parser.c | 276 ++++++++-------- gcc/cp/pt.c | 202 ++++++------ gcc/cp/semantics.c | 32 +- gcc/expr.c | 8 +- gcc/testsuite/ChangeLog | 27 ++ gcc/testsuite/gnat.dg/array35.adb | 24 ++ gcc/testsuite/gnat.dg/array36.adb | 28 ++ gcc/testsuite/gnat.dg/specs/array5.ads | 9 + gcc/testsuite/gnat.dg/specs/array5_pkg1.ads | 14 + gcc/testsuite/gnat.dg/specs/array5_pkg2-g.ads | 13 + gcc/testsuite/gnat.dg/specs/array5_pkg2.ads | 5 + gcc/testsuite/gnat.dg/specs/atomic2.ads | 2 +- gcc/testsuite/gnat.dg/specs/clause_on_volatile.ads | 4 +- gcc/testsuite/gnat.dg/specs/size_clause3.ads | 4 +- gcc/testsuite/gnat.dg/specs/unchecked_convert1.ads | 20 ++ gcc/testsuite/gnat.dg/specs/unchecked_convert2.ads | 19 ++ 31 files changed, 906 insertions(+), 511 deletions(-) create mode 100644 gcc/testsuite/gnat.dg/array35.adb create mode 100644 gcc/testsuite/gnat.dg/array36.adb create mode 100644 gcc/testsuite/gnat.dg/specs/array5.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg1.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg2-g.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg2.ads create mode 100644 gcc/testsuite/gnat.dg/specs/unchecked_convert1.ads create mode 100644 gcc/testsuite/gnat.dg/specs/unchecked_convert2.ads -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig updated (10d06d8219 -> d6954c38df)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from 10d06d8219 Handle either order of name and linkage name adds 5af5392a3d Fix crash when using PYTHONMALLOC=debug (PR python/24742) adds 7d7571f0c1 Adjust i386 registers on SystemTap probes' arguments (PR bre [...] adds d6954c38df Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 19 +++++++++++++++++++ gdb/gdbarch.c | 32 ++++++++++++++++++++++++++++++++ gdb/gdbarch.h | 30 ++++++++++++++++++++++++++++++ gdb/gdbarch.sh | 25 +++++++++++++++++++++++++ gdb/i386-tdep.c | 29 +++++++++++++++++++++++++++++ gdb/python/python.c | 2 +- gdb/stap-probe.c | 31 ++++++++++++++++++++++++++++--- 8 files changed, 165 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig updated (5857ad9f1 -> 22d3f4a3b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards 5857ad9f1 0: update: binutils-gcc-linux: all new 22d3f4a3b 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5857ad9f1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 66 +- 02-prepare_abe/console.log | 312 +- 03-build_abe-binutils/console.log | 11277 ++++---- 04-build_abe-stage1/console.log | 19972 ++++++------- 05-build_linux/console.log | 22516 +++++++-------- 06-boot_linux/console.log | 2 +- console.log | 54203 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 54157 insertions(+), 54203 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (e39e958da36 -> 8023c844338)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/llvm-project. from e39e958da36 [ARM] Add support for the MVE long shift instructions adds 73f9d9aa64b [OPENMP]Fix top DSA for static members. adds e1eb25ff3e5 [AMDGPU][MC] Fix 2 for sanitizer failure in 364645 adds 3b4f086df4a [NFC][InstCombine] Shift amount reassociation: revisit flag [...] adds 633d222d30b [WebAssembly] Added visibility and ident directives to Wasm [...] adds 5cbff431782 [COFF] Fix .rsrc sections with differing permissions adds 0b8b4195371 [NFC][Codegen] Revisit test coverage for X % C == 0 fold on [...] adds 5be69ebe121 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds 021d2f20933 Update CODE_OWNERS.txt for clang-doc adds 5f8b9092fff [ODRHash] Fix null pointer dereference for ObjC selectors w [...] adds 7108df964aa hwasan: Remove the old frame descriptor mechanism. adds 8864b4360aa Make sure the thread list is updated before you set the sto [...] adds 978a08c8854 [X86] CombineShuffleWithExtract - recurse through EXTRACT_S [...] adds 7d78e5cc811 [UpdateChecks] Add support for armv7-apple-darwin adds 9db6073381d [GDBRemote] Remove code that flushes GDB remote packets adds 93a290fdc97 [clang-doc] De-duplicate comments and locations adds 36c3d1312a0 [unittests][Support] Fix LLVM-Unit :: Support/./SupportTest [...] adds 62a627ae781 Re-apply r364600 with fixes. adds 70a8027c60f [llvm-ar] Document response file support in --help adds d900ef0a5b1 [clang-doc] Handle anonymous namespaces adds 4b733ca617e Default to Secure PLT on PPC for musl libc. adds 1c6337ca5ab [TSan] Fix build build breakage on Android adds 9a6cef74d8a [demangle] Support for C++2a char8_t adds ab4b2364e56 [GVNSink] Add unary FNeg support to GVNSink pass adds 642fe780abe Revert enabling frame pointer elimination on OpenBSD for now. adds 30e5cf1d8f3 [NewGVN] Add unary FNeg support to NewGVN pass adds 597ba180086 [WebAssembly] Assembler: Improve section parsing. adds fc222e23cae [WebAssembly] Assembler: Allow offsets and p2align in symbol load. adds 1242d8f333a [OPENMP]Improve analysis of implicit captures. adds 573b241c68a [Lanai] auto-generate complete test checks; NFC adds b671535983f [NFC][NewGVN] Explicitly check fpmath metadata in fpmath.ll adds f2128b28cdb Get the expression parser to handle missing weak symbols. M [...] adds 9126c84f50f [x86] remove stale comment about cmov; NFC adds 35bcba4fae8 [WebAssembly] Allow @object in .type directives. adds 319c87d94fd [WebAssembly] Assembler: support .int16/32/64 directives. adds caf4cee6fe8 [clang][test][NFC] Explicitly specify clang ABI in AST Dumper test adds 69d9c314337 AMDGPU: Add baseline test for packed shufflevector adds da47e2cac38 Revert "[clang][NewPM] Fix broken profile test" adds 1504b6ee7ea [IndVars] Remove a bit of manual constant folding [NFC] adds ade51624327 AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics adds 6aafb3068f9 AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas adds 5ea3c9adb27 AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics adds b416d5fc8b8 AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics adds adb1f21e521 AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics adds fd82cf4f4d0 AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec adds be4148062b1 [TSan] Attempt to fix linker error for Linux on AArch64 adds 0d452097571 AMDGPU/GlobalISel: RegBankSelect for update.dpp adds a83e94ebf26 Use const auto * adds 7889d4ce66f AMDGPU/GlobalISel: Add some more tests for icmp select adds 765eba38c8d [Driver] Fix style issues of --print-supported-cpus after D63105 adds b72664fd21c Partial revert of "[llvm-ar] Document response file support [...] adds 2d756c4feb6 [LFTR] Fix post-inc pointer IV with truncated exit count (PR41998) adds 9e9eb62f9fd [APInt] Fix getBitsNeeded for INT_MIN values adds fe107fcde4d [IR][Patternmatch] Add m_SpecificInt_ULT() predicate adds e3a94ba4a92 [InstCombine] Shift amount reassociation (PR42391) adds 61a8b62b4c9 [LFTR] Remove unnecessary latch check; NFCI adds 77dc1e85683 [InstCombine] canonicalize fmin/fmax to LLVM intrinsics min [...] adds 8023c844338 [LFTR] Rephrase getLoopTest into "based-on" check; NFCI No new revisions were added by this update. Summary of changes: clang-tools-extra/CODE_OWNERS.TXT | 4 + clang-tools-extra/clang-doc/Representation.cpp | 39 + clang-tools-extra/clang-doc/Representation.h | 50 + clang-tools-extra/clang-doc/Serialize.cpp | 75 +- clang-tools-extra/clang-doc/tool/ClangDocMain.cpp | 7 +- .../unittests/clang-doc/MergeTest.cpp | 36 +- .../unittests/clang-doc/SerializeTest.cpp | 1 + clang/include/clang/Driver/Options.td | 6 +- clang/lib/AST/ODRHash.cpp | 7 +- clang/lib/CodeGen/BackendUtil.cpp | 6 - clang/lib/Driver/Driver.cpp | 20 +- clang/lib/Driver/ToolChains/Clang.cpp | 13 - clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Sema/SemaOpenMP.cpp | 76 +- .../AST/ast-dump-record-definition-data-json.cpp | 2 +- clang/test/Driver/frame-pointer-elim.c | 13 - clang/test/Driver/print-supported-cpus.c | 36 +- clang/test/Modules/odr_hash.mm | 31 + .../distribute_parallel_for_default_messages.cpp | 8 +- ...stribute_parallel_for_simd_default_messages.cpp | 8 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 4 +- clang/test/OpenMP/simd_loop_messages.cpp | 5 + .../target_parallel_for_default_messages.cpp | 4 +- .../target_parallel_for_simd_default_messages.cpp | 4 +- ...rget_teams_distribute_firstprivate_messages.cpp | 2 +- .../teams_distribute_firstprivate_messages.cpp | 2 +- .../teams_distribute_lastprivate_messages.cpp | 2 +- ...stribute_parallel_for_firstprivate_messages.cpp | 2 +- ...istribute_parallel_for_lastprivate_messages.cpp | 2 +- ..._distribute_parallel_for_reduction_messages.cpp | 4 +- ...stribute_parallel_for_simd_aligned_messages.cpp | 2 +- ...ute_parallel_for_simd_firstprivate_messages.cpp | 2 +- ...bute_parallel_for_simd_lastprivate_messages.cpp | 2 +- ...istribute_parallel_for_simd_linear_messages.cpp | 4 +- ...ribute_parallel_for_simd_reduction_messages.cpp | 4 +- .../OpenMP/teams_distribute_reduction_messages.cpp | 4 +- .../teams_distribute_simd_aligned_messages.cpp | 2 +- ...teams_distribute_simd_firstprivate_messages.cpp | 2 +- .../teams_distribute_simd_lastprivate_messages.cpp | 2 +- .../teams_distribute_simd_linear_messages.cpp | 4 +- .../teams_distribute_simd_reduction_messages.cpp | 4 +- clang/test/OpenMP/teams_firstprivate_messages.cpp | 2 +- clang/test/OpenMP/teams_reduction_messages.cpp | 4 +- clang/test/Profile/gcc-flag-compatibility.c | 12 +- clang/tools/driver/cc1_main.cpp | 9 +- compiler-rt/lib/tsan/rtl/tsan_interceptors.cc | 3 + compiler-rt/lib/tsan/rtl/tsan_platform.h | 1 + compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 34 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cc | 4 + compiler-rt/lib/tsan/rtl/tsan_rtl_aarch64.S | 8 - libcxxabi/src/demangle/ItaniumDemangle.h | 4 + libcxxabi/test/test_demangle.pass.cpp | 3 + lld/COFF/Writer.cpp | 32 +- lld/test/COFF/Inputs/id.res.o | Bin 0 -> 220 bytes lld/test/COFF/resource-objs.test | 5 + lldb/include/lldb/Expression/IRExecutionUnit.h | 12 +- lldb/include/lldb/Symbol/Symbol.h | 7 +- lldb/include/lldb/lldb-enumerations.h | 2 + .../test/expression_command/weak_symbols/Makefile | 26 + .../weak_symbols/TestWeakSymbols.py | 83 + .../test/expression_command/weak_symbols/dylib.c | 14 + .../test/expression_command/weak_symbols/dylib.h | 8 + .../test/expression_command/weak_symbols/main.c | 23 + .../weak_symbols/module.modulemap | 3 + .../gdb_remote_client/TestRecognizeBreakpoint.py | 139 ++ .../gdb_remote_client/gdbclientutils.py | 5 + .../gdb_remote_client/operating_system_2.py | 62 + lldb/source/Expression/IRExecutionUnit.cpp | 91 +- lldb/source/Expression/IRInterpreter.cpp | 5 +- .../Plugins/ExpressionParser/Clang/IRForTarget.cpp | 18 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 2 + .../gdb-remote/GDBRemoteCommunicationClient.cpp | 7 - .../Process/gdb-remote/ProcessGDBRemote.cpp | 17 +- .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 10 +- lldb/source/Symbol/Block.cpp | 4 +- lldb/source/Symbol/Symbol.cpp | 15 +- lldb/source/Target/Process.cpp | 10 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 4 + llvm/include/llvm/IR/PatternMatch.h | 14 + llvm/lib/MC/MCParser/WasmAsmParser.cpp | 97 +- llvm/lib/Support/APInt.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 93 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 6 +- llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 3 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 35 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 18 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 48 + .../Instrumentation/HWAddressSanitizer.cpp | 81 - llvm/lib/Transforms/Scalar/GVNSink.cpp | 1 + llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 143 +- llvm/lib/Transforms/Scalar/NewGVN.cpp | 1 + llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 38 +- .../CodeGen/AArch64/urem-seteq-vec-nonsplat.ll | 493 ++++- llvm/test/CodeGen/AArch64/urem-seteq-vec-splat.ll | 40 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 112 +- .../GlobalISel/regbankselect-amdgcn.atomic.dec.mir | 80 + .../GlobalISel/regbankselect-amdgcn.atomic.inc.mir | 80 + .../GlobalISel/regbankselect-amdgcn.div.fmas.mir | 106 + .../GlobalISel/regbankselect-amdgcn.ds.append.mir | 36 + .../regbankselect-amdgcn.ds.bpermute.mir | 24 + .../GlobalISel/regbankselect-amdgcn.ds.consume.mir | 36 + .../GlobalISel/regbankselect-amdgcn.ds.fmax.mir | 83 + .../GlobalISel/regbankselect-amdgcn.ds.fmin.mir | 83 + .../GlobalISel/regbankselect-amdgcn.ds.permute.mir | 24 + .../GlobalISel/regbankselect-amdgcn.fcmp.mir | 67 + .../regbankselect-amdgcn.groupstaticsize.mir | 14 + .../GlobalISel/regbankselect-amdgcn.icmp.mir | 67 + ...bankselect-amdgcn.s.get.waveid.in.workgroup.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.getpc.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.getreg.mir | 14 + .../regbankselect-amdgcn.s.memrealtime.mir | 14 + .../GlobalISel/regbankselect-amdgcn.s.memtime.mir | 14 + .../GlobalISel/regbankselect-amdgcn.update.dpp.mir | 82 + llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll | 928 +++++++++ llvm/test/CodeGen/ARM/ldst-f32-2-i32.ll | 14 +- llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll | 117 +- llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll | 2 + .../test/CodeGen/X86/shuffle-vs-trunc-512-widen.ll | 14 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 14 +- llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 2104 ++++++++++++++++---- llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll | 87 +- .../JITLink/X86/MachO_x86-64_relocations.s | 12 + .../Instrumentation/HWAddressSanitizer/basic.ll | 2 - .../HWAddressSanitizer/frame-descriptor.ll | 27 - .../HWAddressSanitizer/with-calls.ll | 1 - llvm/test/MC/WebAssembly/basic-assembly.s | 78 +- llvm/test/Transforms/GVNSink/fpmath.ll | 3 +- .../IndVarSimplify/2011-11-01-lftrptr.ll | 7 +- .../test/Transforms/IndVarSimplify/lftr-pr41998.ll | 5 +- .../InstCombine/double-float-shrink-1.ll | 11 +- llvm/test/Transforms/InstCombine/fast-math.ll | 53 +- .../Transforms/InstCombine/float-shrink-compare.ll | 37 +- .../InstCombine/shift-amount-reassociation.ll | 88 +- llvm/test/Transforms/NewGVN/fpmath.ll | 14 +- llvm/tools/llvm-ar/llvm-ar.cpp | 1 + llvm/unittests/ADT/APIntTest.cpp | 17 +- llvm/unittests/IR/PatternMatch.cpp | 21 + llvm/unittests/Support/Path.cpp | 5 +- llvm/utils/UpdateTestChecks/asm.py | 9 + 141 files changed, 5674 insertions(+), 1277 deletions(-) create mode 100644 lld/test/COFF/Inputs/id.res.o create mode 100644 lld/test/COFF/resource-objs.test create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/weak_sym [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpe [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.con [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmin.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.per [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groups [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memr [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update [...] create mode 100644 llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll delete mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/frame-descriptor.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig updated (1ca382691 -> e4a7c8de8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 1ca382691 0: update: llvm-linux: all new e4a7c8de8 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1ca382691) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-build_llvm/console.log | 11950 +++++++++++++++--------------- 03-build_linux/console.log | 3464 +++++---- 04-boot_linux/console.log | 2 +- 06-update_baseline/console.log | 25 - console.log | 15457 +++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 7 files changed, 15434 insertions(+), 15488 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig updated (a905c9f2922 -> 61f34a55a51)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig in repository toolchain/ci/gcc. from a905c9f2922 Daily bump. adds 7d79d463358 PR tree-optimization/90949 * tree-ssa-copy.c (fini_copy_p [...] adds a9de850ca20 Daily bump. adds 15d7f426252 * gcc-interface/decl.c (set_nonaliased_component_on_array_ [...] adds f71e317afb9 * gcc-interface/trans.c (mark_visited_r): Set TYPE_SIZES_G [...] adds 61f34a55a51 * gcc-interface/decl.c (gnat_to_gnu_entity): Beep up comme [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 25 ++++++++++++- gcc/ada/gcc-interface/decl.c | 54 +++++++++++++++++++-------- gcc/ada/gcc-interface/trans.c | 3 +- gcc/testsuite/ChangeLog | 15 ++++++++ gcc/testsuite/gcc.c-torture/execute/pr90949.c | 42 +++++++++++++++++++++ gcc/testsuite/gnat.dg/specs/array5.ads | 9 +++++ gcc/testsuite/gnat.dg/specs/array5_pkg1.ads | 14 +++++++ gcc/testsuite/gnat.dg/specs/array5_pkg2-g.ads | 13 +++++++ gcc/testsuite/gnat.dg/specs/array5_pkg2.ads | 5 +++ gcc/tree-ssa-copy.c | 11 +++--- gcc/tree-ssanames.c | 7 +++- 13 files changed, 183 insertions(+), 26 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr90949.c create mode 100644 gcc/testsuite/gnat.dg/specs/array5.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg1.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg2-g.ads create mode 100644 gcc/testsuite/gnat.dg/specs/array5_pkg2.ads -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig updated (30e1820d02 -> 9a7543e1c7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allnoconfig in repository toolchain/ci/binutils-gdb. from 30e1820d02 Automatic date update in version.in adds 9a7543e1c7 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 4 months

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits June 2019