Tcwg-commits June 2019

tcwg-commits@lists.linaro.org

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15913 discussions

[gcc] branch master updated (3a40508241c -> a9aca69ccd7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 3a40508241c Remove dead code in df-scan.c (PR tree-optimization/90978). new a9aca69ccd7 Transform filter-rtags-warnings to filter-clang-warnings. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++ ...-rtags-warnings.py => filter-clang-warnings.py} | 47 +++++++++++----------- 2 files changed, 29 insertions(+), 23 deletions(-) rename contrib/{filter-rtags-warnings.py => filter-clang-warnings.py} (66%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (6ddc7912b0e -> 287f0403e31)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/llvm-project. from 6ddc7912b0e [SelectionDAG] Remove the code that attempts to calculate t [...] adds 6620e3b2f69 SlotIndexes: simplify IdxMBBPair operators adds 13a5ae58fcf [InstCombine] squash is-power-of-2 that uses ctpop adds f955d5f623d SlotIndexes: delete unused functions adds d22a2a9a726 [IndVars] Remove dead instructions after folding trivial loop exit adds 3f8264b0628 [Tests] Autogen and improve test readability adds 9bc3141dc2d Fix test for 32-bit targets. adds c8d94e78899 [X86] Fix isel pattern that was looking for a bitcasted loa [...] adds e2291f5af92 Fix typo in comment; NFC adds 3359a17b3ae Apply new meta-programming traits throughout the library. adds fb2bd4a9398 Use C++11 implementation of unique_ptr in C++03. adds c6094f0495b [GN] Generation failure caused by trailing space in file name adds e8da65c698e [X86] Turn v16i16->v16i8 truncate+store into a any_extend+t [...] adds 2fb6b0f2baf [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows fo [...] adds 9771f500f29 PR42362: Fix auto deduction of template parameter packs fro [...] adds 8c1b73591fa [llvm-readobj/llvm-readelf] - Eliminate the elf-groups.x86_ [...] adds a94c18fc200 Follow up of rL363913. NFC. adds bb6d0b8e7b0 [Support] Fix error handling in DataExtractor::get[US]LEB128 adds a5bb7b6c20e [libcxx] [test] Read files as bytestrings to fix py3 encodi [...] adds 3519d5535a4 [docs][llvm-nm] Improve symbol code documentation adds fe8017621ea [ARM] Add MVE interleaving load/store family. adds 853dfab799f [OpenCL] Remove more duplicates from opencl-c.h adds b502a44110f [OpenCL] Restore ATOMIC_VAR_INIT adds 078d711908a [sancov] Avoid unnecessary unique_ptr adds 2c5ff946277 [docs][llvm-nm] Add missing options to documentation adds 512b1187794 [Scalarizer] Add scalarizer support for smul.fix.sat adds 485a421876d [ConstantFolding] Use hasVectorInstrinsicScalarOpd. NFC adds 69144a925e7 [DAGCombine] visitMUL - allow shift by zero in MulByConstant. adds ca89eb5f9c9 [clangd] Improve SelectionTree string representation adds b617b0808de [InstCombine] SliceUpIllegalIntegerPHI - bail on out of ran [...] adds 942404d01b7 AMDGPU: Cleanup checking when spills need emergency slots adds 15e678e8438 [CUDA][HIP] Don't set comdat attribute for CUDA device stub [...] adds f27f794d473 [InstCombine] add tests for funnel-shift to bswap; NFC adds 60957cb74c8 AMDGPU: Fold frame index into MUBUF adds 5dbd9228c44 AMDGPU/GlobalISel: Fix RegBankSelect for s1 sext/zext/anyext adds 89efefb170e [InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X adds 2bc35b79380 Hexagon: Rename Register class adds db26bcda8cb [OPENMP]Relax the test checks to pacify 32bit buildbots, NFC. adds 3260ef16bbd [AMDGPU] Remove unused variable AllSGPRSpilledToVGPRs. NFC adds e3a676e9adb CodeGen: Introduce a class for registers adds 906d494b6e7 [analyzer] Fix JSON dumps for ExplodedNodes adds faeaedf8e93 GlobalISel: Remove unsigned variant of SrcOp adds f8f1ace5bb9 ARC: Fix -Wimplicit-fallthrough adds ae171f1e9fe Hexagon: Rename another copy of Register class adds 3a4a60eb6a7 [analyzer] print() JSONify: ProgramPoint revision adds 9f4c7e8170c [bindings/go] Add debug information accessors adds f8a841b88e2 AMDGPU/GlobalISel: Fix selecting G_IMPLICIT_DEF for s1 adds cf6917c6bdc [X86] Regenerate fast fadd reduction tests. NFCI adds f948f6b8628 [clang][NewPM] Remove exception handling before loading pgo [...] adds f336eb344c6 [clang][NewPM] Add RUNS for tests that produce slightly dif [...] adds 0f0bbbd4bbf [AArch64] Regenerate merge-store tests. NFCI. adds de1ce8230d2 [AArch64] Regenerate 2velem tests. NFCI. adds fd7d0d4e3ff [AArch64] Regenerate vcvt tests. NFCI. adds 033774e144b [X86] Cleanups and safety checks around the isFNEG adds 7fccb2ac5e3 [X86] Don't a vzext_movl in LowerBuildVectorv16i8/LowerBuil [...] adds d2fdb956e04 [AMDGPU] Allow any value in unused src0 field in v_nop adds 9c01eaff6aa Move common functionality from processwindows into processdebugger adds 6e04b92c896 [llvm-objdump] Match GNU objdump on symbol types shown in d [...] adds 8fcd5ade3e5 AMDGPU/GlobalISel: Split VALU s64 G_ZEXT/G_SEXT in RegBankSelect adds 318b6dafca2 [PowerPC][UpdateTestChecks] powerpc- triple support adds 14d0b646b7b AMDGPU/GlobalISel: RegBankSelect for amdgcn.class adds dbb6c031753 AMDGPU/GlobalISel: Select G_TRUNC adds 09ede9d65f1 [ABI] Implement Windows ABI for x86_64 adds 4412d83959f Remove flag for no longer supported MSVC version adds fe3f15cf900 [SLP] Support unary FNeg vectorization adds b2f09391cf8 [Tests] Add cases where we're failing to discharge provably [...] adds ea08248b2bc [CodeGen] Add missing vector type legalization for ctlz_zero_undef adds b1f01e27ec0 [clang-doc] Add basic support for templates and typedef adds 73901961ee1 [ABI] Remove unused variables in ABIWindows_x86_64 adds 94b43160963 [InstCombine] Regenerate test pr17827. NFCI. adds 9c8282a9b33 llvm-symbolizer: Add a FRAME command. adds a612e34c147 Augment location information when dumping the AST to JSON. adds 2aa800052ae [InstCombine] add tests for more variants of isPowerOf2; NFC adds f1ffc4305dd [CVP] Reenable nowrap flag inference adds 11cfa92a196 [Target] Hoist LanguageRuntime::GetDeclVendor adds 8242f35d507 NFC: DataExtractor: use decodeULEB128 to implement getULEB128 adds 6694b2b36bd (Reland with changes) Adding a function for setting coverag [...] adds 1e5116cbb3a [NFC][Reassociate] Add unary FNeg tests to fast-Reassociate [...] adds 5a89ba7343a InstCombine: Preserve nuw when reassociating nuw ops [1/3] adds 5d82ecd5d95 InstCombine: Preserve nuw when reassociating nuw ops [2/3] adds 80258425999 InstCombine: Preserve nuw when reassociating nuw ops [3/3] adds 5e69f27ef70 [Syntax] Do not glue multiple empty PP expansions to a sing [...] adds 3081f78776a [SLP] NFC: Fixed typo in comment adds 66e6e37447b Fix test failures when using a custom ABI namespace. adds b5e86e0b510 Add windows abi plugin, breakpointprecondition. adds 4bd4acc969f Fix test failures due to modified wording in Clang diagnostics. adds 868a394bb60 Don't link against the DebugSymbols private framework; try [...] adds 2100caf7f68 AMDGPU/GlobalISel: Add tests for regbankselect of v2s16 and/or/xor adds 8950d0a1f06 Fix test cl-response-file.c to work on all platforms includ [...] adds 2675b0c8abc [InstCombine] squash is-not-power-of-2 using ctpop adds 8a35afab1d9 [NFC] Add missing consts into memoryaccess_def_iterator adds 41c7d530035 [NVPTX][NFC] Fix documentation for shfl instructions. adds 1433b1b6ec7 [NFC] Fix tests added in r364225 which failed on Windows du [...] adds e75b1efa396 Revert "[NVPTX][NFC] Fix documentation for shfl instruction [...] adds 5495f781656 AMDGPU: Fix missing declaration for mbcnt builtins adds 323b89f101b [llvm-objcopy][MachO] Fix strict-aliasing warning. NFCI adds f895e1bded0 DataExtractor: use decodeSLEB128 to implement getSLEB128 adds 545f001d1b9 [llvm-objcopy][NFC] Refactor output target parsing adds 4626613ffe0 [InstCombine] Fold icmp eq/ne (and %x, C), 0 iff (-C) is p [...] adds 2cc3b3856e2 [InstCombine][NFC] Add test to show missing fold for icmp u [...] adds 49885b1245c [analyzer] ExprEngine: Escape pointers in bitwise operations adds c8e8b274f1c Reapply "Fix a crash in option parsing." adds 5b9d0205aae [sanitizer] Enabled getpw_getgr.cc on iOS adds 25bc27965a4 AMDGPU/GlobalISel: Fix regbankselect for amdgcn.class adds 81eb8284052 [llvm-objcopy][NFCI] Fix build failure with GCC adds 079924b0b7f Revert r363802, r363850, and r363856 "[TargetLowering] Simp [...] adds 7939ba08ab4 [cxx2a] P1236R1: the validity of a left shift does not depe [...] adds c48be7fc1cd [analyzer] Add more timers for performance profiling. adds b9c94f946f2 [analyzer] NFC: exploded-graph-rewriter: Extract some code [...] adds beb85ad66de [analyzer] exploded-graph-rewriter: Add support for range c [...] adds 14f4de9bb9d [analyzer] exploded-graph-rewriter: Fix escaping for bitwise-or. adds c55170c0310 [analyzer] JsonSupport: Escape escapes adds 0cdd13c05a1 [analyzer] print() JSONify: Create pointers adds 33e547bddeb [X86] Add test case that led to the revert of r363802, r363 [...] adds e63ae7fee4c Fix an issue that common symbols are not internalized under [...] adds fcad3bc4154 DWARF: Add support for type units+split dwarf combo adds 0d45eabcbb3 [LLVM-C] Add LLVM-C.dll to Windows installer package adds 7ada1c53009 Remove core loading timeout adds 79121e1d637 Add llvm-symbolizer to LLVM_TOOLCHAIN_TOOLS (PR40152) adds 78edad1bf18 [NFC] fix trivial typos in documents adds 303c9861e90 [ASTImporter] Store import errors for Decls adds 92c32574771 [clangd] Cleanup the duplicated getTokenRange. adds 3bc5ad551a4 [ExpandMemCmp] Move all options to TargetTransformInfo. adds 60dc5d4b61b [yaml2obj/obj2yaml] - Allow having the symbols and sections [...] adds 7276a446cec [clangd] Narrow rename to local symbols. adds 79f7831aa71 [clangd] Fix NestedNameSpecifierLoc in SelectionTree adds 0142b9ce318 Port r363962 to COFF: Deduplicate undefined symbol diagnostics adds cdd43eac4fe [Codegen] TargetLowering::SimplifySetCC(): omit urem when possible adds ecd9348aa17 [docs][llvm-cxxfilt] Write llvm-cxxfilt documentation adds a6fd919cb3f [ARM] DLS/LE low-overhead loop code generation adds 47b7d13459a [PowerPC] Emit XXSEL for vec_sel and code that has the same [...] adds 49b3778e32c [TargetLowering] SimplifyDemandedBits - legal checks for SI [...] new e6824160dd6 [ARM] Add MVE vector load/store instructions. new 86b7a1e660b [ARM] Add remaining miscellaneous MVE instructions. new d9654723ad8 [ARM] Extra MVE-related testing. new 4cf18c28495 [ARM] Explicit lowering of half <-> double conversions. new b23c942ce43 [VectorLegalizer] ExpandANY_EXTEND_VECTOR_INREG/ExpandZERO_ [...] new 08e8cb57602 AMDGPU/MC: Add .amdgpu_lds directive new 2710171a15e AMDGPU: Write LDS objects out as global symbols in code generation new 74ec25a197a [ARM] MVE VPT Blocks new 69fc111184f [TargetLowering] SimplifyDemandedBits SIGN_EXTEND_VECTOR_IN [...] new 287f0403e31 [ARM] Fix buildbot failure due to -Werror. The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clang-doc/BitcodeReader.cpp | 2 + clang-tools-extra/clang-doc/BitcodeWriter.cpp | 4 +- clang-tools-extra/clang-doc/BitcodeWriter.h | 1 + clang-tools-extra/clang-doc/Representation.h | 1 + clang-tools-extra/clang-doc/Serialize.cpp | 33 +- clang-tools-extra/clangd/ClangdServer.cpp | 8 +- clang-tools-extra/clangd/Selection.cpp | 15 +- clang-tools-extra/clangd/SourceCode.cpp | 11 + clang-tools-extra/clangd/SourceCode.h | 5 + clang-tools-extra/clangd/XRefs.cpp | 70 +- clang-tools-extra/clangd/refactor/Rename.cpp | 108 +- clang-tools-extra/clangd/refactor/Rename.h | 9 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 65 + .../clangd/unittests/SelectionTests.cpp | 10 +- .../unittests/clang-doc/BitcodeTest.cpp | 1 + .../unittests/clang-doc/ClangDocTest.cpp | 2 + .../unittests/clang-doc/SerializeTest.cpp | 78 +- clang/include/clang/AST/ASTImporter.h | 22 +- clang/include/clang/AST/JSONNodeDumper.h | 15 +- clang/include/clang/Basic/BuiltinsAMDGPU.def | 3 + clang/include/clang/Basic/JsonSupport.h | 23 +- .../StaticAnalyzer/Core/PathSensitive/ExprEngine.h | 2 +- .../Tooling/Refactoring/Rename/RenamingAction.h | 2 + clang/include/clang/Tooling/Syntax/Tokens.h | 26 + clang/lib/AST/ASTImporter.cpp | 98 +- clang/lib/AST/ExprConstant.cpp | 4 +- clang/lib/AST/JSONNodeDumper.cpp | 77 +- clang/lib/Analysis/ProgramPoint.cpp | 3 +- clang/lib/CodeGen/CGExprScalar.cpp | 3 +- clang/lib/CodeGen/CodeGenModule.cpp | 5 + clang/lib/Headers/opencl-c-base.h | 7 +- clang/lib/Headers/opencl-c.h | 29 - clang/lib/Sema/SemaExpr.cpp | 13 +- clang/lib/Sema/SemaTemplate.cpp | 5 +- .../lib/StaticAnalyzer/Core/BasicValueFactory.cpp | 10 +- clang/lib/StaticAnalyzer/Core/Environment.cpp | 7 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 12 +- clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp | 4 + clang/lib/StaticAnalyzer/Core/RegionStore.cpp | 6 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 43 +- .../Tooling/Refactoring/Rename/RenamingAction.cpp | 2 + clang/lib/Tooling/Syntax/Tokens.cpp | 183 +- clang/test/AST/ast-dump-comment-json.cpp | 589 ++--- clang/test/AST/ast-dump-decl-json.c | 630 +++-- clang/test/AST/ast-dump-decl-json.m | 544 ++--- clang/test/AST/ast-dump-enum-json.cpp | 187 +- clang/test/AST/ast-dump-expr-json.c | 1448 +++++------- clang/test/AST/ast-dump-expr-json.cpp | 2468 ++++++++------------ clang/test/AST/ast-dump-expr-json.m | 1369 ++++------- clang/test/AST/ast-dump-funcs-json.cpp | 427 ++-- clang/test/AST/ast-dump-if-json.cpp | 300 +-- clang/test/AST/ast-dump-macro-json.c | 106 +- clang/test/AST/ast-dump-namespace-json.cpp | 89 +- .../AST/ast-dump-record-definition-data-json.cpp | 1386 +++++------ clang/test/AST/ast-dump-records-json.cpp | 1145 ++++----- clang/test/AST/ast-dump-stmt-json.c | 1487 +++++------- clang/test/AST/ast-dump-stmt-json.cpp | 1866 ++++++--------- clang/test/AST/ast-dump-stmt-json.m | 246 +- clang/test/AST/ast-dump-template-decls-json.cpp | 724 +++--- clang/test/AST/ast-dump-temporaries-json.cpp | 103 +- clang/test/AST/ast-dump-types-json.cpp | 66 +- clang/test/AST/multistep-explicit-cast-json.c | 144 +- clang/test/AST/multistep-explicit-cast-json.cpp | 360 +-- .../ASTMerge/class-template-partial-spec/test.cpp | 2 - clang/test/Analysis/dump_egraph.c | 18 +- .../exploded-graph-rewriter/constraints.dot | 27 + .../exploded-graph-rewriter/constraints_diff.dot | 65 + .../exploded-graph-rewriter/environment.dot | 34 +- .../exploded-graph-rewriter/environment_diff.dot | 102 +- .../Analysis/exploded-graph-rewriter/escapes.c | 9 +- .../Analysis/exploded-graph-rewriter/store.dot | 30 +- .../exploded-graph-rewriter/store_diff.dot | 60 +- clang/test/Analysis/expr-inspection.c | 8 +- clang/test/Analysis/left-shift-cxx2a.cpp | 22 + clang/test/Analysis/symbol-escape.cpp | 33 + clang/test/CodeGen/pgo-sample.c | 13 +- clang/test/CodeGenCXX/cxx2a-left-shift.cpp | 19 + clang/test/CodeGenCXX/tail-padding.cpp | 8 +- clang/test/CodeGenOpenCL/builtins-amdgcn.cl | 12 + clang/test/CodeGenOpenCL/convergent.cl | 10 +- clang/test/Driver/cl-response-file.c | 2 +- clang/test/Headers/opencl-c-header.cl | 4 + clang/test/OpenMP/parallel_codegen.cpp | 4 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 16 + clang/test/SemaCXX/shift.cpp | 82 +- clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp | 15 + clang/unittests/AST/ASTImporterFixtures.cpp | 2 +- clang/unittests/AST/ASTImporterFixtures.h | 4 +- clang/unittests/AST/ASTImporterTest.cpp | 121 + clang/unittests/Tooling/Syntax/TokensTest.cpp | 5 +- clang/utils/analyzer/exploded-graph-rewriter.py | 105 +- clang/www/cxx_status.html | 2 +- compiler-rt/lib/profile/InstrProfiling.h | 21 +- compiler-rt/lib/profile/InstrProfilingFile.c | 64 +- compiler-rt/lib/profile/InstrProfilingUtil.c | 20 + compiler-rt/lib/profile/InstrProfilingUtil.h | 2 + .../profile/instrprof-set-file-object-merging.c | 43 + .../test/profile/instrprof-set-file-object.c | 31 + .../TestCases/Posix/getpw_getgr.cc | 1 - libcxx/include/__tuple | 2 +- libcxx/include/cmath | 2 +- libcxx/include/functional | 6 +- libcxx/include/math.h | 74 +- libcxx/include/memory | 208 +- libcxx/include/optional | 101 +- libcxx/include/tuple | 52 +- libcxx/include/type_traits | 145 +- .../libcxx/type_traits/lazy_metafunctions.pass.cpp | 58 +- .../views/span.tuple/tuple_size.fail.cpp | 4 +- ...ny_cast_request_invalid_value_category.fail.cpp | 4 +- .../any.cast/const_correctness.fail.cpp | 4 +- .../unique.ptr.ctor/pointer_deleter.fail.cpp | 4 - .../variant.variant/variant.assign/copy.fail.cpp | 2 +- libcxx/utils/libcxx/test/format.py | 14 +- lld/COFF/Chunks.cpp | 11 +- lld/COFF/SymbolTable.cpp | 67 +- lld/COFF/SymbolTable.h | 2 +- lld/ELF/Arch/PPC.cpp | 3 + lld/ELF/Arch/PPC64.cpp | 12 +- lld/ELF/Arch/X86_64.cpp | 4 +- lld/ELF/Symbols.cpp | 6 +- lld/ELF/Target.h | 2 +- lld/test/COFF/undefined-symbol-multi.s | 47 + lld/test/ELF/Inputs/i386-reloc-16-error.s | 3 - lld/test/ELF/Inputs/i386-reloc-16.s | 3 - lld/test/ELF/Inputs/i386-reloc-8-error.s | 3 - lld/test/ELF/Inputs/i386-reloc-8.s | 3 - lld/test/ELF/Inputs/x86-64-reloc-16-error.s | 3 - lld/test/ELF/Inputs/x86-64-reloc-16.s | 3 - lld/test/ELF/Inputs/x86-64-reloc-8-error.s | 3 - lld/test/ELF/Inputs/x86-64-reloc-8.s | 3 - lld/test/ELF/aarch64-abs16.s | 8 +- lld/test/ELF/aarch64-abs32.s | 8 +- lld/test/ELF/aarch64-prel16.s | 4 +- lld/test/ELF/aarch64-prel32.s | 4 +- lld/test/ELF/i386-reloc-16.s | 27 +- lld/test/ELF/i386-reloc-8.s | 27 +- lld/test/ELF/lto/common4.ll | 21 + lld/test/ELF/ppc32-reloc-addr.s | 10 +- lld/test/ELF/ppc64-addr16-error.s | 13 - lld/test/ELF/ppc64-reloc-addr.s | 25 + lld/test/ELF/x86-64-reloc-16.s | 14 - lld/test/ELF/x86-64-reloc-8-16.s | 25 + lld/test/ELF/x86-64-reloc-8.s | 14 - lldb/include/lldb/Target/LanguageRuntime.h | 3 + lldb/include/lldb/Target/ObjCLanguageRuntime.h | 3 - lldb/lit/Driver/Inputs/process_attach_pid.in | 2 + lldb/lit/Driver/TestProcessAttach.test | 2 + lldb/lit/SymbolFile/DWARF/debug-types-basic.test | 24 +- .../SymbolFile/DWARF/debug-types-expressions.test | 18 +- .../SymbolFile/DWARF/split-dwarf-multiple-cu.ll | 40 + lldb/lldb.xcodeproj/project.pbxproj | 70 +- .../lldbutil/iter/TestRegistersIterator.py | 1 - lldb/source/API/SBTarget.cpp | 55 +- lldb/source/API/SystemInitializerFull.cpp | 3 + lldb/source/Interpreter/Options.cpp | 13 +- lldb/source/Plugins/ABI/CMakeLists.txt | 1 + .../Plugins/ABI/SysV-x86_64/ABISysV_x86_64.cpp | 15 +- .../ABI/Windows-x86_64/ABIWindows_x86_64.cpp | 1805 ++++++++++++++ .../Plugins/ABI/Windows-x86_64/ABIWindows_x86_64.h | 99 + .../Plugins/ABI/Windows-x86_64/CMakeLists.txt | 10 + .../Plugins/Process/Windows/Common/CMakeLists.txt | 1 + .../Process/Windows/Common/ProcessDebugger.cpp | 572 +++++ .../Process/Windows/Common/ProcessDebugger.h | 101 + .../Process/Windows/Common/ProcessWindows.cpp | 473 +--- .../Process/Windows/Common/ProcessWindows.h | 21 +- .../Windows/Common/RegisterContextWindows.cpp | 19 +- .../Common/x64/RegisterContextWindows_x64.cpp | 172 +- .../Plugins/SymbolFile/DWARF/DWARFContext.cpp | 4 +- .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 5 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 5 +- .../Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp | 7 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 33 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h | 5 +- lldb/source/Symbol/LocateSymbolFileMacOSX.cpp | 32 +- lldb/source/Target/Process.cpp | 2 +- llvm/bindings/go/llvm/dibuilder.go | 90 + llvm/bindings/go/llvm/ir.go | 3 + llvm/cmake/modules/AddLLVM.cmake | 5 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 4 - llvm/docs/AMDGPUUsage.rst | 27 +- llvm/docs/CommandGuide/llvm-cxxfilt.md | 10 - llvm/docs/CommandGuide/llvm-cxxfilt.rst | 79 + llvm/docs/CommandGuide/llvm-nm.rst | 197 +- llvm/docs/CommandLine.rst | 2 +- llvm/docs/LangRef.rst | 2 +- llvm/include/llvm/Analysis/MemorySSA.h | 6 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 34 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 6 +- llvm/include/llvm/Analysis/VectorUtils.h | 9 +- llvm/include/llvm/BinaryFormat/ELF.h | 5 + llvm/include/llvm/CodeGen/CallingConvLower.h | 2 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 24 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 5 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 14 +- .../GlobalISel/LegalizationArtifactCombiner.h | 30 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 22 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 2 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 25 +- llvm/include/llvm/CodeGen/MachineInstrBuilder.h | 2 +- llvm/include/llvm/CodeGen/MachineOperand.h | 5 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 6 +- llvm/include/llvm/CodeGen/Register.h | 60 + llvm/include/llvm/CodeGen/SlotIndexes.h | 75 +- .../include/llvm/CodeGen/SwiftErrorValueTracking.h | 15 +- llvm/include/llvm/CodeGen/TargetLowering.h | 12 - llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 2 +- llvm/include/llvm/CodeGen/VirtRegMap.h | 4 +- llvm/include/llvm/DebugInfo/DIContext.h | 13 + llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 5 + llvm/include/llvm/DebugInfo/PDB/PDBContext.h | 3 + llvm/include/llvm/DebugInfo/Symbolize/DIPrinter.h | 2 + .../llvm/DebugInfo/Symbolize/SymbolizableModule.h | 2 + llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h | 3 + llvm/include/llvm/MC/MCSymbol.h | 26 +- llvm/include/llvm/Support/LEB128.h | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 29 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 6 +- llvm/lib/Analysis/VectorUtils.cpp | 10 +- .../AsmPrinter/DbgEntityHistoryCalculator.cpp | 4 +- llvm/lib/CodeGen/ExpandMemCmp.cpp | 49 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 8 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 10 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 224 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 376 +-- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 26 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 4 +- 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llvm/lib/Support/DataExtractor.cpp | 55 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 42 +- llvm/lib/Target/AArch64/AArch64CallLowering.h | 8 +- llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp | 6 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 210 +- .../AArch64/AArch64RedundantCopyElimination.cpp | 4 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 38 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 8 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 10 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 89 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 173 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 +- 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llvm/lib/Target/ARC/ARCRegisterInfo.cpp | 8 +- llvm/lib/Target/ARC/ARCRegisterInfo.h | 2 +- llvm/lib/Target/ARM/ARM.h | 3 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.h | 2 +- llvm/lib/Target/ARM/ARMCallLowering.cpp | 50 +- llvm/lib/Target/ARM/ARMCallLowering.h | 6 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 30 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 79 +- llvm/lib/Target/ARM/ARMInstrFormats.td | 2 + llvm/lib/Target/ARM/ARMInstrInfo.td | 9 + llvm/lib/Target/ARM/ARMInstrMVE.td | 711 ++++++ llvm/lib/Target/ARM/ARMInstrThumb2.td | 64 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 8 +- llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 295 +++ llvm/lib/Target/ARM/ARMRegisterInfo.td | 9 - llvm/lib/Target/ARM/ARMTargetMachine.cpp | 5 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 431 +++- llvm/lib/Target/ARM/CMakeLists.txt | 1 + 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llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 2 +- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 2 +- llvm/lib/Target/Sparc/SparcRegisterInfo.h | 2 +- llvm/lib/Target/SystemZ/SystemZElimCompare.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 54 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 8 +- llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZRegisterInfo.h | 2 +- .../Target/WebAssembly/WebAssemblyRegisterInfo.cpp | 4 +- .../Target/WebAssembly/WebAssemblyRegisterInfo.h | 2 +- llvm/lib/Target/X86/X86CallLowering.cpp | 38 +- llvm/lib/Target/X86/X86CallLowering.h | 6 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 20 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 52 +- llvm/lib/Target/X86/X86ISelLowering.h | 5 - llvm/lib/Target/X86/X86InstrAVX512.td | 16 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 6 +- llvm/lib/Target/X86/X86RegisterInfo.cpp | 2 +- llvm/lib/Target/X86/X86RegisterInfo.h | 8 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 41 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 4 +- llvm/lib/Target/XCore/XCoreRegisterInfo.cpp | 4 +- llvm/lib/Target/XCore/XCoreRegisterInfo.h | 2 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 36 + .../Transforms/InstCombine/InstCombineCalls.cpp | 7 + .../Transforms/InstCombine/InstCombineCompares.cpp | 20 +- llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp | 5 + .../InstCombine/InstructionCombining.cpp | 72 +- .../Scalar/CorrelatedValuePropagation.cpp | 2 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 10 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 2 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 34 +- llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll | 2101 +++++++++++++---- llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll | 143 +- llvm/test/CodeGen/AArch64/merge-store.ll | 44 +- .../CodeGen/AMDGPU/32-bit-local-address-space.ll | 4 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 160 +- 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| 82 + llvm/test/MC/ARM/fp-armv8-m.s | 140 ++ llvm/test/MC/ARM/fullfp16.s | 2 + llvm/test/MC/ARM/mve-fp-registers.s | 25 +- llvm/test/MC/ARM/mve-interleave.s | 270 +++ llvm/test/MC/ARM/mve-load-store.s | 1944 +++++++++++++++ llvm/test/MC/ARM/mve-misc.s | 176 ++ llvm/test/MC/ARM/no-mve.s | 16 + llvm/test/MC/ARM/ras-extension.s | 3 + llvm/test/MC/Disassembler/AMDGPU/nop.txt | 3 + llvm/test/MC/Disassembler/AMDGPU/vop1.txt | 3 + llvm/test/MC/Disassembler/AMDGPU/vop1_vi.txt | 3 + llvm/test/MC/Disassembler/ARM/mve-interleave.txt | 267 +++ llvm/test/MC/Disassembler/ARM/mve-load-store.txt | 1378 +++++++++++ llvm/test/MC/Disassembler/ARM/mve-misc.txt | 111 + .../MC/Disassembler/ARM/ras-extension-thumb.txt | 3 + llvm/test/Object/X86/obj2yaml-dup-section-name.s | 14 +- .../Transforms/CorrelatedValuePropagation/basic.ll | 18 +- .../Transforms/CorrelatedValuePropagation/deopt.ll | 4 +- .../Transforms/CorrelatedValuePropagation/icmp.ll | 4 +- .../Transforms/CorrelatedValuePropagation/range.ll | 2 +- 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29673 insertions(+), 14400 deletions(-) create mode 100644 clang/test/Analysis/exploded-graph-rewriter/constraints.dot create mode 100644 clang/test/Analysis/exploded-graph-rewriter/constraints_diff.dot create mode 100644 clang/test/Analysis/left-shift-cxx2a.cpp create mode 100644 clang/test/Analysis/symbol-escape.cpp create mode 100644 clang/test/CodeGenCXX/cxx2a-left-shift.cpp create mode 100644 compiler-rt/test/profile/instrprof-set-file-object-merging.c create mode 100644 compiler-rt/test/profile/instrprof-set-file-object.c create mode 100644 lld/test/COFF/undefined-symbol-multi.s delete mode 100644 lld/test/ELF/Inputs/i386-reloc-16-error.s delete mode 100644 lld/test/ELF/Inputs/i386-reloc-16.s delete mode 100644 lld/test/ELF/Inputs/i386-reloc-8-error.s delete mode 100644 lld/test/ELF/Inputs/i386-reloc-8.s delete mode 100644 lld/test/ELF/Inputs/x86-64-reloc-16-error.s delete mode 100644 lld/test/ELF/Inputs/x86-64-reloc-16.s delete mode 100644 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100644 llvm/docs/CommandGuide/llvm-cxxfilt.md create mode 100644 llvm/docs/CommandGuide/llvm-cxxfilt.rst create mode 100644 llvm/include/llvm/CodeGen/Register.h create mode 100644 llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir create mode 100644 llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir create mode 100644 llvm/test/CodeGen/AMDGPU/lds-relocs.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/over-max-lds-size.ll create mode 100644 llvm/test/CodeGen/ARM/mve-vpt-block2.mir create mode 100644 llvm/test/CodeGen/ARM/mve-vpt-block3.mir create mode 100644 llvm/test/CodeGen/ARM/mve-vpt-block4.mir create mode 100644 llvm/test/CodeGen/ARM/mve-vpt-block5.mir create mode 100644 llvm/test/CodeGen/ARM/mve-vpt-block6.mir create mode 100644 llvm/test/CodeGen/PowerPC/vec-select.ll create mode 100644 llvm/test/CodeGen/X86/vec_clz.ll create mode 100644 llvm/test/MC/AMDGPU/elf-lds-error.s create mode 100644 llvm/test/MC/AMDGPU/elf-lds.s create mode 100644 llvm/test/MC/ARM/fp-armv8-m.s create mode 100644 llvm/test/MC/ARM/mve-interleave.s create mode 100644 llvm/test/MC/ARM/mve-load-store.s create mode 100644 llvm/test/MC/ARM/mve-misc.s create mode 100644 llvm/test/MC/ARM/no-mve.s create mode 100644 llvm/test/MC/Disassembler/ARM/mve-interleave.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-load-store.txt create mode 100644 llvm/test/MC/Disassembler/ARM/mve-misc.txt create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/cond-mov.mir create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/massive.mir create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/multiblock-massive.mir create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/revert-after-call.mir create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/revert-after-spill.mir create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/size-limit.mir create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/switch.mir create mode 100644 llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll create mode 100644 llvm/test/Transforms/InstCombine/phi-shifts.ll create mode 100644 llvm/test/Transforms/InstCombine/shl-unsigned-cmp-const.ll delete mode 100644 llvm/test/tools/llvm-readobj/Inputs/elf-groups.x86_64 delete mode 100644 llvm/test/tools/llvm-readobj/print-section.test create mode 100644 llvm/test/tools/llvm-symbolizer/frame-fortran.s create mode 100644 llvm/test/tools/llvm-symbolizer/frame-types.s create mode 100644 llvm/test/tools/llvm-symbolizer/frame.s create mode 100644 llvm/test/tools/obj2yaml/duplicate-symbol-and-section-names.test create mode 100644 llvm/test/tools/yaml2obj/duplicate-section-names.test create mode 100644 llvm/test/tools/yaml2obj/duplicate-symbol-names.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (ed62c48c -> e96c30b7)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards ed62c48c 0: update: llvm-linux: boot new e96c30b7 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ed62c48c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-build_llvm/console.log | 11875 ++++++++++++++++++------------------ 03-build_linux/console.log | 738 +-- 04-boot_linux/console.log | 4 +- console.log | 12631 ++++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 6 files changed, 12644 insertions(+), 12626 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (c2be2080673 -> 21f32a9683f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from c2be2080673 Merging r361158: adds 4ebe62d309d Merging r359094: adds 464c365c0f7 Merging r360861: adds d37559239de Merging r361114: adds 21f32a9683f Merging r355033: No new revisions were added by this update. Summary of changes: clang/lib/Driver/ToolChains/Arch/PPC.cpp | 2 +- clang/test/Driver/netbsd.c | 5 ++++ libunwind/src/DwarfInstructions.hpp | 25 ++++++++++++++++++ libunwind/src/assembly.h | 18 ++++++++++++- libunwind/test/lit.cfg | 3 +++ lld/ELF/Arch/PPC64.cpp | 5 +++- lld/test/ELF/ppc64-long-branch-localentry-offset.s | 30 ++++++++++++++++++++++ lldb/lit/Driver/TestConvenienceVariables.test | 3 ++- lldb/lit/lit.cfg.py | 3 +++ 9 files changed, 90 insertions(+), 4 deletions(-) create mode 100644 lld/test/ELF/ppc64-long-branch-localentry-offset.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (1a650c77 -> da40ebfe)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 1a650c77 2: update: llvm-linux: 17398 new da40ebfe 2: update: llvm-linux: 17398 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1a650c77) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 11642 +++++++++++++++--------------- 03-build_linux/console.log | 3206 ++++----- 06-update_baseline/console.log | 42 +- console.log | 15056 ++++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 6 files changed, 15062 insertions(+), 15058 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[llvm] branch master updated (f755ea8045b -> 07e7622e7c1)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from f755ea8045b [ARM] MVE VPT Blocks new 07e7622e7c1 [TargetLowering] SimplifyDemandedBits SIGN_EXTEND_VECTOR_IN [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/TargetLowering.cpp | 12 ++++++------ test/CodeGen/X86/pmul.ll | 14 ++++++-------- test/CodeGen/X86/vselect.ll | 25 +++++++++++++++++-------- 3 files changed, 29 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[llvm] branch master updated (90f5eff5ac4 -> f755ea8045b)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 90f5eff5ac4 AMDGPU: Write LDS objects out as global symbols in code generation new f755ea8045b [ARM] MVE VPT Blocks The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/ARM/Thumb2ITBlockPass.cpp | 16 +++++-- test/CodeGen/ARM/mve-vpt-block2.mir | 77 ++++++++++++++++++++++++++++++ test/CodeGen/ARM/mve-vpt-block3.mir | 82 ++++++++++++++++++++++++++++++++ test/CodeGen/ARM/mve-vpt-block4.mir | 90 ++++++++++++++++++++++++++++++++++++ test/CodeGen/ARM/mve-vpt-block5.mir | 88 +++++++++++++++++++++++++++++++++++ test/CodeGen/ARM/mve-vpt-block6.mir | 84 +++++++++++++++++++++++++++++++++ 6 files changed, 433 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/ARM/mve-vpt-block2.mir create mode 100644 test/CodeGen/ARM/mve-vpt-block3.mir create mode 100644 test/CodeGen/ARM/mve-vpt-block4.mir create mode 100644 test/CodeGen/ARM/mve-vpt-block5.mir create mode 100644 test/CodeGen/ARM/mve-vpt-block6.mir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[gcc] branch master updated (14462095a3d -> 3a40508241c)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 14462095a3d Enable full GFortran library for AMD GCN new 367a3e90e8d Do not call strlen with NULL argument in libgcov. new 3a40508241c Remove dead code in df-scan.c (PR tree-optimization/90978). The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 7 +++++++ gcc/df-scan.c | 44 ++++++++++++------------------------------ libgcc/ChangeLog | 5 +++++ libgcc/libgcov-driver-system.c | 5 +++-- 4 files changed, 27 insertions(+), 34 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 12 months

[llvm] branch master updated (6fb3129d4f1 -> 90f5eff5ac4)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 6fb3129d4f1 [VectorLegalizer] ExpandANY_EXTEND_VECTOR_INREG/ExpandZERO_ [...] new f1a1a392dbc AMDGPU/MC: Add .amdgpu_lds directive new 90f5eff5ac4 AMDGPU: Write LDS objects out as global symbols in code generation The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: docs/AMDGPUUsage.rst | 27 +++---- include/llvm/BinaryFormat/ELF.h | 5 ++ include/llvm/MC/MCSymbol.h | 26 ++++--- lib/MC/ELFObjectWriter.cpp | 10 ++- lib/ObjectYAML/ELFYAML.cpp | 1 + lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 31 +++++++- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 10 +++ lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 + lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 58 +++++++++++++++ .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 27 +++++++ .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 7 ++ lib/Target/AMDGPU/SIFoldOperands.cpp | 22 ++++-- lib/Target/AMDGPU/SIISelLowering.cpp | 26 ++++++- lib/Target/AMDGPU/SIInstrInfo.cpp | 8 +-- lib/Target/AMDGPU/SIInstrInfo.td | 4 ++ lib/Target/AMDGPU/SIInstructions.td | 10 +++ lib/Target/AMDGPU/SIShrinkInstructions.cpp | 4 ++ test/CodeGen/AMDGPU/32-bit-local-address-space.ll | 4 +- test/CodeGen/AMDGPU/ds-sub-offset.ll | 3 +- test/CodeGen/AMDGPU/ds_read2.ll | 28 ++++---- test/CodeGen/AMDGPU/ds_write2.ll | 54 +++++++++----- test/CodeGen/AMDGPU/lds-initializer.ll | 2 +- test/CodeGen/AMDGPU/lds-relocs.ll | 63 +++++++++++++++++ test/CodeGen/AMDGPU/lds-size.ll | 1 - test/CodeGen/AMDGPU/lds-zero-initializer.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll | 12 +++- test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll | 10 ++- test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll | 15 ++-- test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 7 +- test/CodeGen/AMDGPU/local-memory.ll | 4 +- test/CodeGen/AMDGPU/merge-store-crash.ll | 3 +- test/CodeGen/AMDGPU/over-max-lds-size.ll | 14 ---- test/CodeGen/AMDGPU/promote-alloca-globals.ll | 3 +- test/CodeGen/AMDGPU/shl_add_ptr.ll | 18 ++++- test/CodeGen/AMDGPU/si-sgpr-spill.ll | 22 +++--- test/CodeGen/AMDGPU/target-cpu.ll | 1 - test/CodeGen/MIR/AMDGPU/machine-function-info.ll | 2 +- test/MC/AMDGPU/elf-lds-error.s | 19 +++++ test/MC/AMDGPU/elf-lds.s | 82 ++++++++++++++++++++++ tools/llvm-objcopy/ELF/Object.cpp | 27 +++---- tools/llvm-objcopy/ELF/Object.h | 1 + 41 files changed, 535 insertions(+), 139 deletions(-) create mode 100644 test/CodeGen/AMDGPU/lds-relocs.ll delete mode 100644 test/CodeGen/AMDGPU/over-max-lds-size.ll create mode 100644 test/MC/AMDGPU/elf-lds-error.s create mode 100644 test/MC/AMDGPU/elf-lds.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

[gcc] branch master updated (e5c2ee0d105 -> 14462095a3d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from e5c2ee0d105 [PR 90939] Remove outdated assert in ipcp_bits_lattice::meet_with new a4340c0d68e Create GCN-specific gthreads new 61b30ceddd6 Stub implementation of unwinding for AMD GCN. new 14462095a3d Enable full GFortran library for AMD GCN The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: config/ChangeLog | 5 + config/gthr.m4 | 1 + gcc/ChangeLog | 7 + gcc/config.gcc | 1 + gcc/config/gcn/gcn.c | 12 ++ libgcc/ChangeLog | 11 ++ libgcc/config/gcn/gthr-gcn.h | 163 +++++++++++++++++++++ libgcc/config/gcn/t-amdgcn | 3 +- .../{nvptx/nvptx-malloc.h => gcn/unwind-gcn.c} | 21 ++- libgcc/configure | 1 + libgfortran/ChangeLog | 6 + libgfortran/configure | 3 +- libgfortran/configure.ac | 3 +- 13 files changed, 227 insertions(+), 10 deletions(-) create mode 100644 libgcc/config/gcn/gthr-gcn.h copy libgcc/config/{nvptx/nvptx-malloc.h => gcn/unwind-gcn.c} (73%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years

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