Tcwg-commits June 2019

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15913 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os updated (22e217527d -> 999d6dff80)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os in repository toolchain/ci/binutils-gdb. from 22e217527d [gdb/testsuite] Add back missing debug for index-cache.exp adds 8af58ffe5d [gdb/testsuite] Compile varval twice, once without bad DWARF adds 3426ae5760 Arm: Allow version strings in the triplet regexp adds aa2f9bcf23 AArch64: Add missing CPSR flags adds 762c164d75 Remove lookup_minimal_symbol_solib_trampoline adds a68aa5d302 Ensure that when attempting to process an ARM Mach-O file wi [...] adds aa108c0c46 i386: Document memory size reference in assembler adds 696d5b3801 Automatic date update in version.in adds d7560e2df5 RISC-V: Make objdump disassembly work right for binary files. adds 65bd27298d Fix a few non-dash safe xstormy16 shell scripts. adds c1dc7af521 x86: allow VEX et al encodings in 16-bit (protected) mode adds 2b7bcc8740 x86: fold AVX scalar to/from int conversion insns adds 5ceb1f4d80 x86: add missing test adds ba85f98c42 This fixes a bug in the ARm assembler where an immediate ope [...] adds 3d507ff23b Fix two buglets in cp_print_value_fields patch adds 1b7f24cd6b Change arm_objfile_data_key to use type-safe registry adds e395f487b3 i386: Check vector length for scatter/gather prefetch instructions adds 0c823d25a6 Automatic date update in version.in adds 60d53d7f03 PowerPC notoc call stub tests adds c432bbbaaa [GOLD] R_PPC64_REL16_HIGH relocs adds f073a3e8c6 [GOLD] PowerPC linkage table error adds f60c61e60e [GOLD] PowerPC tweak relnum tests adds 999d6dff80 Plugin target handling No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 19 + bfd/config.bfd | 5 - bfd/configure | 15 +- bfd/configure.ac | 15 +- bfd/format.c | 9 +- bfd/mach-o-arm.c | 22 + bfd/mach-o.c | 13 +- bfd/targets.c | 8 +- bfd/version.h | 2 +- binutils/ChangeLog | 7 + binutils/bucomm.c | 12 +- elfcpp/ChangeLog | 6 + elfcpp/powerpc.h | 7 + gas/ChangeLog | 53 + gas/config/tc-arm.c | 13 +- gas/config/tc-i386.c | 4 +- gas/doc/c-i386.texi | 15 +- gas/testsuite/gas/arm/arch6zk.d | 4 +- gas/testsuite/gas/arm/arch6zk.s | 4 +- gas/testsuite/gas/arm/smc-bad.d | 3 + gas/testsuite/gas/arm/smc-bad.l | 8 + gas/testsuite/gas/arm/smc-bad.s | 14 + gas/testsuite/gas/arm/thumb32.d | 2 +- gas/testsuite/gas/arm/thumb32.s | 2 +- gas/testsuite/gas/i386/avx-16bit.d | 3274 +++++++ gas/testsuite/gas/i386/avx-16bit.s | 7 + gas/testsuite/gas/i386/avx512f-16bit.d | 13297 +++++++++++++++++++++++++++++ gas/testsuite/gas/i386/avx512f-16bit.s | 4 + gas/testsuite/gas/i386/bmi-16bit.d | 46 + gas/testsuite/gas/i386/bmi-16bit.s | 4 + gas/testsuite/gas/i386/bmi2-16bit.d | 51 + gas/testsuite/gas/i386/bmi2-16bit.s | 4 + gas/testsuite/gas/i386/i386.exp | 6 + gas/testsuite/gas/i386/inval-16.l | 2 +- gas/testsuite/gas/i386/inval-16.s | 2 +- gas/testsuite/gas/i386/lwp-16bit.d | 74 + gas/testsuite/gas/i386/lwp-16bit.s | 4 + gas/testsuite/gas/i386/tbm-16bit.d | 170 + gas/testsuite/gas/i386/tbm-16bit.s | 4 + gas/testsuite/gas/xstormy16/allinsn.sh | 2 +- gas/testsuite/gas/xstormy16/gcc.sh | 2 +- gdb/ChangeLog | 30 + gdb/arm-tdep.c | 44 +- gdb/cp-valprint.c | 2 +- gdb/features/aarch64-core.c | 7 +- gdb/features/aarch64-core.xml | 28 +- gdb/minsyms.c | 34 - gdb/minsyms.h | 12 - gdb/testsuite/ChangeLog | 8 + gdb/testsuite/gdb.cp/constexpr-field.exp | 3 +- gdb/testsuite/gdb.dwarf2/varval.exp | 423 +- gold/ChangeLog | 20 + gold/powerpc.cc | 57 +- ld/ChangeLog | 8 + ld/testsuite/ld-powerpc/callstub-1.d | 29 + ld/testsuite/ld-powerpc/callstub-1.s | 9 + ld/testsuite/ld-powerpc/callstub-2.d | 35 + ld/testsuite/ld-powerpc/callstub-2.s | 8 + ld/testsuite/ld-powerpc/powerpc.exp | 2 + opcodes/ChangeLog | 53 +- opcodes/i386-dis-evex-len.h | 84 + opcodes/i386-dis-evex-prefix.h | 8 +- opcodes/i386-dis-evex-w.h | 16 +- opcodes/i386-dis.c | 105 +- opcodes/riscv-dis.c | 6 +- 65 files changed, 17825 insertions(+), 421 deletions(-) create mode 100644 gas/testsuite/gas/arm/smc-bad.d create mode 100644 gas/testsuite/gas/arm/smc-bad.l create mode 100644 gas/testsuite/gas/arm/smc-bad.s create mode 100644 gas/testsuite/gas/i386/avx-16bit.d create mode 100644 gas/testsuite/gas/i386/avx-16bit.s create mode 100644 gas/testsuite/gas/i386/avx512f-16bit.d create mode 100644 gas/testsuite/gas/i386/avx512f-16bit.s create mode 100644 gas/testsuite/gas/i386/bmi-16bit.d create mode 100644 gas/testsuite/gas/i386/bmi-16bit.s create mode 100644 gas/testsuite/gas/i386/bmi2-16bit.d create mode 100644 gas/testsuite/gas/i386/bmi2-16bit.s create mode 100644 gas/testsuite/gas/i386/lwp-16bit.d create mode 100644 gas/testsuite/gas/i386/lwp-16bit.s create mode 100644 gas/testsuite/gas/i386/tbm-16bit.d create mode 100644 gas/testsuite/gas/i386/tbm-16bit.s mode change 100644 => 100755 gas/testsuite/gas/xstormy16/allinsn.sh mode change 100644 => 100755 gas/testsuite/gas/xstormy16/gcc.sh create mode 100644 ld/testsuite/ld-powerpc/callstub-1.d create mode 100644 ld/testsuite/ld-powerpc/callstub-1.s create mode 100644 ld/testsuite/ld-powerpc/callstub-2.d create mode 100644 ld/testsuite/ld-powerpc/callstub-2.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os updated (be80ed08f -> fde02e258)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2k6-Os in repository toolchain/ci/base-artifacts. discards be80ed08f 0: init: binutils-gcc-glibc: -5 new fde02e258 0: update: binutils-gcc-glibc: -5 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (be80ed08f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-master-arm-spec2 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 213 +- 02-prepare_abe/console.log | 322 +- 03-build_abe-binutils/console.log | 11209 ++-- 04-build_abe-stage1/console.log | 19668 +++--- 05-build_abe-linux/console.log | 296 +- 06-build_abe-glibc/console.log | 39317 ++++++------ 07-build_abe-stage2/console.log | 46652 +++++++------- 08-benchmark/benchmark-start.log | 2 +- 08-benchmark/benchmark.log | 20 +- 08-benchmark/console.log | 110 +- 09-check_regression/console.log | 18 +- 10-update_baseline/console.log | 16 +- console.log | 117811 +++++++++++++++++------------------ jenkins/manifest.sh | 22 +- 14 files changed, 117837 insertions(+), 117839 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-defconfig updated (f81cf61a6 -> 174f366aa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards f81cf61a6 0: update: llvm-linux: boot new 174f366aa 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f81cf61a6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11580 ++++++++++++++++--------------- 03-build_linux/console.log | 1748 ++--- 04-boot_linux/console.log | 390 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 25 - console.log | 13969 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 8 files changed, 13945 insertions(+), 13999 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (a5e83404f74 -> 318df1b8d27)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from a5e83404f74 PR tree-optimization/90883 * tree-ssa-dse.c (delete_dead_ [...] adds f71f416e56b Call finite_loop_p in RTL to get better finiteness information. adds 2386cf07d1f One line change onto r272731 adds e6ccd50e8b3 Fix misc stuff seen by clang-static-analyzer. adds 04a18b9b123 Fix warnings seen by clang in gcc/symbol-summary.h. adds 8e76c2d8999 2019-06-27 Richard Biener <rguenther(a)suse.de> adds 34cbbdac020 Fix ICE when __builtin_calloc has no LHS (PR tree-optimizat [...] adds 026d1259cc4 PR libstdc++/91012 fixfilesystem_error::what() string adds f3992640129 PR tree-optimization/89772 * gimple-fold.c (gimple_fold_b [...] adds 039c36f8146 2019-06-27 Richard Biener <rguenther(a)suse.de> adds 75f91b4e2e0 ix86: pass correct options to compiler for gfni-4 testcase adds 22eb1ed592e Remove quite obvious dead assignments. adds 994750ace69 PR target/90991 * config/i386/sse.md (avx_vec_concat<mode [...] adds aefd11c50b2 Fix various issues seen with clang-static-analyzer. adds 98c0f4eab8f * class.c (layout_class_type): Set TYPE_CXX_ODR_P for as-b [...] adds 5b66642480e * lto-common.c: tree-pretty-print.h (type_streaming_finis [...] adds e321c967c5b Revert 2019-06-26 David Edelsohn <dje.gcc [...] adds 287d9f9b106 2019-06-27 Bill Schmidt <wschmidt(a)linux.ibm.com> adds f135a8d4eca 2019-06-27 Aaron Sawdey <acsawdey(a)linux.ibm.com> adds cbbdeb30f53 2019-06-27 Steven G. Kargl <kargl(a)gcc.gnu.org> adds d094ea44490 [Darwin, PPC] Do not use longcall for 64b code. adds 3c3d8e04ffe [Darwin, PPC] Correct whitespace in specs. adds ba037a7a594 [Darwin, PPC] Allow the user to override the use of hard fl [...] adds d43b7a0fca6 PR tree-optimization/91010 * tree-vect-stmts.c (scan_oper [...] adds df47a8c7f4b PR c++/91024 * gimplify.c (collect_fallthrough_labels): I [...] adds d1ca0650375 PR c++/55442 - memory-hog with highly recursive constexpr. adds 05f69af8f19 Add --disable-tm-clone-registry libgcc configure option. adds 318df1b8d27 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 259 +++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/asan.c | 4 +- gcc/bt-load.c | 1 - gcc/builtins.c | 10 +- gcc/c-family/ChangeLog | 5 + gcc/c-family/c.opt | 4 + gcc/cfgexpand.c | 9 +- gcc/cfghooks.c | 2 - gcc/cfgloopmanip.c | 1 - gcc/cfgrtl.c | 1 - gcc/cgraph.c | 2 - gcc/combine.c | 1 - gcc/config.gcc | 4 +- gcc/config/aarch64/aarch64-protos.h | 4 +- gcc/config/aarch64/aarch64.c | 4 +- gcc/config/aarch64/aarch64.h | 2 +- gcc/config/aarch64/aarch64.md | 6 +- gcc/config/alpha/alpha.h | 2 +- gcc/config/alpha/alpha.md | 6 +- gcc/config/arc/arc-protos.h | 2 +- gcc/config/arc/arc.c | 6 +- gcc/config/arc/arc.h | 2 +- gcc/config/arc/arc.md | 4 +- gcc/config/arm/arm-protos.h | 6 +- gcc/config/arm/arm.c | 18 +- gcc/config/arm/arm.md | 8 +- gcc/config/arm/thumb1.md | 4 +- gcc/config/avr/avr-protos.h | 4 +- gcc/config/avr/avr.c | 14 +- gcc/config/avr/avr.md | 32 +-- gcc/config/bfin/bfin-protos.h | 2 +- gcc/config/bfin/bfin.c | 12 +- gcc/config/bfin/bfin.h | 2 +- gcc/config/bfin/bfin.md | 4 +- gcc/config/c6x/c6x-protos.h | 2 +- gcc/config/c6x/c6x.c | 4 +- gcc/config/c6x/c6x.md | 4 +- gcc/config/frv/frv.md | 2 +- gcc/config/ft32/ft32.md | 2 +- gcc/config/h8300/h8300.md | 4 +- gcc/config/i386/i386-expand.c | 41 ++-- gcc/config/i386/i386-protos.h | 2 +- gcc/config/i386/i386.c | 13 +- gcc/config/i386/i386.h | 2 +- gcc/config/i386/i386.md | 6 +- gcc/config/i386/sse.md | 70 ++++-- gcc/config/lm32/lm32.md | 2 +- gcc/config/m32c/blkmov.md | 12 +- gcc/config/m32c/m32c-protos.h | 2 +- gcc/config/m32c/m32c.c | 10 +- gcc/config/m32r/m32r.c | 4 +- gcc/config/m32r/m32r.md | 4 +- gcc/config/mcore/mcore.md | 2 +- gcc/config/microblaze/microblaze.c | 2 +- gcc/config/microblaze/microblaze.md | 2 +- gcc/config/mips/mips.c | 10 +- gcc/config/mips/mips.h | 10 +- gcc/config/mips/mips.md | 2 +- gcc/config/nds32/nds32-memory-manipulation.c | 30 +-- gcc/config/nds32/nds32-multiple.md | 4 +- gcc/config/nds32/nds32-protos.h | 2 +- gcc/config/pa/pa.c | 6 +- gcc/config/pa/pa.md | 14 +- gcc/config/pdp11/pdp11.md | 16 +- gcc/config/riscv/riscv.c | 2 +- gcc/config/riscv/riscv.h | 8 +- gcc/config/riscv/riscv.md | 2 +- gcc/config/rs6000/darwin.h | 2 +- gcc/config/rs6000/rs6000.c | 20 +- gcc/config/rs6000/rs6000.md | 2 +- gcc/config/rx/rx.md | 12 +- gcc/config/s390/s390-protos.h | 2 +- gcc/config/s390/s390.c | 18 +- gcc/config/s390/s390.md | 16 +- gcc/config/sh/sh.md | 2 +- gcc/config/sparc/sparc.h | 2 +- gcc/config/vax/vax-protos.h | 1 - gcc/config/vax/vax.h | 2 +- gcc/config/vax/vax.md | 8 +- gcc/config/visium/visium.h | 4 +- gcc/config/visium/visium.md | 2 +- gcc/config/xtensa/xtensa.md | 2 +- gcc/cp/ChangeLog | 23 ++ gcc/cp/class.c | 5 +- gcc/cp/constexpr.c | 29 ++- gcc/cp/decl.c | 2 +- gcc/cp/parser.c | 2 +- gcc/cp/pt.c | 4 +- gcc/cp/rtti.c | 4 +- gcc/cp/typeck.c | 2 - gcc/cselib.c | 3 +- gcc/defaults.h | 6 +- gcc/df-scan.c | 2 - gcc/doc/install.texi | 5 + gcc/doc/invoke.texi | 19 +- gcc/doc/md.texi | 26 ++- gcc/doc/rtl.texi | 2 +- gcc/doc/tm.texi | 4 +- gcc/dojump.c | 2 - gcc/early-remat.c | 1 - gcc/emit-rtl.c | 2 +- gcc/expr.c | 10 +- gcc/fortran/ChangeLog | 8 +- gcc/fortran/match.c | 28 ++- gcc/gimple-fold.c | 10 +- gcc/gimplify.c | 2 + gcc/graphite-scop-detection.c | 2 - gcc/ipa-cp.c | 3 - gcc/ipa-devirt.c | 45 ++++ gcc/ipa-utils.h | 3 + gcc/ira-color.c | 1 - gcc/ira.c | 3 +- gcc/loop-iv.c | 14 ++ gcc/lra-eliminations.c | 1 - gcc/lra.c | 8 +- gcc/lto/ChangeLog | 17 ++ gcc/lto/lto-common.c | 136 ++++++++++- gcc/lto/lto-dump.c | 19 +- gcc/optabs.c | 4 +- gcc/optabs.def | 2 +- gcc/read-rtl.c | 4 +- gcc/regrename.c | 3 +- gcc/reorg.c | 3 +- gcc/symbol-summary.h | 14 +- gcc/target.def | 4 +- gcc/targhooks.c | 6 +- gcc/testsuite/ChangeLog | 57 ++++- gcc/testsuite/g++.dg/lto/alias-2_0.C | 31 +++ gcc/testsuite/g++.dg/lto/alias-2_1.C | 16 ++ gcc/testsuite/g++.dg/torture/pr34850.C | 3 +- gcc/testsuite/g++.dg/vect/simd-10.cc | 8 + .../g++.dg/warn/Wimplicit-fallthrough-4.C | 22 ++ gcc/testsuite/gcc.dg/builtin-memchr-4.c | 40 ++++ gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-69.c | 32 +++ gcc/testsuite/gcc.target/i386/avx2-pr90991-1.c | 50 ++++ gcc/testsuite/gcc.target/i386/avx512dq-pr90991-2.c | 47 ++++ gcc/testsuite/gcc.target/i386/gfni-4.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr62147.c | 24 ++ gcc/testsuite/gcc.target/s390/pr91014.c | 8 + gcc/testsuite/gfortran.dg/common_1.f | 14 ++ gcc/testsuite/gfortran.dg/common_26.f90 | 14 ++ gcc/tree-inline.c | 4 +- gcc/tree-ssa-dse.c | 5 +- gcc/tree-ssa-reassoc.c | 3 - gcc/tree-ssa-sccvn.c | 2 +- gcc/tree-ssa-sink.c | 1 - gcc/tree-ssa-threadedge.c | 1 - gcc/tree-vect-loop.c | 9 +- gcc/tree-vect-stmts.c | 11 +- gcc/tree.c | 11 +- libgcc/ChangeLog | 19 ++ libgcc/Makefile.in | 4 +- libgcc/configure | 15 ++ libgcc/configure.ac | 10 + libgcc/libgcov-driver-system.c | 4 +- libgcc/libgcov-util.c | 8 +- libstdc++-v3/ChangeLog | 10 + libstdc++-v3/src/c++17/fs_path.cc | 14 +- .../27_io/filesystem/filesystem_error/cons.cc | 13 +- 160 files changed, 1421 insertions(+), 426 deletions(-) create mode 100644 gcc/testsuite/g++.dg/lto/alias-2_0.C create mode 100644 gcc/testsuite/g++.dg/lto/alias-2_1.C create mode 100644 gcc/testsuite/g++.dg/vect/simd-10.cc create mode 100644 gcc/testsuite/g++.dg/warn/Wimplicit-fallthrough-4.C create mode 100644 gcc/testsuite/gcc.dg/builtin-memchr-4.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-69.c create mode 100644 gcc/testsuite/gcc.target/i386/avx2-pr90991-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512dq-pr90991-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr62147.c create mode 100644 gcc/testsuite/gcc.target/s390/pr91014.c create mode 100644 gcc/testsuite/gfortran.dg/common_1.f create mode 100644 gcc/testsuite/gfortran.dg/common_26.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (65bd27298d -> 999d6dff80)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from 65bd27298d Fix a few non-dash safe xstormy16 shell scripts. adds c1dc7af521 x86: allow VEX et al encodings in 16-bit (protected) mode adds 2b7bcc8740 x86: fold AVX scalar to/from int conversion insns adds 5ceb1f4d80 x86: add missing test adds ba85f98c42 This fixes a bug in the ARm assembler where an immediate ope [...] adds 3d507ff23b Fix two buglets in cp_print_value_fields patch adds 1b7f24cd6b Change arm_objfile_data_key to use type-safe registry adds e395f487b3 i386: Check vector length for scatter/gather prefetch instructions adds 0c823d25a6 Automatic date update in version.in adds 60d53d7f03 PowerPC notoc call stub tests adds c432bbbaaa [GOLD] R_PPC64_REL16_HIGH relocs adds f073a3e8c6 [GOLD] PowerPC linkage table error adds f60c61e60e [GOLD] PowerPC tweak relnum tests adds 999d6dff80 Plugin target handling No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 11 + bfd/config.bfd | 5 - bfd/configure | 15 +- bfd/configure.ac | 15 +- bfd/format.c | 9 +- bfd/targets.c | 8 +- bfd/version.h | 2 +- elfcpp/ChangeLog | 6 + elfcpp/powerpc.h | 7 + gas/ChangeLog | 41 + gas/config/tc-arm.c | 13 +- gas/config/tc-i386.c | 4 +- gas/testsuite/gas/arm/arch6zk.d | 4 +- gas/testsuite/gas/arm/arch6zk.s | 4 +- gas/testsuite/gas/arm/smc-bad.d | 3 + gas/testsuite/gas/arm/smc-bad.l | 8 + gas/testsuite/gas/arm/smc-bad.s | 14 + gas/testsuite/gas/arm/thumb32.d | 2 +- gas/testsuite/gas/arm/thumb32.s | 2 +- gas/testsuite/gas/i386/avx-16bit.d | 3274 +++++++ gas/testsuite/gas/i386/avx-16bit.s | 7 + gas/testsuite/gas/i386/avx512f-16bit.d | 13297 +++++++++++++++++++++++++++++ gas/testsuite/gas/i386/avx512f-16bit.s | 4 + gas/testsuite/gas/i386/bmi-16bit.d | 46 + gas/testsuite/gas/i386/bmi-16bit.s | 4 + gas/testsuite/gas/i386/bmi2-16bit.d | 51 + gas/testsuite/gas/i386/bmi2-16bit.s | 4 + gas/testsuite/gas/i386/i386.exp | 6 + gas/testsuite/gas/i386/inval-16.l | 2 +- gas/testsuite/gas/i386/inval-16.s | 2 +- gas/testsuite/gas/i386/lwp-16bit.d | 74 + gas/testsuite/gas/i386/lwp-16bit.s | 4 + gas/testsuite/gas/i386/tbm-16bit.d | 170 + gas/testsuite/gas/i386/tbm-16bit.s | 4 + gdb/ChangeLog | 13 + gdb/arm-tdep.c | 30 +- gdb/cp-valprint.c | 2 +- gdb/testsuite/ChangeLog | 4 + gdb/testsuite/gdb.cp/constexpr-field.exp | 3 +- gold/ChangeLog | 20 + gold/powerpc.cc | 57 +- ld/ChangeLog | 8 + ld/testsuite/ld-powerpc/callstub-1.d | 29 + ld/testsuite/ld-powerpc/callstub-1.s | 9 + ld/testsuite/ld-powerpc/callstub-2.d | 35 + ld/testsuite/ld-powerpc/callstub-2.s | 8 + ld/testsuite/ld-powerpc/powerpc.exp | 2 + opcodes/ChangeLog | 45 + opcodes/i386-dis-evex-len.h | 84 + opcodes/i386-dis-evex-prefix.h | 8 +- opcodes/i386-dis-evex-w.h | 16 +- opcodes/i386-dis.c | 105 +- 52 files changed, 17446 insertions(+), 154 deletions(-) create mode 100644 gas/testsuite/gas/arm/smc-bad.d create mode 100644 gas/testsuite/gas/arm/smc-bad.l create mode 100644 gas/testsuite/gas/arm/smc-bad.s create mode 100644 gas/testsuite/gas/i386/avx-16bit.d create mode 100644 gas/testsuite/gas/i386/avx-16bit.s create mode 100644 gas/testsuite/gas/i386/avx512f-16bit.d create mode 100644 gas/testsuite/gas/i386/avx512f-16bit.s create mode 100644 gas/testsuite/gas/i386/bmi-16bit.d create mode 100644 gas/testsuite/gas/i386/bmi-16bit.s create mode 100644 gas/testsuite/gas/i386/bmi2-16bit.d create mode 100644 gas/testsuite/gas/i386/bmi2-16bit.s create mode 100644 gas/testsuite/gas/i386/lwp-16bit.d create mode 100644 gas/testsuite/gas/i386/lwp-16bit.s create mode 100644 gas/testsuite/gas/i386/tbm-16bit.d create mode 100644 gas/testsuite/gas/i386/tbm-16bit.s create mode 100644 ld/testsuite/ld-powerpc/callstub-1.d create mode 100644 ld/testsuite/ld-powerpc/callstub-1.s create mode 100644 ld/testsuite/ld-powerpc/callstub-2.d create mode 100644 ld/testsuite/ld-powerpc/callstub-2.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (81d55726d -> 71dcd5bff)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 81d55726d 0: update: binutils-gcc-linux: all new 71dcd5bff 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (81d55726d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 42 +- 03-build_abe-binutils/console.log | 10683 +++++++-------- 04-build_abe-stage1/console.log | 14580 ++++++++++---------- 05-build_linux/console.log | 1038 +- 06-boot_linux/console.log | 6 +- console.log | 26527 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 8 files changed, 26517 insertions(+), 26503 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[llvm] branch master updated (5dcd620f4b7 -> 3b9e91d9041)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5dcd620f4b7 [X86] Connect the output chain properly when combining vzex [...] new 3b9e91d9041 [ARM] MVE vector shuffles The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/ARM/ARMISelLowering.cpp | 189 +++++++---- lib/Target/ARM/ARMISelLowering.h | 3 +- lib/Target/ARM/ARMInstrInfo.td | 20 ++ lib/Target/ARM/ARMInstrMVE.td | 102 ++++++ lib/Target/ARM/ARMInstrNEON.td | 224 ++++++------- test/CodeGen/Thumb2/mve-bitcasts.ll | 3 +- test/CodeGen/Thumb2/mve-shuffle.ll | 615 ++++++++++++++++++++++++++++++++++++ test/CodeGen/Thumb2/mve-vdup.ll | 138 ++++++++ 8 files changed, 1110 insertions(+), 184 deletions(-) create mode 100644 test/CodeGen/Thumb2/mve-shuffle.ll create mode 100644 test/CodeGen/Thumb2/mve-vdup.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[llvm] branch master updated (5550ec1afa6 -> 5dcd620f4b7)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5550ec1afa6 Silence gcc warning in testcase [NFC] new 5dcd620f4b7 [X86] Connect the output chain properly when combining vzex [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (852f45ba88a -> e832adea0ff)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 852f45ba88a gn build: Follow-up to r364491 "[GN] Update build files" adds 0f651685667 [clang] Add DISuprogram and DIE for a func decl adds e62456b3537 [lldb] [Plugins/SysV-x86_64] NetBSD is also using SysV ABI adds bfcc9968109 Fix GCC 4 build after r364464 adds 41825040f62 Fix -Wunused-variable warnings after r364464 adds a7cde103c18 [MachineFunction] Base support for call site info tracking adds 7b81b613686 Silence gcc warning after r364458 adds 8479240b0a6 [AMDGPU] Fix +DumpCode to print an entry label for the firs [...] adds 69ce1c13196 [GlobalISel] Allow multiple VRegs in ArgInfo. NFC adds c3dbe239779 [GlobalISel] Accept multiple vregs in lowerFormalArgs adds 8138996128c [GlobalISel] Accept multiple vregs for lowerCall's result adds 43fb5ae50c5 [GlobalISel] Accept multiple vregs for lowerCall's args adds 253b53b2ecf [AArch64 GlobalISel] Cleanup CallLowering. NFCI adds 74a50a723bf [GlobalISel] Remove [un]packRegs from IRTranslator adds d528bcd9657 [DebugInfo] Avoid register coalesing unsoundly changing DBG [...] adds 7eeeb5947ec [ISEL][X86] Tracking of registers that forward call arguments adds 687d47c2b0c [yaml2obj] - Allow overriding e_shentsize, e_shoff, e_shnum [...] adds 90e121fbe6b [X86][AVX] SimplifyDemandedVectorElts - combine PERMPD(x) - [...] adds 5cd77f98a1a [clangd] Address limitations in SelectionTree: adds d45b4f861e6 [X86][SSE] Regenerate v48 shuffle test on a variety of targets adds 5360589b7d0 [Attributor] Deducing existing nounwind attribute. adds cfe9d0fb2bb [Object/invalid.test] - Convert most of the sub tests to YAML. adds 22c96a966b1 IR: compare type attributes deeply when looking into functions. adds 3ca8f2b007c Add triple to a test I just added. adds 3b184cf7e10 [mips] Reformat MSA instruction definitions. NFC adds bf5fc620d95 [mips] Fix indentation and split long lines. NFC adds 8c35c438162 [mips] Add GPR_64 predicate to some mov[zn] instructions adds cbab10099d6 [clangd] No need to setTraversalScope in SemanticHighlighting. adds f4f608d1f49 [LLD][ELF] - Replace invalid-e_shnum.s with YAML based version. adds c5cff5d3d16 [X86] getFauxShuffle - add DemandedElts as a filter adds 02449f9c3cf [ARM] Tighten restrictions on use of SP in v8.1-M CSEL. adds e5ce56fb950 [ARM] Make coprocessor number restrictions consistent. adds ffb2b347ffb [ARM] Fix handling of zero offsets in LOB instructions. adds 1a3dc8f6784 [ARM] Fix bogus assertions in copyPhysReg v8.1-M cases. adds 79dc930c131 [clang-tidy] Fix NDEBUG build [NFC] adds 71d3869f60c [Backend] Keep call site info valid through the backend adds 93a825c8fb9 [clangd] Fix a case where we fail to detect a header-declar [...] adds a056684c335 [docs][tools] Add missing "program" tags to rst files adds 7c83f0705a8 [mips] Add new items to the list of features unsupported by P5600 adds e9ec0b6f094 [mips] Mark pseudo select instructions by the `hasNoSchedul [...] adds c692a8dc51d [TargetLowering] SimplifyDemandedBits - use DemandedElts to [...] adds a0d45058ebb [DWARF] Handle the DW_OP_entry_value operand adds 408fc0849ea Revert r363658 "[SVE][IR] Scalable Vector IR Type with pr42 [...] adds 157b073fa54 [PowerPC][HTM] Fix disassembling buffer overflow for tabort [...] adds 93184302370 Provide hashers for string_view only if they are using the [...] adds d0e098696f9 [InstCombine] remove 'tmp' names and regenerate checks; NFC adds d44cb7a6567 [scudo][standalone] Introduce the C & C++ wrappers [fixed] adds 83e1a1e79b5 [TargetLowering] SimplifyDemandedVectorElts - add shift/rot [...] adds 7a9ca67fd55 [LiveRangeEdit] Fix build failure caused by the rL364536 adds a4771e9dfdb Bitcode: derive all types used from records instead of Values. adds 6b8a2515baa [clangd] Emit semantic highlighting tokens when the main AS [...] adds 92b32a90870 [docs][llvm-nm][llvm-objdump] Improve "See Also" section adds d6a46aff591 [LiveDebugValues] Emit the debug entry values adds 7d8274d54d0 Followup to revision 364545: Turns out that clang issues di [...] adds 3b77583e952 [Attr] Add "willreturn" function attribute adds 1339f74b8a3 [debug-info] Make a couple of tests more robust. adds 9f7f5858fe4 Recommit [PowerPC] Update P9 vector costs for insert/extrac [...] adds c3ab38eaa97 Revert Add github lockdown app to auto-close pull requests. adds 41e20d21015 [llvm-nm] Fix for BZ41711 - Class character for a symbol wi [...] adds 8747c5f4828 [ARM] Fix formatting issue in ARMISelLowering.cpp adds 74343eba37c [X86] getTargetVShiftByConstNode - reduce variable scope. NFCI. adds 3b4a667854e Add a sanity check to the domain socket tests. adds 0627b09863b [CodeGen] [SelectionDAG] More efficient code for X % C == 0 [...] adds e9a2f4fe2ca Use getConstantOperandAPInt instead of getConstantOperandVa [...] adds 152dd3b8542 [ARM] Move low overhead loop codegen tests into a separate [...] adds 32ef9292bea AMDGPU: Make fixing i1 copies robust against re-ordering adds a166b903d0e Fix lld build on Windows with MSVC due to C2461 adds 0a2b7b79fac Revert "[CodeGen] [SelectionDAG] More efficient code for X [...] adds 1fd1c609795 [X86] combineX86ShufflesRecursively - merge shuffles with m [...] adds 6b3f56b65fa [WebAssembly] Fix p2align in assembler. adds 774eabd0978 Revert "[LiveDebugValues] Emit the debug entry values" adds bb55ece2692 [OPENMP][NVPTX]Relax flush directive. adds 2dcd2c2493b [llvm-objdump] Update the doc for --disassemble-functions. adds 954014a0fac Add a missing '__uncvref_t' to the SFINAE constraints for o [...] adds f288cf9dfa1 [OPENMP]Generate correctly implicit flags for mapped data. adds bfd3f694805 [WebAssembly] AsmParser: better atomic inst detection adds c5486b23bc7 Correct the file path. NFC. adds bd34e50cf0a [NFC][CodeGen] Add negative test for X u% C == 0 fold (D63391) adds 1cf9e72cbc0 Update -analyze -scalar-evolution output for multiple exit [...] adds 6ed459fd41c Use "willreturn" in isGuaranteedToTransferExecutionToSuccessor adds c627aa2fa9c [PowerPC][NFC] Remove unused (and unsupported) fusion featu [...] adds f7a19f684bd [GN] Set exit code to 1 if changes are needed adds 564b03729b2 [GN] Update build file adds a95ca2b5ff1 [x86] prevent crashing from select narrowing with AVX512 adds 223df5b5402 [libcxxabi] Use an explicit list to export symbols from the dylib adds 22afca2ce02 [NFC][GVN] Pre-commit unary FNeg tests to fpmath.ll adds 7ecf1ec49a8 [x86] remove whitespace; NFC adds 559c6e17cd8 Make nrvo-string test more robust. adds fa36593f4c0 Convert line endings to LF. adds 8007ff1ab15 [compiler-rt] Rename lit.*.cfg.* -> lit.*.cfg.py.* adds 6e62a796d50 [GVN] Add support for unary FNeg to GVN pass adds 379a9f5e240 [sanitizer_common] Switch from zx_clock_get_new to zx_clock_get adds d9a59aeb049 [libFuzzer] Migrate to the new exception syscalls on Fuchsia adds 3b56e390dd1 Pattern match struct types in test case. adds 24dba1fe972 [WebAssembly] Enable an atomic.notify MC test adds 30cab5d6eef [NFC][GVNSink] Pre-commit unary FNeg test to fpmath.ll adds 4a8dc615346 [JITLink][MachO/x86-64] Add a testcase for X86_64_RELOC_GOT. adds a59cf878223 [NFC][APInt] Add (exhaustive) test for multiplicativeInverse() adds 29d05c005fa [CodeGen] [SelectionDAG] More efficient code for X % C == 0 [...] adds 13fde7a89a5 [analyzer] Fix clang-tidy crash on GCCAsmStmt adds c29abb50f29 Revert "[JITLink][MachO/x86-64] Add a testcase for X86_64_R [...] adds d11ea6518c1 hwasan: Teach the runtime to identify the local variable be [...] adds 5378afc02a3 hwasan: Use llvm.read_register intrinsic to read the PC on [...] adds 559b2e0187a hwasan: Fix an off-by-one error in PrintTagsAroundAddr. adds 4fcf0004fa7 [LangRef] Clarify codegen expectations for intrinsics with [...] adds ddc2804e1a5 Fix ASAN error caused by commit r364512. adds 92e625c2233 [InlineCost] make InlineCost assignable adds ecb7ac35f9d [GlobalISel][IRTranslator] Fix some PHI bugs related to jum [...] adds 9a89d657b1a Fixing a couple of wrong logical operator bugs. adds 5e66db6b8cd GlobalISel: Convert rest of MachineIRBuilder to using Register adds 1178dc3d0bf AMDGPU/GlobalISel: Convert to using Register adds c6fe8436e88 [PowerPC][NFC] Use `|=` to update `Simplified` flag adds 3018d1845b6 GlobalISel: Use Register adds 07fd88d7358 [AMDGPU] Packed thread ids in function call ABI adds 588a1709703 [NFC][PowerPC] Move XS*QP series instruction apart from XS* [...] adds 3b715d67dde [Support] Add fs::getUmask() function and change fs::setPer [...] adds 1c7aec1c936 [Support] Fix add fs::getUmask() patch adds e832adea0ff [X86] Remove some duplicate patterns that already exist as [...] No new revisions were added by this update. Summary of changes: .github/lockdown.yml | 33 - .../clang-tidy/utils/TransformerClangTidyCheck.cpp | 2 + clang-tools-extra/clangd/ClangdServer.cpp | 19 +- clang-tools-extra/clangd/ClangdServer.h | 11 +- clang-tools-extra/clangd/Selection.cpp | 154 ++- clang-tools-extra/clangd/SemanticHighlighting.cpp | 3 +- clang-tools-extra/clangd/SemanticHighlighting.h | 4 +- clang-tools-extra/clangd/refactor/Rename.cpp | 25 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 41 +- .../clangd/unittests/SelectionTests.cpp | 61 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 26 + clang/include/clang/AST/Decl.h | 2 + clang/lib/CodeGen/CGDebugInfo.cpp | 38 +- clang/lib/CodeGen/CGDebugInfo.h | 10 +- clang/lib/CodeGen/CGExpr.cpp | 14 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 26 +- clang/lib/StaticAnalyzer/Core/CoreEngine.cpp | 5 + clang/test/Analysis/egraph-asm-goto-no-crash.cpp | 26 + clang/test/CodeGen/debug-info-extern-call.c | 15 + clang/test/CodeGenObjC/strong-in-c-struct.m | 28 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 2 +- clang/test/OpenMP/target_codegen.cpp | 4 +- clang/test/OpenMP/target_firstprivate_codegen.cpp | 12 +- clang/test/OpenMP/target_map_codegen.cpp | 40 +- clang/test/OpenMP/target_parallel_codegen.cpp | 4 +- clang/test/OpenMP/target_parallel_for_codegen.cpp | 4 +- .../OpenMP/target_parallel_for_simd_codegen.cpp | 4 +- clang/test/OpenMP/target_simd_codegen.cpp | 4 +- clang/test/OpenMP/target_teams_codegen.cpp | 6 +- .../OpenMP/target_teams_distribute_codegen.cpp | 6 +- .../target_teams_distribute_simd_codegen.cpp | 6 +- compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp | 54 +- compiler-rt/lib/hwasan/hwasan.cpp | 36 +- compiler-rt/lib/hwasan/hwasan.h | 8 +- compiler-rt/lib/hwasan/hwasan_report.cpp | 96 +- .../lib/sanitizer_common/sanitizer_fuchsia.cc | 2 +- .../lib/sanitizer_common/sanitizer_ring_buffer.h | 2 +- .../lib/sanitizer_common/sanitizer_symbolizer.cc | 10 + .../lib/sanitizer_common/sanitizer_symbolizer.h | 28 + .../sanitizer_symbolizer_internal.h | 12 +- .../sanitizer_symbolizer_libcdep.cc | 79 +- compiler-rt/lib/scudo/standalone/CMakeLists.txt | 75 +- compiler-rt/lib/scudo/standalone/flags_parser.cc | 1 + compiler-rt/lib/scudo/standalone/flags_parser.h | 1 - .../lib/scudo/standalone/tests/CMakeLists.txt | 44 +- .../lib/scudo/standalone/tests/wrappers_c_test.cc | 225 ++++ .../scudo/standalone/tests/wrappers_cpp_test.cc | 117 ++ compiler-rt/lib/scudo/standalone/tsd.h | 5 + compiler-rt/lib/scudo/standalone/wrappers_c.cc | 39 + compiler-rt/lib/scudo/standalone/wrappers_c.h | 52 + compiler-rt/lib/scudo/standalone/wrappers_c.inc | 176 +++ .../lib/scudo/standalone/wrappers_c_bionic.cc | 49 + .../lib/scudo/standalone/wrappers_c_checks.h | 67 ++ compiler-rt/lib/scudo/standalone/wrappers_cpp.cc | 107 ++ compiler-rt/test/asan/CMakeLists.txt | 24 +- .../Android/{lit.local.cfg => lit.local.cfg.py} | 0 .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../Helpers/{lit.local.cfg => lit.local.cfg.py} | 0 .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../Windows/{lit.local.cfg => lit.local.cfg.py} | 0 .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/asan/{lit.cfg => lit.cfg.py} | 2 +- .../asan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/builtins/CMakeLists.txt | 8 +- .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../test/builtins/Unit/{lit.cfg => lit.cfg.py} | 2 +- .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/builtins/{lit.cfg => lit.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/cfi/CMakeLists.txt | 8 +- .../icall/{lit.local.cfg => lit.local.cfg.py} | 0 .../cross-dso/{lit.local.cfg => lit.local.cfg.py} | 0 .../cfi/icall/{lit.local.cfg => lit.local.cfg.py} | 0 compiler-rt/test/cfi/{lit.cfg => lit.cfg.py} | 0 .../cfi/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/crt/CMakeLists.txt | 4 +- compiler-rt/test/crt/{lit.cfg => lit.cfg.py} | 0 .../crt/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/dfsan/CMakeLists.txt | 4 +- compiler-rt/test/dfsan/{lit.cfg => lit.cfg.py} | 0 .../dfsan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/fuzzer/CMakeLists.txt | 12 +- compiler-rt/test/fuzzer/{lit.cfg => lit.cfg.py} | 0 .../fuzzer/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- .../unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/gwp_asan/CMakeLists.txt | 12 +- compiler-rt/test/gwp_asan/{lit.cfg => lit.cfg.py} | 0 .../{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- .../unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/hwasan/CMakeLists.txt | 4 +- .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../test/hwasan/TestCases/stack-uar-dynamic.c | 23 + .../test/hwasan/TestCases/stack-uar-realign.c | 20 + compiler-rt/test/hwasan/TestCases/stack-uar.c | 23 +- compiler-rt/test/hwasan/{lit.cfg => lit.cfg.py} | 0 .../hwasan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/interception/CMakeLists.txt | 4 +- .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 .../test/{lit.common.cfg => lit.common.cfg.py} | 2 +- compiler-rt/test/lit.common.configured.in | 2 +- compiler-rt/test/lsan/CMakeLists.txt | 8 +- .../Darwin/{lit.local.cfg => lit.local.cfg.py} | 0 .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Posix/{lit.local.cfg => lit.local.cfg.py} | 0 .../lsan/{lit.common.cfg => lit.common.cfg.py} | 2 +- .../lsan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/msan/CMakeLists.txt | 8 +- .../msan/Linux/{lit.local.cfg => lit.local.cfg.py} | 0 .../Unit/{lit.site.cfg.in => lit.site.cfg.py.in} | 0 compiler-rt/test/msan/{lit.cfg => lit.cfg.py} | 0 .../msan/{lit.site.cfg.in => lit.site.cfg.py.in} | 2 +- compiler-rt/test/profile/CMakeLists.txt | 4 +- .../Linux/{lit.local.cfg => lit.local.cfg.py} | 0 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.../llvm-dwarfdump/X86/debug_loc_OP_entry_value.s | 59 + llvm/test/tools/llvm-nm/format-sysv-binding.test | 46 +- llvm/test/tools/yaml2obj/elf-header-sh-fields.yaml | 61 ++ llvm/tools/llvm-nm/llvm-nm.cpp | 7 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- llvm/tools/yaml2obj/yaml2elf.cpp | 14 +- llvm/unittests/ADT/APIntTest.cpp | 17 + llvm/unittests/Analysis/ValueTrackingTest.cpp | 3 + llvm/unittests/IR/CMakeLists.txt | 1 - llvm/unittests/IR/VectorTypesTest.cpp | 164 --- llvm/unittests/Support/Path.cpp | 53 + .../utils/gn/build/sync_source_lists_from_cmake.py | 14 +- .../gn/secondary/compiler-rt/test/hwasan/BUILD.gn | 4 +- llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn | 1 - openmp/libomptarget/deviceRTLs/nvptx/src/sync.cu | 2 +- .../deviceRTLs/nvptx/test/parallel/flush.c | 35 + 449 files changed, 9619 insertions(+), 3711 deletions(-) delete mode 100644 .github/lockdown.yml create mode 100644 clang/test/Analysis/egraph-asm-goto-no-crash.cpp create mode 100644 clang/test/CodeGen/debug-info-extern-call.c create mode 100644 compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cc create mode 100644 compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cc create mode 100644 compiler-rt/lib/scudo/standalone/wrappers_c.cc create mode 100644 compiler-rt/lib/scudo/standalone/wrappers_c.h create mode 100644 compiler-rt/lib/scudo/standalone/wrappers_c.inc create mode 100644 compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cc create mode 100644 compiler-rt/lib/scudo/standalone/wrappers_c_checks.h create mode 100644 compiler-rt/lib/scudo/standalone/wrappers_cpp.cc rename compiler-rt/test/asan/TestCases/Android/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Darwin/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Helpers/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/TestCases/Windows/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/asan/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/asan/{lit.cfg => lit.cfg.py} (99%) rename compiler-rt/test/asan/{lit.site.cfg.in => lit.site.cfg.py.in} (89%) rename compiler-rt/test/builtins/TestCases/Darwin/{lit.local.cfg => lit.local.cfg. [...] rename compiler-rt/test/builtins/Unit/{lit.cfg => lit.cfg.py} (98%) rename compiler-rt/test/builtins/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/builtins/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/builtins/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/cfi/cross-dso/icall/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/cfi/cross-dso/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/cfi/icall/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/cfi/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/cfi/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/crt/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/crt/{lit.site.cfg.in => lit.site.cfg.py.in} (88%) rename compiler-rt/test/dfsan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/dfsan/{lit.site.cfg.in => lit.site.cfg.py.in} (85%) rename compiler-rt/test/fuzzer/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/fuzzer/{lit.site.cfg.in => lit.site.cfg.py.in} (99%) rename compiler-rt/test/fuzzer/unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/gwp_asan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/gwp_asan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/gwp_asan/unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/hwasan/TestCases/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/hwasan/TestCases/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) create mode 100644 compiler-rt/test/hwasan/TestCases/stack-uar-dynamic.c create mode 100644 compiler-rt/test/hwasan/TestCases/stack-uar-realign.c rename compiler-rt/test/hwasan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/hwasan/{lit.site.cfg.in => lit.site.cfg.py.in} (87%) rename compiler-rt/test/interception/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/{lit.common.cfg => lit.common.cfg.py} (99%) rename compiler-rt/test/lsan/TestCases/Darwin/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/lsan/TestCases/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/lsan/TestCases/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/lsan/{lit.common.cfg => lit.common.cfg.py} (98%) rename compiler-rt/test/lsan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/msan/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/msan/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/msan/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/msan/{lit.site.cfg.in => lit.site.cfg.py.in} (87%) rename compiler-rt/test/profile/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/profile/Posix/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/profile/{lit.cfg => lit.cfg.py} (98%) rename compiler-rt/test/profile/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/safestack/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/safestack/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/sanitizer_common/TestCases/Darwin/{lit.local.cfg => lit.lo [...] rename compiler-rt/test/sanitizer_common/TestCases/FreeBSD/{lit.local.cfg => lit.l [...] rename compiler-rt/test/sanitizer_common/TestCases/Linux/{lit.local.cfg => lit.loc [...] rename compiler-rt/test/sanitizer_common/TestCases/NetBSD/{lit.local.cfg => lit.lo [...] rename compiler-rt/test/sanitizer_common/TestCases/Posix/{lit.local.cfg => lit.loc [...] rename compiler-rt/test/sanitizer_common/Unit/{lit.site.cfg.in => lit.site.cfg.py. [...] rename compiler-rt/test/sanitizer_common/{lit.common.cfg => lit.common.cfg.py} (100%) rename compiler-rt/test/sanitizer_common/{lit.site.cfg.in => lit.site.cfg.py.in} (96%) rename compiler-rt/test/scudo/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/scudo/{lit.site.cfg.in => lit.site.cfg.py.in} (84%) rename compiler-rt/test/scudo/standalone/unit/{lit.site.cfg.in => lit.site.cfg.py. [...] rename compiler-rt/test/shadowcallstack/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/shadowcallstack/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/tsan/Darwin/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/Linux/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/tsan/libcxx/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/libdispatch/{lit.local.cfg => lit.local.cfg.py} (100%) rename compiler-rt/test/tsan/{lit.cfg => lit.cfg.py} (98%) rename compiler-rt/test/tsan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/ubsan/TestCases/Misc/Linux/{lit.local.cfg => lit.local.cfg [...] rename compiler-rt/test/ubsan/TestCases/TypeCheck/Function/{lit.local.cfg => lit.l [...] rename compiler-rt/test/ubsan/TestCases/TypeCheck/Linux/{lit.local.cfg => lit.loca [...] rename compiler-rt/test/ubsan/{lit.common.cfg => lit.common.cfg.py} (98%) rename compiler-rt/test/ubsan/{lit.site.cfg.in => lit.site.cfg.py.in} (98%) rename compiler-rt/test/ubsan_minimal/{lit.common.cfg => lit.common.cfg.py} (97%) rename compiler-rt/test/ubsan_minimal/{lit.site.cfg.in => lit.site.cfg.py.in} (97%) rename compiler-rt/test/xray/Unit/{lit.site.cfg.in => lit.site.cfg.py.in} (100%) rename compiler-rt/test/xray/{lit.cfg => lit.cfg.py} (100%) rename compiler-rt/test/xray/{lit.site.cfg.in => lit.site.cfg.py.in} (99%) rename compiler-rt/unittests/{lit.common.unit.cfg => lit.common.unit.cfg.py} (100%) copy libcxx/test/std/strings/{basic.string.hash/char_type_hash.fail.cpp => string. [...] create mode 100644 libcxxabi/lib/itanium-base.exp create mode 100644 libcxxabi/lib/new-delete.exp create mode 100644 libcxxabi/lib/personality-sjlj.exp create mode 100644 libcxxabi/lib/personality-v0.exp delete mode 100644 lld/test/ELF/invalid/Inputs/invalid-e_shnum.elf delete mode 100644 lld/test/ELF/invalid/invalid-e_shnum.s create mode 100644 lld/test/ELF/invalid/invalid-e_shnum.test delete mode 100644 llvm/include/llvm/Support/ScalableSize.h create mode 100644 llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir create mode 100644 llvm/test/CodeGen/MIR/X86/call-site-info-error1.mir create mode 100644 llvm/test/CodeGen/MIR/X86/call-site-info-error2.mir create mode 100644 llvm/test/CodeGen/MIR/X86/call-site-info-error3.mir create mode 100644 llvm/test/CodeGen/MIR/X86/call-site-info-error4.mir create mode 100644 llvm/test/CodeGen/X86/call-site-info-output.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir create mode 100644 llvm/test/MC/ARM/coprocessors.s create mode 100644 llvm/test/MC/Disassembler/ARM/coprocessors-arm.txt create mode 100644 llvm/test/MC/Disassembler/ARM/coprocessors-thumb.txt create mode 100644 llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8htm.txt delete mode 100644 llvm/test/Object/Inputs/invalid-bad-rel-type.elf delete mode 100644 llvm/test/Object/Inputs/invalid-buffer.elf delete mode 100644 llvm/test/Object/Inputs/invalid-rel-sym.elf delete mode 100644 llvm/test/Object/Inputs/invalid-section-index.elf delete mode 100644 llvm/test/Object/Inputs/invalid-section-size.elf delete mode 100644 llvm/test/Object/Inputs/invalid-sections-num.elf delete mode 100755 llvm/test/Object/Inputs/invalid-sh_entsize.elf delete mode 100644 llvm/test/Object/Inputs/invalid-strtab-non-null.elf delete mode 100644 llvm/test/Object/Inputs/invalid-strtab-type.elf delete mode 100644 llvm/test/Object/Inputs/invalid-strtab-zero-size.elf delete mode 100755 llvm/test/Object/Inputs/invalid-symbol-table-size.elf delete mode 100644 llvm/test/Object/Inputs/invalid-xindex-size.elf create mode 100644 llvm/test/Transforms/FunctionAttrs/nounwind.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/willreturn.ll create mode 100644 llvm/test/Transforms/GVNSink/fpmath.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/calls-codegen.ll create mode 100644 llvm/test/Transforms/MergeFunc/byval-attr-type.ll create mode 100644 llvm/test/Verifier/diexpression-entry-value.ll create mode 100644 llvm/test/Verifier/diexpression-valid-entry-value.ll delete mode 100644 llvm/test/Verifier/scalable-aggregates.ll delete mode 100644 llvm/test/Verifier/scalable-global-vars.ll create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/debug_loc_OP_GNU_entry_value.s create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/debug_loc_OP_entry_value.s create mode 100644 llvm/test/tools/yaml2obj/elf-header-sh-fields.yaml delete mode 100644 llvm/unittests/IR/VectorTypesTest.cpp create mode 100644 openmp/libomptarget/deviceRTLs/nvptx/test/parallel/flush.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (80e044149 -> b9313e1c1)

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