Tcwg-commits May 2019

tcwg-commits@lists.linaro.org

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17284 discussions

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz updated (52b7cd6e9a -> 980cb43f15)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz in repository toolchain/ci/glibc. from 52b7cd6e9a malloc: Check for large bin list corruption when inserting u [...] adds c6177be4b9 Fix crash in _IO_wfile_sync (bug 20568) adds e3f828b8bd dlfcn: Guard __dlerror_main_freeres with __libc_once_get (on [...] adds 980cb43f15 Update NEWS for BZ#24476 Guard __dlerror_main_freeres. No new revisions were added by this update. Summary of changes: ChangeLog | 18 +++++++++++++++ NEWS | 2 ++ dlfcn/dlerror.c | 29 +++++++++++++++++------- libio/Makefile | 3 ++- wcsmbs/tst-c32-state.c => libio/tst-wfile-sync.c | 27 +++++++++------------- libio/tst-wfile-sync.input | 1 + libio/wfileops.c | 5 ++-- 7 files changed, 58 insertions(+), 27 deletions(-) copy wcsmbs/tst-c32-state.c => libio/tst-wfile-sync.c (63%) create mode 100644 libio/tst-wfile-sync.input -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz updated (2067b74eb39 -> b94fcfaf1b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz in repository toolchain/ci/gcc. from 2067b74eb39 Daily bump. adds a7f56a9bf34 Daily bump. adds 74810db8db4 Daily bump. adds 1f3f21cb206 PR libstdc++/81266 fix std::thread::native_handle_type test adds 25ffd89351f 2019-05-11 Andreas Tobler <andreast(a)gcc.gnu.org> adds fa9c30453af Daily bump. adds 59863808a60 Daily bump. adds a295f0c9ca1 Daily bump. adds 901cd50562e Backport r271116 adds e5549fbe388 Backport r271117 adds 4805ad63f30 Daily bump. adds 3443f5f81c7 * xcoffout.h (xcoff_private_rodata_section_name): D [...] adds 4d84bfc6e39 Correct ChangeLog formatting. adds aa46f480f7e PR libstdc++/90454.cc path construction from void* adds 42d11f7b04c Fix filesystem::path tests adds 2ebbb8729a4 Daily bump. adds cebbfcf4b9c gcc/ChangeLog: adds 044f6257e99 PR libstdc++/90299 make filesystem::absolute overloads consistent adds b94fcfaf1b0 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 62 ++++ gcc/DATESTAMP | 2 +- gcc/config.gcc | 5 +- gcc/config/i386/freebsd64.h | 5 +- gcc/config/i386/t-freebsd64 | 30 ++ gcc/config/rs6000/rs6000-c.c | 22 +- gcc/config/rs6000/rs6000.c | 18 +- gcc/gcov.c | 75 ++-- gcc/testsuite/ChangeLog | 32 ++ gcc/testsuite/gcc.target/powerpc/pr89765-mc.c | 400 +++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c | 155 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c | 155 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c | 112 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c | 112 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c | 151 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c | 151 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c | 180 ++++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c | 163 +++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c | 154 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c | 154 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c | 148 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c | 148 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c | 122 +++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c | 122 +++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c | 164 +++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c | 164 +++++++++ gcc/xcoffout.c | 1 + gcc/xcoffout.h | 1 + libstdc++-v3/ChangeLog | 41 +++ libstdc++-v3/include/bits/fs_path.h | 2 +- libstdc++-v3/include/experimental/bits/fs_path.h | 9 +- libstdc++-v3/src/filesystem/std-ops.cc | 5 +- .../27_io/filesystem/operations/absolute.cc | 28 ++ .../27_io/filesystem/path/construct/80762.cc | 10 + .../27_io/filesystem/path/decompose/root_path.cc | 5 - .../filesystem/path/construct/80762.cc | 10 + libstdc++-v3/testsuite/util/thread/all.h | 8 +- 45 files changed, 4115 insertions(+), 67 deletions(-) create mode 100644 gcc/config/i386/t-freebsd64 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr89765-mc.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz updated (dc71cddb81 -> f10648e035)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz in repository toolchain/ci/binutils-gdb. from dc71cddb81 Automatic date update in version.in adds c24ac1eb63 Automatic date update in version.in adds 45af112f5e Automatic date update in version.in adds 3c73607a76 Automatic date update in version.in adds 3439fdd6f3 Work around gcc9 warning bug adds 687f315f2c Automatic date update in version.in adds 56af65756a Automatic date update in version.in adds 3148e19678 Automatic date update in version.in adds 35c8c05dcc Automatic date update in version.in adds 9cd2d40be4 Automatic date update in version.in adds f10648e035 PR24567, assertion failure in ldlang.c:6868 when compiling w [...] No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 7 +++++++ binutils/wrstabs.c | 22 +++++++++------------- ld/ChangeLog | 6 ++++++ ld/plugin.c | 42 ++++++++++++++++++++++++------------------ 5 files changed, 47 insertions(+), 32 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz updated (a259ff8b -> d8eb77c8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz in repository toolchain/ci/base-artifacts. discards a259ff8b 0: update: binutils-gcc-glibc-llvm: 0 new d8eb77c8 0: update: binutils-gcc-glibc-llvm: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a259ff8b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-release-arm-spe [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11031 +-- 04-build_abe-stage1/console.log | 17269 ++--- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 38105 ++++++----- 07-build_abe-stage2/console.log | 46785 +++++++------ 08-build_llvm-true/console.log | 11644 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 27 +- 09-benchmark/console.log | 202 +- 10-check_regression/console.log | 198 +- 11-update_baseline/console.log | 202 +- console.log | 126386 ++++++++++++++++++----------------- jenkins/manifest.sh | 24 +- results.csv | 14 +- results_id | 2 +- 17 files changed, 126468 insertions(+), 126373 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig updated (2ebbb8729a4 -> b94fcfaf1b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig in repository toolchain/ci/gcc. from 2ebbb8729a4 Daily bump. adds cebbfcf4b9c gcc/ChangeLog: adds 044f6257e99 PR libstdc++/90299 make filesystem::absolute overloads consistent adds b94fcfaf1b0 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 11 + gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000-c.c | 22 +- gcc/testsuite/ChangeLog | 32 ++ gcc/testsuite/gcc.target/powerpc/pr89765-mc.c | 400 +++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c | 155 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c | 155 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c | 112 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c | 112 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c | 151 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c | 151 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c | 180 ++++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c | 163 +++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c | 154 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c | 154 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c | 148 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c | 148 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c | 122 +++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c | 122 +++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c | 164 +++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c | 164 +++++++++ libstdc++-v3/ChangeLog | 13 + libstdc++-v3/src/filesystem/std-ops.cc | 5 +- .../27_io/filesystem/operations/absolute.cc | 28 ++ 32 files changed, 3914 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr89765-mc.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig updated (b45c9659 -> b87cd2f5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards b45c9659 0: update: binutils-f10648e0350707e0e51576c60f3f5b9cbb14ab75: all new b87cd2f5 0: update: gcc-b94fcfaf1b075bf70f2100896479f2cb7a98239d: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b45c9659) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 13 +- 02-prepare_abe/console.log | 418 +- 03-build_abe-binutils/console.log | 10640 ++++++++------- 04-build_abe-stage1/console.log | 13563 ++++++++++---------- 05-build_linux/console.log | 418 +- 06-boot_linux/console.log | 2 +- 08-update_baseline/console.log | 8 +- console.log | 24888 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 9 files changed, 24959 insertions(+), 24999 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_debug updated (42d11f7b04c -> b94fcfaf1b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_debug in repository toolchain/ci/gcc. from 42d11f7b04c Fix filesystem::path tests adds 2ebbb8729a4 Daily bump. adds cebbfcf4b9c gcc/ChangeLog: adds 044f6257e99 PR libstdc++/90299 make filesystem::absolute overloads consistent adds b94fcfaf1b0 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 11 + gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000-c.c | 22 +- gcc/testsuite/ChangeLog | 32 ++ gcc/testsuite/gcc.target/powerpc/pr89765-mc.c | 400 +++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c | 155 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c | 155 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c | 112 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c | 112 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c | 149 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c | 151 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c | 151 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c | 180 ++++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c | 163 +++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c | 154 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c | 154 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c | 148 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c | 148 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c | 122 +++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c | 122 +++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c | 115 ++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c | 164 +++++++++ gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c | 164 +++++++++ libstdc++-v3/ChangeLog | 13 + libstdc++-v3/src/filesystem/std-ops.cc | 5 +- .../27_io/filesystem/operations/absolute.cc | 28 ++ 32 files changed, 3914 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr89765-mc.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-10d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-11d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-12d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-13d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-14d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-15d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-16d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-17d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-18d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-19d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-20d.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9c.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-9d.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_debug updated (a0b8ae4f -> 1f2fb471)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_debug in repository toolchain/ci/base-artifacts. discards a0b8ae4f 0: update: gcc-42d11f7b04c3f79cd096a233dfd5ca2731bab244: -5 new 1f2fb471 0: update: gcc-b94fcfaf1b075bf70f2100896479f2cb7a98239d: -5 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a0b8ae4f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-prepare_abe/console.log | 396 +- 03-build_abe-bootstrap_debug/console.log | 65145 ++++++++++++++-------------- console.log | 65633 ++++++++++++++--------------- jenkins/manifest.sh | 8 +- 5 files changed, 65608 insertions(+), 65642 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[gcc] branch master updated (9fc6ea93d6f -> 6e059f2c994)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 9fc6ea93d6f rs6000: Some rs6000_emit_epilogue improvements new 0325d276aca gcc/testsuite/ChangeLog: new 83454be655b PR libstdc++/90520 adjust Xmethod for recent unique_ptr changes new 6e059f2c994 gcc/testsuite/ChangeLog: The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 12 +- gcc/testsuite/g++.dg/overload/conv-op1.C | 2 +- gcc/testsuite/g++.dg/ubsan/pr63956.C | 4 +- gcc/testsuite/g++.old-deja/g++.pt/assign1.C | 2 +- gcc/testsuite/gcc.dg/gcc_diag-11.c | 220 --------------------------- libstdc++-v3/ChangeLog | 9 ++ libstdc++-v3/python/libstdcxx/v6/printers.py | 2 + libstdc++-v3/python/libstdcxx/v6/xmethods.py | 19 ++- 8 files changed, 40 insertions(+), 230 deletions(-) delete mode 100644 gcc/testsuite/gcc.dg/gcc_diag-11.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 3 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (c2029068bc5 -> d84d02e1973)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from c2029068bc5 Emit global variables as S_CONSTANT records for codeview de [...] adds 06b6a2ef41c Remove unneeded alignment spec from builtin_FUNCTION.cpp test adds 08c15df29f8 [X86] Deduplicate symbol lowering logic, NFC adds 11305984d05 [X86][AsmParser] Rename "ConditionCode" variable to "Condit [...] adds add7ed22816 [X86][AsmParser] Ignore "short" even harder in Intel syntax ASM. adds 5ff1eb6418a Revert r358069 "Discard debuginfo for object files empty after GC" adds 2b9a3ea13f4 Slightly update the macOS part of status.rst to be less out [...] adds 087a30d5271 [Tests] Expand basic lftr coverage adds 627e383ce55 [sanitizer] Don't generate "failed to intercept" constants [...] adds 7f281b2c06b HWASan exception support. adds 4a5e01faa49 [X86][AsmParser] Add mnemonics missed in r360954. adds f0a0e8bb365 [Tests] Consolidate more lftr tests adds 9b92875bbdd Convert PointerUnion to a variadic template. adds d764e7c6601 Revert r360859: "Reland r360771 "[MergeICmps] Simplify the code."" adds b5d7ad1d9a2 [Docs] Unify sidebar padding adds 9427961c89f [SystemZ] Bugfix in SystemZTargetLowering::combineIntDIVREM() adds d768ee21407 [CommandInterpreter] Accept blanks after `all` or [0-9]+ for bt. adds 1e0ec81cf16 [Docs] Remove architectures from feature matrix adds 9283f1847ca Clarify comments on helpers used by LFTR [NFC] adds a9a92653a30 Fix broken test case. adds 19871f848bb [CodeMetrics] Don't let extends of i1 be free. adds 65cab8c6399 [Docs] Fix headings in remote debugging adds 8e169cd2669 [LFTR] Factor out a helper function for readability purpose [NFC] adds 457d7caac82 Revert r360946 "Add Clang shared library with C++ exports" adds 7ee4307bd44 Refactor constant evaluation of typeid(T) to track a symbol [...] adds bbf154cf9cf Move symbol resolution code out of SymbolTable class. adds 45e76907966 [IndVars] Don't reimplement Loop::isLoopInvariant [NFC] adds f51dc8d2f98 [c++20] P1327R1: Support for typeid applied to objects of p [...] adds a74d6543745 [LFTR] Strengthen assertions in genLoopLimit [NFCI] adds 43ca0e9eb88 [ARM] Support .reloc *, R_ARM_NONE, * adds aa6102ad8ea [AArch64] Support .reloc *, R_AARCH64_NONE, * adds 364f662fa3f [GWP-ASan] Fixed issue with c++ standard library dependency. adds 2463239777b [X86] Support .reloc *, R_{386,X86_64}_NONE, * adds 1d16515fb40 [ELF] Implement Dependent Libraries Feature adds 876e39937ef Re-land: Add Clang shared library with C++ exports adds e18a6ad0b8b [MC][PowerPC] Clean up PPCAsmBackend adds a5a4124c494 Revert [c++20] P1327R1: Support for typeid applied to objec [...] adds a971003e467 Revert Refactor constant evaluation of typeid(T) to track a [...] adds ec6dc3089e7 [GlobalISel] Fix -Wsign-compare on 32-bit -DLLVM_ENABLE_ASS [...] adds ad7199f3e60 [PowerPC] Support .reloc *, R_PPC{,64}_NONE, * adds b7804ef3a74 [Analysis] Only run plugins tests if plugins are actually enabled adds ae1597d360d [X86] Add FeatureFastScalarShiftMasks and FeatureFastVector [...] adds 61ed46c737a [Bugpoint] Only run plugins tests if plugins are enabled adds 5652063eff6 [Clang][Docs] Document __FILE_NAME__. NFC adds ee0ce302c5e Refactor constant evaluation of typeid(T) to track a symbol [...] adds aee9448939c [ClangFormat] Editor integrations inherit default style fro [...] adds 77483765eb7 Fix alignment check to check the alignment of the intended type. adds 51ce8444f0e Fix crash if, during evaluation of __builtin_object_size, w [...] adds eb4cbf885c1 Suppress false-positive GCC -Wreturn-type warning. adds ff9b4263f97 Make DWARFContext dwo-aware and port debug_info sections over adds 580ff1e72a1 [MergeICmps] Add test from PR41917. adds 0d47f008215 [AArch64][SVE2] Asm: add integer multiply long instructions adds 334130a199c [AArch64][SVE2] Asm: add integer multiply-add long instructions adds 151d4f88dc9 [NFC] Fix line endings in OpenCL tests adds 7f605c35501 [AArch64][SVE2] Asm: add saturating multiply-add long instructions adds 30b2307da8b [analyzer] Insert checker options into AnalyzerOption::ConfigTable adds 929af673612 [Lex] Allow to consume tokens while preprocessing adds c4bc61bad7b [AMDGPU] detect WaW hazards when moving/merging load/store [...] adds 632dfdda16b Re-land r360859: "[MergeICmps] Simplify the code." adds 62370dd0e04 minidump: Use MemoryList parsing code from llvm adds 85cf76e783a [analyzer] Validate checker option names and values adds a6d3bd486b7 [X86] Pull out IsNOT helper. NFCI. adds ef9b8e03fd0 [ELF][test] Reorganize some R_*_NONE tests adds 2c52ddf31f5 [MinGW] Allow requesting PDB output without giving a file name adds 9ae0d222dc8 [MinGW] Implement --help for the MinGW driver adds 6863dfaa21d [MinGW] Implement the -v and --version flags for the MinGW driver adds 6ff6a8f656e [MinGW] Include --enable-auto-import in the help listing adds 7f8ea15ffa1 GlobalISel: Add MIRBuilder wrappers for bitcount instructions adds e1a2a28d6bc GlobalISel: Add fp<->int casts to MachineIRBuilder adds 1400a35f716 GlobalISel: Fix missing version of customFor adds b3dc73634c4 AMDGPU/GlobalISel: Use waterfall loop for buffer_load adds a3b5a386fa7 AMDGPU/GlobalISel: Use subreg index instead of extra unmerge adds 568f193847c AMDGPU/GlobalISel: RegBankSelect for llvm.amdgcn.s.buffer.load adds 90900fbc9fd [MergeICmps][NFC] Add more debug. adds 1448f5689e2 AMDGPU/GlobalISel: Legalize G_FCOPYSIGN adds 6aafc5e19d3 AMDGPU/GlobalISel: Legalize G_FRINT adds 6aebcd54998 AMDGPU/GlobalISel: Legalize G_INTRINSIC_TRUNC adds a510b570c28 AMDGPU/GlobalISel: Legalize G_FCEIL adds f3dccc64af5 [ELF] Don't align PT_TLS's p_memsz adds 1a02d30c873 AMDGPU: Fix unused variable warnings in release builds adds 43fcc79837c [AMDGPU][MC] Enabled expressions for most operands which ac [...] adds 10869e29620 Fix Wdocumentation warnings. NFCI. adds 0855896c687 Add a Visit overload for DynTypedNode to ASTNodeTraverser adds c8dcbed6e4c Extract ASTDumper to a header file adds 62c7032c183 [X86][AVX] isNOT - add extract_subvector(xor X, -1) -> extr [...] adds f3a3b93f545 [ELF] -r: fix R_*_NONE to section symbols on Elf*_Rel targets adds 8369a9beb7e [LibTooling] Add support to Transformer for composing rules [...] adds 279314e81b5 [X86][AVX] Remove LowerCTTZ's AVX1 custom vector handling. adds e92a9c99d66 [libcxxabi] Add a test for invalid assumptions on the align [...] adds 5ae3113969b [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork adds 3a02b12439f Fix tests from r361013 on X86 bots. adds 83cc1b35d18 [analyzer] Remove the default value arg from getChecker*Option adds 3275060fe83 [InstCombine] canShiftBinOpWithConstantRHS(): drop bogus si [...] adds 64c756b9917 [DAGCombiner] visitShiftByConstant(): drop bogus signbit check adds 198611b0ff7 [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers adds 777cad2c448 [Docs] Remove SVN checkout from LLDB build steps adds 067e9468596 [InstSimplify] Add unary fneg to `fsub 0.0, (fneg X) ==> X` [...] adds 012ef1cca7d [libFuzzer] Use SleepOneSecondTest.cpp for fork-sigusr.test. adds 5d95b11b6b6 Update list of supported architectures. adds 04323c24a1a Added an assertion to constant evaluation enty points that [...] adds c05d85104d5 [InstCombine] add tests for insertelement with bitcasted op [...] adds 2c2f8e74b97 [X86][SSE] Match all-of bool scalar reductions into a bitca [...] adds 9da9ed53522 gn build: Merge r360991 adds 762b3ef0785 Attempt to fix test on Windows after r360998 adds 10abc76fce3 gn build: Merge r361033 adds 065431c82bf [X86][SSE] Fold movmsk(not(x)) -> not(movmsk) adds 19dc8c72804 [NFC][InstSImplify] Fix flip-flopped comments and test names adds 926e47751b1 [InstCombine] move bitcast after insertelement-with-bitcast [...] adds e78ac9cc72c Revert r361033 "Add a Visit overload for DynTypedNode to AS [...] adds bebc7d6a4e5 [NFC][InstSimplify] Precommit new unary fneg test adds f3cedf4823c GlobalISel: Define integer min/max instructions adds e4351bfa678 gn build: Merge r360993 adds bf161e67838 [hwasan] Limit try-catch tests to aarch64. adds 5bac7063432 [CommandInterpreter] Fix trailing blanks after `all` or [0- [...] adds bbfd8d18857 Add more tests for AST JSON output; NFC. adds 144291e14c1 [OpenMP][bugfix] Add missing math functions variants for lo [...] adds a933030f848 [c++20] P1327R1: Support for typeid applied to objects of p [...] adds dcc477e38cc [CMake] Inline info plist in lldb driver adds fd0779181f5 [CMake] Add first CMake cache files adds 2fd318e5433 [libFuzzer] Dump input on failure for sigusr tests. adds 13717bd54bb [WebAssembly] Remove expected failure of builtin-location.C test adds dc1c41fb6f0 build: use clang-cl for runtimes when targeting Windows adds 182c638fe09 Explicitly remove -stdlib=libc++, as we pass -nostdinc++ an [...] adds 549ddae58f7 Remove `using namespace std;` in __gnu_cxx namespace. adds 236317d2161 Fix missing std:: qualifier in __gnu_cxx::hash_map in C++03 adds 12de5425c19 [NFC][InstSimplify] Add more unary fneg tests to floating-p [...] adds a9c7b2583f2 [sanitizer] Update symbolizer/scripts/global_symbols.txt adds 53f68c57646 [EditLine] Check string pointers before dereferencing them. adds d84d02e1973 Fix IPv6 support on lldb-server platform No new revisions were added by this update. Summary of changes: .../modernize/UseTrailingReturnTypeCheck.cpp | 4 +- clang/docs/LanguageExtensions.rst | 5 + clang/include/clang/AST/APValue.h | 92 +- clang/include/clang/AST/ASTDumper.h | 56 + clang/include/clang/AST/Expr.h | 1 + clang/include/clang/AST/Type.h | 2 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 29 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Lex/Preprocessor.h | 39 +- clang/include/clang/Lex/Token.h | 21 +- clang/include/clang/Lex/TokenLexer.h | 12 +- clang/include/clang/Parse/Parser.h | 6 +- clang/include/clang/Sema/Sema.h | 6 +- .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 13 +- .../StaticAnalyzer/Frontend/CheckerRegistry.h | 17 + .../clang/Tooling/Refactoring/Transformer.h | 103 +- clang/lib/AST/APValue.cpp | 72 +- clang/lib/AST/ASTDumper.cpp | 47 +- clang/lib/AST/Expr.cpp | 3 + clang/lib/AST/ExprConstant.cpp | 126 +- clang/lib/CodeGen/CGExprConstant.cpp | 11 + clang/lib/CodeGen/CodeGenModule.cpp | 33 +- clang/lib/CodeGen/CodeGenModule.h | 9 +- clang/lib/CodeGen/TargetInfo.cpp | 18 - clang/lib/Frontend/PrintPreprocessedOutput.cpp | 3 +- clang/lib/Headers/__clang_cuda_cmath.h | 5 + .../Headers/__clang_cuda_math_forward_declares.h | 11 + clang/lib/Lex/MacroArgs.cpp | 2 +- clang/lib/Lex/PPCaching.cpp | 4 +- clang/lib/Lex/PPDirectives.cpp | 4 +- clang/lib/Lex/PPLexerChange.cpp | 13 +- clang/lib/Lex/PPMacroExpansion.cpp | 2 +- clang/lib/Lex/Pragma.cpp | 13 +- clang/lib/Lex/Preprocessor.cpp | 13 +- clang/lib/Lex/TokenLexer.cpp | 8 +- clang/lib/Parse/ParseCXXInlineMethods.cpp | 11 +- clang/lib/Parse/ParseDecl.cpp | 6 +- clang/lib/Parse/ParseDeclCXX.cpp | 12 +- clang/lib/Parse/ParseExpr.cpp | 6 +- clang/lib/Parse/ParseExprCXX.cpp | 13 +- clang/lib/Parse/ParseObjc.cpp | 4 +- clang/lib/Parse/ParseOpenMP.cpp | 7 +- clang/lib/Parse/ParsePragma.cpp | 60 +- clang/lib/Parse/ParseStmtAsm.cpp | 3 +- clang/lib/Parse/ParseTemplate.cpp | 4 +- clang/lib/Parse/Parser.cpp | 4 +- clang/lib/Rewrite/HTMLRewrite.cpp | 2 +- clang/lib/Sema/SemaOpenMP.cpp | 14 +- clang/lib/Sema/SemaOverload.cpp | 6 +- clang/lib/Sema/SemaTemplate.cpp | 9 +- .../Checkers/AnalysisOrderChecker.cpp | 4 +- clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp | 6 +- .../Checkers/LocalizationChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 2 +- .../Checkers/MmapWriteExecChecker.cpp | 4 +- clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp | 3 +- .../StaticAnalyzer/Checkers/NullabilityChecker.cpp | 2 +- .../Checkers/NumberObjectConversionChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/PaddingChecker.cpp | 2 +- .../UninitializedObjectChecker.cpp | 13 +- .../StaticAnalyzer/Checkers/VirtualCallChecker.cpp | 3 +- clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp | 57 +- .../StaticAnalyzer/Frontend/CheckerRegistry.cpp | 127 +- clang/lib/Tooling/Refactoring/Transformer.cpp | 113 +- clang/test/AST/ast-dump-records-json.cpp | 4107 ++++++++++++++ clang/test/AST/ast-dump-stmt-json.c | 5094 +++++++++++++++++ clang/test/AST/ast-dump-stmt-json.cpp | 5951 ++++++++++++++++++++ clang/test/Analysis/analyzer-config.c | 39 +- clang/test/Analysis/checker-plugins.c | 63 +- clang/test/Analysis/invalid-checker-option.c | 78 + .../CheckerOptionHandling.cpp | 2 +- clang/test/CMakeLists.txt | 3 +- clang/test/CXX/drs/dr19xx.cpp | 9 +- clang/test/CodeGen/dependent-lib.c | 6 +- clang/test/CodeGen/elf-linker-options.c | 7 - clang/test/CodeGen/pragma-comment.c | 21 +- clang/test/CodeGenCXX/builtin_FUNCTION.cpp | 4 +- clang/test/CodeGenOpenCL/no-signed-zeros.cl | 20 +- clang/test/Modules/autolink.m | 4 +- clang/test/Parser/MicrosoftExtensions.cpp | 2 + clang/test/SemaCXX/builtin-constant-p.cpp | 5 + clang/test/SemaCXX/builtin-object-size-cxx14.cpp | 9 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 59 + clang/test/SemaCXX/typeid.cpp | 5 +- clang/test/SemaOpenCL/array-init.cl | 40 +- clang/test/lit.cfg.py | 8 +- clang/test/lit.site.cfg.py.in | 1 + clang/tools/clang-format/clang-format-sublime.py | 6 +- clang/tools/clang-format/clang-format-test.el | 1 - clang/tools/clang-format/clang-format.el | 6 +- clang/tools/clang-format/clang-format.py | 6 +- clang/tools/clang-shlib/CMakeLists.txt | 5 + .../StaticAnalyzer/AnalyzerOptionsTest.cpp | 31 +- clang/unittests/Tooling/TransformerTest.cpp | 91 +- clang/www/cxx_dr_status.html | 2 +- clang/www/cxx_status.html | 3 +- compiler-rt/lib/asan/asan_interceptors.h | 18 +- compiler-rt/lib/gwp_asan/CMakeLists.txt | 11 +- compiler-rt/lib/gwp_asan/random.cpp | 2 +- compiler-rt/lib/gwp_asan/random.h | 2 +- compiler-rt/lib/msan/msan_interceptors.cc | 18 +- .../symbolizer/scripts/global_symbols.txt | 1 + compiler-rt/test/fuzzer/fork-sigusr.test | 6 +- compiler-rt/test/fuzzer/merge-sigusr.test | 2 +- compiler-rt/test/hwasan/TestCases/try-catch.cc | 63 + libcxx/include/ext/__hash | 27 +- libcxx/include/ext/hash_map | 71 +- libcxx/include/ext/hash_set | 27 +- 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llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 13 + llvm/lib/LTO/LTO.cpp | 1 + llvm/lib/LTO/LTOModule.cpp | 6 +- llvm/lib/MC/MCAsmBackend.cpp | 1 + llvm/lib/MC/MCParser/ELFAsmParser.cpp | 2 + llvm/lib/MC/MCSectionELF.cpp | 2 + llvm/lib/Object/ELF.cpp | 1 + llvm/lib/Object/IRSymtab.cpp | 18 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 1 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 50 + .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 18 +- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 2 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 75 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 142 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 6 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 360 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 16 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 217 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 8 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 1 + llvm/lib/Target/AMDGPU/SOPInstructions.td | 4 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 18 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h | 2 + .../Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp | 2 + .../Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 4 +- .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 2 +- llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h | 5 +- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 96 +- .../PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 3 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 +- .../Target/WebAssembly/known_gcc_test_failures.txt | 1 - llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 58 +- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 40 +- .../Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp | 20 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 216 +- llvm/lib/Target/X86/X86ISelLowering.h | 7 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 + .../Transforms/InstCombine/InstCombineShifts.cpp | 34 +- .../InstCombine/InstCombineVectorOps.cpp | 14 + .../Instrumentation/HWAddressSanitizer.cpp | 37 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 129 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 12 +- .../Analysis/CostModel/SystemZ/ext-of-icmp-cost.ll | 53 + llvm/test/BugPoint/compile-custom.ll | 2 +- llvm/test/BugPoint/crash-narrowfunctiontest.ll | 2 +- llvm/test/BugPoint/func-attrs-keyval.ll | 2 +- llvm/test/BugPoint/func-attrs.ll | 2 +- llvm/test/BugPoint/invalid-debuginfo.ll | 2 +- llvm/test/BugPoint/metadata.ll | 2 +- llvm/test/BugPoint/named-md.ll | 2 +- llvm/test/BugPoint/remove_arguments_test.ll | 2 +- llvm/test/BugPoint/replace-funcs-with-null.ll | 2 +- llvm/test/BugPoint/unsymbolized.ll | 2 +- llvm/test/CMakeLists.txt | 1 + .../GlobalISel/legalizer-info-validation.mir | 12 + .../CodeGen/AArch64/pull-binop-through-shift.ll | 8 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir | 275 + .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 479 ++ .../CodeGen/AMDGPU/GlobalISel/legalize-frint.mir | 160 + .../AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir | 230 +- .../regbankselect-amdgcn-buffer-load.mir | 281 + .../regbankselect-amdgcn-s-buffer-load.mir | 151 + .../regbankselect-extract-vector-elt.mir | 12 +- llvm/test/CodeGen/AMDGPU/merge-load-store.mir | 34 + llvm/test/CodeGen/SystemZ/vec-rem.ll | 13 + llvm/test/CodeGen/X86/movmsk-cmp.ll | 34 +- llvm/test/CodeGen/X86/pull-binop-through-shift.ll | 6 +- llvm/test/CodeGen/X86/vector-compare-all_of.ll | 8 +- llvm/test/CodeGen/X86/vector-compare-any_of.ll | 10 +- llvm/test/CodeGen/X86/vector-lzcnt-512.ll | 176 +- llvm/test/CodeGen/X86/xor.ll | 4 +- llvm/test/Feature/elf-deplibs.ll | 15 + llvm/test/Feature/load_module.ll | 2 +- .../HWAddressSanitizer/landingpad.ll | 37 + llvm/test/LTO/Resolution/X86/symtab-elf.ll | 6 + llvm/test/MC/AArch64/SVE2/smlalb-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/smlalb.s | 67 + llvm/test/MC/AArch64/SVE2/smlalt-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/smlalt.s | 67 + llvm/test/MC/AArch64/SVE2/smlslb-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/smlslb.s | 67 + llvm/test/MC/AArch64/SVE2/smlslt-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/smlslt.s | 67 + llvm/test/MC/AArch64/SVE2/smullb-diagnostics.s | 106 + llvm/test/MC/AArch64/SVE2/smullb.s | 39 + llvm/test/MC/AArch64/SVE2/smullt-diagnostics.s | 106 + llvm/test/MC/AArch64/SVE2/smullt.s | 39 + llvm/test/MC/AArch64/SVE2/sqdmlalb-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/sqdmlalb.s | 67 + llvm/test/MC/AArch64/SVE2/sqdmlalt-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/sqdmlalt.s | 67 + llvm/test/MC/AArch64/SVE2/sqdmlslb-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/sqdmlslb.s | 67 + llvm/test/MC/AArch64/SVE2/sqdmlslt-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/sqdmlslt.s | 67 + llvm/test/MC/AArch64/SVE2/sqdmullb-diagnostics.s | 106 + llvm/test/MC/AArch64/SVE2/sqdmullb.s | 39 + llvm/test/MC/AArch64/SVE2/sqdmullt-diagnostics.s | 106 + llvm/test/MC/AArch64/SVE2/sqdmullt.s | 39 + llvm/test/MC/AArch64/SVE2/umlalb-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/umlalb.s | 67 + llvm/test/MC/AArch64/SVE2/umlalt-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/umlalt.s | 67 + llvm/test/MC/AArch64/SVE2/umlslb-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/umlslb.s | 67 + llvm/test/MC/AArch64/SVE2/umlslt-diagnostics.s | 116 + llvm/test/MC/AArch64/SVE2/umlslt.s | 67 + llvm/test/MC/AArch64/SVE2/umullb-diagnostics.s | 106 + llvm/test/MC/AArch64/SVE2/umullb.s | 39 + llvm/test/MC/AArch64/SVE2/umullt-diagnostics.s | 106 + llvm/test/MC/AArch64/SVE2/umullt.s | 39 + llvm/test/MC/AArch64/reloc-directive.s | 25 + llvm/test/MC/AMDGPU/dl-insts-err.s | 88 +- llvm/test/MC/AMDGPU/expressions-gfx10.s | 49 + llvm/test/MC/AMDGPU/expressions.s | 272 +- llvm/test/MC/AMDGPU/flat-global.s | 74 +- .../MC/AMDGPU/invalid-instructions-spellcheck.s | 2 +- llvm/test/MC/AMDGPU/labels-branch-gfx9.s | 19 + llvm/test/MC/AMDGPU/literals.s | 88 +- llvm/test/MC/AMDGPU/sopk.s | 10 +- llvm/test/MC/AMDGPU/vop3-errs.s | 7 + llvm/test/MC/AMDGPU/vop3.s | 14 +- llvm/test/MC/AMDGPU/vop3p-err.s | 14 +- llvm/test/MC/AMDGPU/vop_sdwa.s | 11 +- llvm/test/MC/ARM/reloc-directive.s | 37 + llvm/test/MC/Disassembler/AMDGPU/sopk_gfx9.txt | 6 +- llvm/test/MC/Disassembler/AMDGPU/sopk_vi.txt | 2 +- llvm/test/MC/ELF/section.s | 13 + llvm/test/MC/PowerPC/ppc32-reloc-directive.s | 26 + llvm/test/MC/PowerPC/ppc64-reloc-directive.s | 28 + llvm/test/MC/X86/intel-syntax.s | 4 + llvm/test/MC/X86/reloc-directive-elf-32.s | 31 + llvm/test/MC/X86/reloc-directive-elf-64.s | 26 + llvm/test/Object/X86/irsymtab.ll | 10 +- .../Transforms/IndVarSimplify/lftr-extend-const.ll | 68 - .../IndVarSimplify/lftr-wide-trip-count.ll | 250 - llvm/test/Transforms/IndVarSimplify/lftr.ll | 425 +- .../InstCombine/insertelement-bitcast.ll | 96 + .../InstCombine/pull-binop-through-shift.ll | 8 +- .../pull-conditional-binop-through-shift.ll | 18 +- llvm/test/Transforms/InstCombine/trunc.ll | 8 +- llvm/test/Transforms/InstSimplify/fast-math.ll | 8 +- .../InstSimplify/floating-point-arithmetic.ll | 75 +- .../Transforms/InstSimplify/known-never-nan.ll | 17 +- llvm/test/Transforms/MergeICmps/X86/pr41917.ll | 75 + llvm/test/lit.cfg.py | 10 +- llvm/test/lit.site.cfg.py.in | 1 + llvm/tools/llvm-lto2/llvm-lto2.cpp | 7 + llvm/tools/llvm-readobj/ELFDumper.cpp | 2 + llvm/tools/lto/lto.cpp | 4 + llvm/unittests/ADT/PointerUnionTest.cpp | 37 + .../CodeGen/GlobalISel/MachineIRBuilderTest.cpp | 76 + llvm/utils/gn/secondary/clang/test/BUILD.gn | 6 + llvm/utils/gn/secondary/llvm/test/BUILD.gn | 6 + 355 files changed, 25721 insertions(+), 2721 deletions(-) create mode 100644 clang/include/clang/AST/ASTDumper.h create mode 100644 clang/test/AST/ast-dump-records-json.cpp create mode 100644 clang/test/AST/ast-dump-stmt-json.c create mode 100644 clang/test/AST/ast-dump-stmt-json.cpp delete mode 100644 clang/test/CodeGen/elf-linker-options.c create mode 100644 compiler-rt/test/hwasan/TestCases/try-catch.cc create mode 100644 libcxxabi/test/exception_object_alignment.2.pass.cpp create mode 100644 lld/test/ELF/Inputs/deplibs-lib_bar.s copy lld/test/ELF/Inputs/{resolution-shared.s => deplibs-lib_foo.s} (100%) delete mode 100644 lld/test/ELF/Inputs/dtrace-r.o create mode 100644 lld/test/ELF/deplibs-colon-prefix.s create mode 100644 lld/test/ELF/deplibs-corrupt.s create mode 100644 lld/test/ELF/deplibs.s delete mode 100644 lld/test/ELF/dtrace-r.test create mode 100644 lld/test/ELF/icf10.s delete mode 100644 lld/test/ELF/icf10.test delete mode 100644 lld/test/ELF/linkerscript/debuginfo-gc.s create mode 100644 lld/test/ELF/lto/deplibs.s delete mode 100644 lld/test/ELF/relocation-dtrace.test create mode 100644 lld/test/ELF/relocation-none-aarch64.s delete mode 100644 lld/test/ELF/relocation-none-aarch64.test create mode 100644 lld/test/ELF/relocation-none-arm.s create mode 100644 lld/test/ELF/relocation-none-i386.s delete mode 100644 lld/test/ELF/relocation-none-i686.test create mode 100644 lld/test/ELF/relocation-none-x86-64.s delete mode 100644 lld/test/ELF/tls-align.s create mode 100644 lldb/cmake/caches/Apple-lldb-base.cmake create mode 100644 lldb/cmake/caches/Apple-lldb-macOS.cmake create mode 100644 lldb/lit/Commands/command-backtrace.test create mode 100644 lldb/unittests/Host/ConnectionFileDescriptorTest.cpp create mode 100644 lldb/unittests/Host/SocketTestUtilities.cpp create mode 100644 lldb/unittests/Host/SocketTestUtilities.h create mode 100644 llvm/test/Analysis/CostModel/SystemZ/ext-of-icmp-cost.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-frint.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-buffer [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buff [...] create mode 100644 llvm/test/CodeGen/SystemZ/vec-rem.ll create mode 100644 llvm/test/Feature/elf-deplibs.ll create mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll create mode 100644 llvm/test/MC/AArch64/SVE2/smlalb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlalb.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlalt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlalt.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlslb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlslb.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlslt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smlslt.s create mode 100644 llvm/test/MC/AArch64/SVE2/smullb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smullb.s create mode 100644 llvm/test/MC/AArch64/SVE2/smullt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smullt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlalb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlalb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlalt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlalt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlslb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlslb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlslt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmlslt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmullb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmullb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmullt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqdmullt.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlalb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlalb.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlalt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlalt.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlslb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlslb.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlslt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umlslt.s create mode 100644 llvm/test/MC/AArch64/SVE2/umullb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umullb.s create mode 100644 llvm/test/MC/AArch64/SVE2/umullt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umullt.s create mode 100644 llvm/test/MC/AArch64/reloc-directive.s create mode 100644 llvm/test/MC/AMDGPU/expressions-gfx10.s create mode 100644 llvm/test/MC/AMDGPU/labels-branch-gfx9.s create mode 100644 llvm/test/MC/ARM/reloc-directive.s create mode 100644 llvm/test/MC/PowerPC/ppc32-reloc-directive.s create mode 100644 llvm/test/MC/PowerPC/ppc64-reloc-directive.s create mode 100644 llvm/test/MC/X86/reloc-directive-elf-32.s create mode 100644 llvm/test/MC/X86/reloc-directive-elf-64.s delete mode 100644 llvm/test/Transforms/IndVarSimplify/lftr-extend-const.ll delete mode 100644 llvm/test/Transforms/IndVarSimplify/lftr-wide-trip-count.ll create mode 100644 llvm/test/Transforms/InstCombine/insertelement-bitcast.ll create mode 100644 llvm/test/Transforms/MergeICmps/X86/pr41917.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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