Tcwg-commits May 2019

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (4b6650e55f8 -> 45a08d13cbc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/gcc. from 4b6650e55f8 Fix test failure due to Networking TS headers using mutexes adds 369a71e6468 PR libgomp/90527 * alloc.c (_GNU_SOURCE): Define. adds a9b358ce060 PR c++/59813 PR target/90418 * function.h (struct functi [...] adds f9659835c2d * gfortran.texi: Remove reference to the ASSIGN statement, [...] adds 735dfb49ee5 PR testsuite/90503 * gcc.target/i386/pr22076.c (dg-option [...] adds 3b5579d5def * es.po, sv.po: Update. adds 951a9c05557 PR testsuite/90503 * gcc.target/i386/pr22076.c (dg-option [...] adds bf3d31e5506 Daily bump. adds c40bd82fc69 Check TBB version in tbb-backed effective target check adds 4573584f514 tbb-backend effective target should check ability to link TBB adds 002ff7c6231 Move a test-case (PR testsuite/90551). adds 0378b6d192a fix diagnostic quoting/spelling in rs6000 adds 12e94bd265d Convert contrib/mklog script to Python 3 adds 3d6be0d5f06 c-family/ * c-ada-spec.h (enum cpp_operation): Add IS_ASSI [...] adds dfe4f3c21bf Enable -O2 for pr90263.c test. adds 491d831c695 contrib/mklog: Open files in text mode adds 72633f23f58 tree-ssa-uninit: suppress more spurious warnings adds 4f018cb1ad6 Don't split non-critical edges in crited adds 174c89f8651 Add missing "" for dg-require-ifunc. adds a25cdd8a68c 2019-05-21 Richard Biener <rguenther(a)suse.de> adds 4e8914879f5 PR90545, gcc.target/powerpc/fold-vec-splats-floatdouble.c fails adds 28ceb89c6b9 Fix names of _Lock_policy constants in libstdc++ manual adds f6baa5a2002 PR libstdc++/90252 fix effective-target check for TBB adds e7b95f8658d [C++ PATCH] Using decls adds faabb7a092b libfortran/90038: Document new wait=.false. implementation adds b57d7937d1f * config/i386/cpuid.h (__cpuid): For 32bit targets, zero [...] adds b71a2632a2b [C++ PATCH] Using decls adds 72b43a4759e PR bootstrap/87338 * dwarf2out.c (dwarf2out_inline_entry) [...] adds 90b483b4c34 * config/i386/sse.md (VF1_AVX2): New mode iterator. (sign [...] adds 59232184f0e darwin, testsuite - fix PR 63891. adds 5f53d1f41a2 darwin, testsuite - fix PR 67958 adds ceaf625c230 Fix dg-require-* syntax adds e509d80a7ea preserve more debug stmts in gimple jump threading adds 45a08d13cbc PR target/90547 * config/i386/i386.md (anddi_1 to andsi_1 [...] No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 8 + contrib/mklog | 28 +- gcc/ChangeLog | 104 +++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 4 +- gcc/c-family/ChangeLog | 7 + gcc/c-family/c-ada-spec.c | 22 + gcc/c-family/c-ada-spec.h | 1 + gcc/config/i386/cpuid.h | 17 + gcc/config/i386/i386.md | 8 + gcc/config/i386/sse.md | 12 + gcc/config/rs6000/driver-rs6000.c | 10 +- gcc/config/rs6000/rs6000-c.c | 18 +- gcc/config/rs6000/rs6000.c | 30 +- gcc/cp/ChangeLog | 22 + gcc/cp/decl2.c | 2 + gcc/cp/name-lookup.c | 384 +++++++--------- gcc/cp/name-lookup.h | 8 +- gcc/cp/parser.c | 19 +- gcc/cp/pt.c | 8 +- gcc/dwarf2out.c | 7 +- gcc/fold-const.c | 22 + gcc/fold-const.h | 1 + gcc/fortran/ChangeLog | 12 + gcc/fortran/gfortran.texi | 20 +- gcc/fortran/intrinsic.texi | 16 +- gcc/function.h | 3 + gcc/gimplify.c | 4 + gcc/lto-streamer-in.c | 1 + gcc/lto-streamer-out.c | 1 + gcc/match.pd | 56 ++- gcc/po/ChangeLog | 4 + gcc/po/es.po | 6 +- gcc/po/sv.po | 500 +++++++++------------ gcc/testsuite/ChangeLog | 92 ++++ gcc/testsuite/g++.dg/lookup/using53.C | 2 +- gcc/testsuite/gcc.c-torture/execute/20030125-1.c | 2 +- gcc/testsuite/gcc.dg/Wattribute-alias.c | 2 +- gcc/testsuite/gcc.dg/darwin-weakimport-3.c | 17 +- .../{gcc.c-torture/compile => gcc.dg}/pr90263.c | 2 + gcc/testsuite/gcc.dg/torture/ftrapv-2.c | 2 +- gcc/testsuite/gcc.dg/uninit-28-gimple.c | 47 ++ gcc/testsuite/gcc.dg/uninit-29-gimple.c | 45 ++ gcc/testsuite/gcc.dg/uninit-30-gimple.c | 43 ++ gcc/testsuite/gcc.dg/uninit-31-gimple.c | 48 ++ gcc/testsuite/gcc.target/i386/pr22076.c | 16 +- gcc/testsuite/gcc.target/i386/pr32219-1.c | 12 +- gcc/testsuite/gcc.target/i386/pr32219-2.c | 11 +- gcc/testsuite/gcc.target/i386/pr32219-3.c | 17 +- gcc/testsuite/gcc.target/i386/pr32219-4.c | 10 +- gcc/testsuite/gcc.target/i386/pr32219-5.c | 10 +- gcc/testsuite/gcc.target/i386/pr32219-6.c | 15 +- gcc/testsuite/gcc.target/i386/pr32219-7.c | 16 +- gcc/testsuite/gcc.target/i386/pr32219-8.c | 12 +- gcc/testsuite/gcc.target/i386/pr84723-1.c | 1 - gcc/testsuite/gcc.target/i386/pr84723-2.c | 1 - gcc/testsuite/gcc.target/i386/pr84723-3.c | 1 - gcc/testsuite/gcc.target/i386/pr84723-4.c | 1 - gcc/testsuite/gcc.target/i386/pr84723-5.c | 1 - gcc/testsuite/gcc.target/i386/pr90500-1.c | 2 +- gcc/testsuite/gcc.target/i386/pr90500-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr90510.c | 22 + gcc/testsuite/gcc.target/i386/pr90547.c | 21 + gcc/testsuite/gcc.target/i386/vect-signbitf.c | 30 ++ .../powerpc/fold-vec-splats-floatdouble.c | 8 +- .../gcc.target/powerpc/ppc64-abi-warn-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr80315-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr80315-2.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr80315-3.c | 2 +- gcc/testsuite/gcc.target/powerpc/pr80315-4.c | 2 +- gcc/testsuite/gcc.target/powerpc/warn-lvsl-lvsr.c | 4 +- gcc/tree-cfg.c | 14 +- gcc/tree-cfg.h | 9 +- gcc/tree-inline.c | 2 + gcc/tree-ssa-pre.c | 2 +- gcc/tree-ssa-sink.c | 4 +- gcc/tree-ssa-tail-merge.c | 2 +- gcc/tree-ssa-threadupdate.c | 68 +++ gcc/tree-ssa-uninit.c | 37 +- gcc/tree-tailcall.c | 6 + libcc1/ChangeLog | 5 + libcc1/libcp1plugin.cc | 2 +- libgomp/ChangeLog | 5 + libgomp/alloc.c | 1 + libstdc++-v3/ChangeLog | 21 + libstdc++-v3/doc/xml/manual/shared_ptr.xml | 6 +- libstdc++-v3/testsuite/lib/libstdc++.exp | 46 +- 87 files changed, 1394 insertions(+), 728 deletions(-) rename gcc/testsuite/{gcc.c-torture/compile => gcc.dg}/pr90263.c (86%) create mode 100644 gcc/testsuite/gcc.dg/uninit-28-gimple.c create mode 100644 gcc/testsuite/gcc.dg/uninit-29-gimple.c create mode 100644 gcc/testsuite/gcc.dg/uninit-30-gimple.c create mode 100644 gcc/testsuite/gcc.dg/uninit-31-gimple.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90510.c create mode 100644 gcc/testsuite/gcc.target/i386/pr90547.c create mode 100644 gcc/testsuite/gcc.target/i386/vect-signbitf.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (d87343802b -> b474a2022d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from d87343802b [MIPS] PR gas/14798: Limit IRIX5 specific default typing to [...] adds 302d65e0b2 Automatic date update in version.in adds da0523c666 Revert "GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a r [...] adds 338ba75534 Fix PR 24564 - link fails for some rcalls/rjmps with wraparound adds 7622049e0b Fix PR 24571 - Relaxation does not shorten jmp or call to t [...] adds e2d1595531 GAS: Replace macro LITERAL_PREFIXDOLLAR_HEX with a runtime value. adds ce3ebcaae3 testsuite: Mark the kill in gdbserver_run as optional adds fab7c86ea4 AArch64: Add SVE DWARF registers adds 739b5c9c77 AArch64: Implement choice between Cortex-A53 erratum workaro [...] adds e6f65e7573 [binutils][Arm] Fix Branch Future relocation handling and testisms adds 8fe9a076ad [GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline adds 669d046839 [gdb/testsuite] Require c++11 where necessary adds fb7806c7a4 [gdb/cli] Fix use of uninitialized variable in complete_command adds 6467207116 AArch64: Fix -Werror on build adds 3734320dc0 [MIPS] Add generation of PLT entries with compact jumps for MIPS R6 adds cd4797ee05 MIPS/gas: Reject $0 as source register for DAUI instruction adds 23d00a419f [binutils, Arm] Add support for shift instructions in MVE adds e39c1607a2 [binutils, Arm] Add support for conditional instructions in [...] adds ba6cd17f0a [binutils, ARM] <spec_reg> changes for VMRS and VMSR instructions adds 304f09d0d4 MIPS/LD: Fix memory fault linking non-PIC object in to share [...] adds b474a2022d MIPS/LD: Reject tprel_hi and tprel_lo relocations in shared library No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 74 ++++++ bfd/bfd-in.h | 13 +- bfd/bfd-in2.h | 13 +- bfd/elf32-arm.c | 75 +----- bfd/elf32-avr.c | 20 +- bfd/elfnn-aarch64.c | 73 +++-- bfd/elfxx-mips.c | 158 +++++++++-- bfd/elfxx-mips.h | 2 + bfd/version.h | 2 +- binutils/ChangeLog | 6 + binutils/dwarf.c | 10 +- .../binutils-all/aarch64/sve-dwarf-registers.d | 25 ++ .../binutils-all/aarch64/sve-dwarf-registers.s | 6 + gas/ChangeLog | 96 +++++++ gas/config/tc-arm.c | 243 ++++++++++++++++- gas/expr.c | 30 +-- gas/testsuite/gas/arm/armv8_1-m-bf-rel.d | 4 +- gas/testsuite/gas/arm/armv8_1-m-bf-rela.d | 12 + gas/testsuite/gas/arm/armv8_1-m-bf.d | 4 +- gas/testsuite/gas/arm/armv8_1-m-bfcsel.d | 4 +- gas/testsuite/gas/arm/armv8_1-m-bfl-rel.d | 4 +- gas/testsuite/gas/arm/armv8_1-m-bfl-rela.d | 12 + gas/testsuite/gas/arm/armv8_1-m-bfl.d | 4 +- gas/testsuite/gas/arm/armv8_1-m-cond-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-cond-bad.l | 8 + gas/testsuite/gas/arm/armv8_1-m-cond-bad.s | 15 ++ gas/testsuite/gas/arm/armv8_1-m-cond.d | 21 ++ gas/testsuite/gas/arm/armv8_1-m-cond.s | 17 ++ gas/testsuite/gas/arm/armv8_1-m-loloop.d | 10 +- gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d | 4 + gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l | 9 + gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d | 4 + gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l | 5 + gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d | 4 + gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l | 11 + gas/testsuite/gas/arm/armv8_1-m-spec-reg.d | 20 ++ gas/testsuite/gas/arm/armv8_1-m-spec-reg.s | 15 ++ gas/testsuite/gas/arm/load-pseudo.s | 3 + gas/testsuite/gas/arm/m0-load-pseudo.d | 12 + gas/testsuite/gas/arm/m23-load-pseudo.d | 12 + gas/testsuite/gas/arm/m33-load-pseudo.d | 11 + gas/testsuite/gas/arm/mve-shift-bad.d | 4 + gas/testsuite/gas/arm/mve-shift-bad.l | 12 + gas/testsuite/gas/arm/mve-shift-bad.s | 15 ++ gas/testsuite/gas/arm/mve-shift.d | 27 ++ gas/testsuite/gas/arm/mve-shift.s | 21 ++ gas/testsuite/gas/arm/vfp1xD.d | 8 +- gas/testsuite/gas/arm/vfp1xD_t2.d | 4 +- gas/testsuite/gas/mips/mips.exp | 2 +- ...6-branch-constraints.l => r6-reg-constraints.l} | 1 + ...6-branch-constraints.s => r6-reg-constraints.s} | 1 + gdb/ChangeLog | 5 + gdb/cli/cli-cmds.c | 4 +- gdb/testsuite/ChangeLog | 13 + gdb/testsuite/gdb.arch/amd64-eval.exp | 2 +- gdb/testsuite/gdb.base/max-depth.exp | 3 + .../gdb.compile/compile-cplus-array-decay.exp | 2 +- gdb/testsuite/gdb.cp/meth-typedefs.exp | 3 +- gdb/testsuite/gdb.cp/subtypes.exp | 3 +- gdb/testsuite/gdb.cp/temargs.exp | 3 +- gdb/testsuite/lib/gdbserver-support.exp | 2 +- ld/ChangeLog | 79 ++++++ ld/NEWS | 6 + ld/emultempl/aarch64elf.em | 30 ++- ld/emultempl/mipself.em | 26 +- ld/ld.texi | 7 + ld/testsuite/ld-aarch64/aarch64-elf.exp | 6 + ld/testsuite/ld-aarch64/erratum843419-adr.d | 15 ++ ld/testsuite/ld-aarch64/erratum843419-adrp.d | 22 ++ ld/testsuite/ld-aarch64/erratum843419-far-adr.d | 5 + ld/testsuite/ld-aarch64/erratum843419-far-full.d | 22 ++ ld/testsuite/ld-aarch64/erratum843419-far.s | 9 + ld/testsuite/ld-aarch64/erratum843419-full.d | 20 ++ ld/testsuite/ld-aarch64/erratum843419-near.s | 9 + ld/testsuite/ld-aarch64/erratum843419-no-args.d | 20 ++ ld/testsuite/ld-arm/arm-elf.exp | 9 + ld/testsuite/ld-arm/bfs-0.s | 12 + ld/testsuite/ld-arm/bfs-1.s | 9 + ld/testsuite/ld-arm/branch-futures.d | 17 ++ ld/testsuite/ld-avr/relax-insn-at-range-boundary.d | 17 ++ ld/testsuite/ld-avr/relax-insn-at-range-boundary.s | 11 + ld/testsuite/ld-avr/wraparound-range-boundary.d | 17 ++ ld/testsuite/ld-avr/wraparound-range-boundary.s | 6 + ld/testsuite/ld-mips-elf/mips-elf.exp | 20 ++ ld/testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd | 50 ++++ ld/testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd | 9 + .../testsuite/ld-mips-elf/pic-and-nonpic-1-r6.s | 0 ld/testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s | 28 ++ ld/testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd | 36 +++ ld/testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd | 21 ++ ld/testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s | 26 ++ ld/testsuite/ld-mips-elf/pic-reloc-5.d | 10 + ld/testsuite/ld-mips-elf/pic-reloc-5.s | 22 ++ ld/testsuite/ld-mips-elf/pic-reloc-6.d | 11 + ld/testsuite/ld-mips-elf/pic-reloc-6.s | 22 ++ ld/testsuite/ld-mips-elf/pic-reloc-7.d | 8 + ld/testsuite/ld-mips-elf/pic-reloc-7.s | 10 + ld/testsuite/ld-mips-elf/pic-reloc-tls.ld | 7 + opcodes/ChangeLog | 31 +++ opcodes/arm-dis.c | 296 ++++++++++++++++++++- opcodes/mips-opc.c | 2 +- 101 files changed, 2007 insertions(+), 186 deletions(-) create mode 100644 binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d create mode 100644 binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-rela.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-rela.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-cond-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-cond-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-cond-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-cond.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-cond.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-spec-reg.s create mode 100644 gas/testsuite/gas/arm/load-pseudo.s create mode 100644 gas/testsuite/gas/arm/m0-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m23-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m33-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/mve-shift-bad.d create mode 100644 gas/testsuite/gas/arm/mve-shift-bad.l create mode 100644 gas/testsuite/gas/arm/mve-shift-bad.s create mode 100644 gas/testsuite/gas/arm/mve-shift.d create mode 100644 gas/testsuite/gas/arm/mve-shift.s rename gas/testsuite/gas/mips/{r6-branch-constraints.l => r6-reg-constraints.l} (95%) rename gas/testsuite/gas/mips/{r6-branch-constraints.s => r6-reg-constraints.s} (96%) create mode 100644 ld/testsuite/ld-aarch64/erratum843419-adr.d create mode 100644 ld/testsuite/ld-aarch64/erratum843419-adrp.d create mode 100644 ld/testsuite/ld-aarch64/erratum843419-far-adr.d create mode 100644 ld/testsuite/ld-aarch64/erratum843419-far-full.d create mode 100644 ld/testsuite/ld-aarch64/erratum843419-far.s create mode 100644 ld/testsuite/ld-aarch64/erratum843419-full.d create mode 100644 ld/testsuite/ld-aarch64/erratum843419-near.s create mode 100644 ld/testsuite/ld-aarch64/erratum843419-no-args.d create mode 100644 ld/testsuite/ld-arm/bfs-0.s create mode 100644 ld/testsuite/ld-arm/bfs-1.s create mode 100644 ld/testsuite/ld-arm/branch-futures.d create mode 100644 ld/testsuite/ld-avr/relax-insn-at-range-boundary.d create mode 100644 ld/testsuite/ld-avr/relax-insn-at-range-boundary.s create mode 100644 ld/testsuite/ld-avr/wraparound-range-boundary.d create mode 100644 ld/testsuite/ld-avr/wraparound-range-boundary.s create mode 100644 ld/testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd create mode 100644 ld/testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd copy binutils/testsuite/binutils-all/empty => ld/testsuite/ld-mips-elf/pic-and-non [...] create mode 100644 ld/testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s create mode 100644 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd create mode 100644 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd create mode 100644 ld/testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-5.d create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-5.s create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-6.d create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-6.s create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-7.d create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-7.s create mode 100644 ld/testsuite/ld-mips-elf/pic-reloc-tls.ld -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (d8310d0d -> 2f113aa2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards d8310d0d 0: update: binutils-gcc-linux: all new 2f113aa2 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d8310d0d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 121 +- 02-prepare_abe/console.log | 413 +- 03-build_abe-binutils/console.log | 9581 ++++++------ 04-build_abe-stage1/console.log | 19666 +++++++++++------------ 05-build_linux/console.log | 596 +- 06-boot_linux/console.log | 2 +- console.log | 30347 ++++++++++++++++++------------------ jenkins/manifest.sh | 18 +- 8 files changed, 30373 insertions(+), 30371 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (69d91e1ef9a -> bcd9cd37231)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/gcc. from 69d91e1ef9a * config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace [...] adds a170a7d76a2 Daily bump. adds bcd9cd37231 [RTEMS] Change multilibs for ARM No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 8 ++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/t-rtems | 11 ++++++----- 3 files changed, 15 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (f72d4dd70f -> 114c576d17)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from f72d4dd70f Automatic date update in version.in adds 74ef5d8574 Automatic date update in version.in adds 4ee0b37fff AArch64: Add SVE DWARF registers adds 114c576d17 [GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 10 +++++++++ binutils/dwarf.c | 10 ++++++--- .../binutils-all/aarch64/sve-dwarf-registers.d | 25 ++++++++++++++++++++++ .../binutils-all/aarch64/sve-dwarf-registers.s | 6 ++++++ gas/ChangeLog | 13 +++++++++++ gas/config/tc-arm.c | 5 +++++ gas/testsuite/gas/arm/load-pseudo.s | 3 +++ gas/testsuite/gas/arm/m0-load-pseudo.d | 12 +++++++++++ gas/testsuite/gas/arm/m23-load-pseudo.d | 12 +++++++++++ gas/testsuite/gas/arm/m33-load-pseudo.d | 11 ++++++++++ 11 files changed, 105 insertions(+), 4 deletions(-) create mode 100644 binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d create mode 100644 binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s create mode 100644 gas/testsuite/gas/arm/load-pseudo.s create mode 100644 gas/testsuite/gas/arm/m0-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m23-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m33-load-pseudo.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (8dfc2b8f -> ebf134ef)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 8dfc2b8f 0: update: binutils-gcc-linux: all new ebf134ef 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8dfc2b8f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 131 +- 02-prepare_abe/console.log | 260 +- 03-build_abe-binutils/console.log | 10706 ++++++------- 04-build_abe-stage1/console.log | 17376 ++++++++++----------- 05-build_linux/console.log | 702 +- 06-boot_linux/console.log | 2 +- console.log | 29202 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 8 files changed, 29230 insertions(+), 29163 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (69d91e1ef9a -> bcd9cd37231)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/ci/gcc. from 69d91e1ef9a * config/mips/mips.c (mips_dwarf_frame_reg_mode): Replace [...] adds a170a7d76a2 Daily bump. adds bcd9cd37231 [RTEMS] Change multilibs for ARM No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 8 ++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/t-rtems | 11 ++++++----- 3 files changed, 15 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (f72d4dd70f -> 114c576d17)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from f72d4dd70f Automatic date update in version.in adds 74ef5d8574 Automatic date update in version.in adds 4ee0b37fff AArch64: Add SVE DWARF registers adds 114c576d17 [GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 10 +++++++++ binutils/dwarf.c | 10 ++++++--- .../binutils-all/aarch64/sve-dwarf-registers.d | 25 ++++++++++++++++++++++ .../binutils-all/aarch64/sve-dwarf-registers.s | 6 ++++++ gas/ChangeLog | 13 +++++++++++ gas/config/tc-arm.c | 5 +++++ gas/testsuite/gas/arm/load-pseudo.s | 3 +++ gas/testsuite/gas/arm/m0-load-pseudo.d | 12 +++++++++++ gas/testsuite/gas/arm/m23-load-pseudo.d | 12 +++++++++++ gas/testsuite/gas/arm/m33-load-pseudo.d | 11 ++++++++++ 11 files changed, 105 insertions(+), 4 deletions(-) create mode 100644 binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.d create mode 100644 binutils/testsuite/binutils-all/aarch64/sve-dwarf-registers.s create mode 100644 gas/testsuite/gas/arm/load-pseudo.s create mode 100644 gas/testsuite/gas/arm/m0-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m23-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m33-load-pseudo.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (ff577a28 -> 073c79f4)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards ff577a28 0: update: binutils-gcc-linux: all new 073c79f4 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ff577a28) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 25 +- 02-prepare_abe/console.log | 425 +- 03-build_abe-binutils/console.log | 8330 +++++++------- 04-build_abe-stage1/console.log | 12901 ++++++++++----------- 05-build_linux/console.log | 674 +- 06-boot_linux/console.log | 2 +- console.log | 22348 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 8 files changed, 22376 insertions(+), 22343 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (a5d8d01d6f2 -> ed6df47bae6)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/llvm-project. from a5d8d01d6f2 [ELF][Driver] Fix precedence of symbol ordering file and CGProfile adds 80efcdcdf88 gn build: Merge r361148 adds 4ed18e5ef52 [AArch64] Handle lowering lround on windows, where long is 32 bit adds 4aee1b5b0b9 Add more tests for AST JSON output; NFC. adds 52fa90a348c This change adds an API to allow setting the flag to indica [...] adds 93d2bdda6bf [Support] Renamed member 'Size' to 'AllocatedSize' in Memor [...] adds ac5c8318d76 [DependenceInfo] Remove dead initialization. NFC. adds 8bec58d5f72 [NFC][InstCombine] Add FIXME for one-use check on constant [...] adds 4dfa665ebf1 [docs] Add more details/examples for LLJIT/LLLazyJIT, tweak [...] adds 0dcf69eb828 [ORC] Remove some unreachable code. adds 54dc01cbfc4 [docs] Fix an RST typo: "code-blocks" should be "code-block". adds d75a0450ad6 Ensure that hash<basic_string> uses char_traits. Fixes PR#4 [...] adds 6dd08e335ff AMDGPU: Force skip branches over calls adds 28e351af2ad [ORC] fix use-after-move. NFC adds c4c679c2324 [CodeGen] Fix order of PHINode and MA Write generation. adds 16beaae2a61 [Sema] Fix for build on some iOS programs. adds 1a5cc629deb [COFF] Store alignment in log2 form, NFC adds 48140db7973 [builtins] Deduplicate __eqsf2 and __gtsf2 via macro adds f1b29723ce9 Give 'fixit-cxx0x.cpp' a more modern name. adds 4522e266964 Try to fix build with older gccs after r361152 adds a5401e48ddc lldb-server: LLGS: support 32-bit on 64-bit hosts adds 67510fac36d Revert r361206 "[COFF] Store alignment in log2 form, NFC" adds 547e3e930cf [ELF] Error on relocations to local undefined symbols adds c6f363f578f Tweaks for setting CMAKE_LINKER to lld-link adds f088e195cc2 [ORC] Assert that JITDylibs have unique names. adds f7c4e6c6b19 [CMake] Correct some dependencies adds c4c407a0ebb [PowerPC] use more meaningful name - NFC adds e64bcada5fa [PowerPC] test cases for selecting x-form instruction for u [...] adds e44691bf9f4 Move thumbv7k test from AArch64 to ARM adds 690fa1b51be [NFC][PowerPC] Add a test to verify if the scheduler schedu [...] adds e967308da43 Add TargetLoweringInfo hook for explicitly setting the ABI [...] adds 3e272b853f3 [CMake] Specify component for all target types adds 03c4bf73eae DWARF: Introduce DWARFUnitHeader class adds 5f3deb9bb5a [clang-tidy] New option for misc-throw-by-value-catch-by-reference adds 295c19e948d [Preamble] Reuse preamble even if an unsaved file does not exist adds 3141bbd52d9 [ARM][CGP] Skip nuw in PrepareConstants adds ecf4c9e13cd [ELF] Don't advance position in a memory region when assign [...] adds e798e8d9d26 [AArch64][SVE2] Asm: add integer pairwise arithmetic instructions adds 7f47b75d185 [AArch64][SVE2] Asm: add integer unary instructions (predicated) adds ec767b0b4ac [llvm-objcopy] Strip file symbols with --strip-unneeded adds f33f1816785 DWARF: Port debug_addr over to DWARFContext adds 8fcf012693a [WebAssembly] Refactor synthetic sections and relocation pr [...] adds 2eebf4d939b [libclang] visit c++14 lambda capture init expressions adds 4a8835c655e [AArch64] Skip mask checks for masks with an odd number of [...] adds 7804dbddccb [WebAssembly] Add __start_/_stop_ symbols for data sections adds cd36a2857ea [PPC64] Update LocalEntry from assigned symbols adds 823458f9b81 [CGBuiltin] dumpRecord - remove unused field offset. NFCI. adds a95d95d3922 [MergeICmps] Preserve the dominator tree. adds f44eb922c05 [llvm-objdump] Make --disassemble-functions imply -d adds 2aee73f591d [NFC][X86][AArch64] Add some more tests for shift amount masking adds 45330fee4c2 [CodeGenModule] BlockByrefHelpers - add missing uninitializ [...] adds bc03bee66b3 [X86][SSE] Add shuffle tests for 'splat3' patterns. adds 35150bb5341 [WebAssembly] Add --reproduce. adds 116e8d4876f [DebugInfo] Handle -main-file-name correctly for asm source [...] adds 032f87bbb3c Revert r360902 "Resubmit: [Salvage] Change salvage debug info ..." adds 9c563269342 [DebugInfo] Handle '# line "file"' correctly for asm source [...] adds d3f27f2bf44 Fix test failure. adds 9d5351cab69 De-Window-ize a test adds 0a16ba856be [DebugInfo] Fix tests missed by r362148 adds a1b5780ec17 [clangd] Add tweak to convert normal to raw string literal, [...] adds f9b28e53c7d [ScheduleDAGInstrs] Compute topological ordering on demand. adds d8db224ecb1 [NFC][X86][AArch64] Shift amount masking: tests that show t [...] adds e0cc56e038d [lldb-mi] Include full path in the -data-disassemble response adds 35a2196bd11 Fix typo in r361251. adds 8fa970c2d87 [MergeICmps][NFC] Make BCEAtom move-only. adds 0321b370f2d [clangd] Turn no-parse-completion on by when preamble isn't [...] adds 8287b973f0b gn build: Merge r361233 adds e289e988378 gn build: Merge r361252 adds 603a2bac05a [ARM][CMSE] Add commandline option and feature macro adds 440dd6df339 gn build: Run `git ls-files '*.gn' '*.gni' | xargs llvm/uti [...] adds 8361a10493c Revert r361257 "[MergeICmps][NFC] Make BCEAtom move-only." adds 6c0531222ad [Syntax] Rename TokensTest to SyntaxTests. NFC adds 86abee8185c Add support for dumping AST comment nodes to JSON. adds 5ea0d06e816 [ELF] Deleted unused ComdatGroups member variable left by D61854 adds a7b9e98fd8e gn build: Merge r361264 adds 78c3f58122f [DAGCombiner] prevent unsafe reassociation of FP ops adds 8c5555c39a7 [OPENMP][NVPTX]Mark more functions as always_inline for bet [...] adds 4b82e503153 [X86][SSE] computeKnownBitsForTargetNode - add X86ISD::ANDN [...] adds dbc2a12c731 Fix BUILD_SHARED_LIBS for clang which broke in D61909 adds da60a16bc7f [docs] Add new document on building distributions adds c0a4f45bcb1 Revert "[WebAssembly] Add __start_/_stop_ symbols for data [...] adds 31ca49be470 Do not use the incorrect attribute spelling list index when [...] adds fb2a0765118 [CMake] One more stab at fixing BUILD_SHARED_LIBS adds b43dfaa6c0f [Dsymutil] Remove redundant argument (NFC) adds b7a19321442 Remove `SymbolFileDWARF *` when there is already `DWARFUnit *` adds e97b5f5cf37 [clang][Darwin] Refactor header search path logic into the driver adds 92febc64980 [Bugpoint] fix use-after-move. NFC adds bd467cfe4bc [cmake] Add custom command to touch archives on Darwin so n [...] adds 122c6e6f368 [MergeICmps] Make sorting strongly stable on the rhs. adds c1b6b9a1777 [cmake] Bug in r361281: make include optional and fix typo [...] adds 6b21c4a4eed [OPENMP]Use the attributes for dso locality when building f [...] adds 51dc59d0903 [SelectionDAG] remove redundant code; NFCI adds f0d9cfa5915 [LibTooling] Address post-commit feedback for r361152 adds 76e5a1d3c3b [cmake] Try to make cmake happy and fix bots. adds 10f6b398995 [SelectionDAG] fold insert subvector of undef into undef new ed6df47bae6 [X86] Remove an unneeded ZERO_EXTEND creation from LowerINT [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../misc/ThrowByValueCatchByReferenceCheck.cpp | 18 +- .../misc/ThrowByValueCatchByReferenceCheck.h | 2 + clang-tools-extra/clangd/ClangdServer.cpp | 10 +- clang-tools-extra/clangd/CodeComplete.cpp | 7 +- clang-tools-extra/clangd/CodeComplete.h | 17 +- .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/RawStringLiteral.cpp | 103 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 21 +- clang-tools-extra/clangd/unittests/ClangdTests.cpp | 21 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 38 +- clang-tools-extra/docs/ReleaseNotes.rst | 5 + .../misc-throw-by-value-catch-by-reference.rst | 15 + clang/cmake/modules/AddClang.cmake | 8 +- clang/include/clang/AST/JSONNodeDumper.h | 41 +- clang/include/clang/Basic/Attr.td | 3 + clang/include/clang/Basic/DiagnosticCommonKinds.td | 2 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 5 + .../include/clang/Basic/DiagnosticFrontendKinds.td | 5 - clang/include/clang/Basic/LangOptions.def | 2 + clang/include/clang/Driver/Options.td | 3 + clang/include/clang/Frontend/ASTUnit.h | 7 +- clang/lib/AST/ASTDumper.cpp | 3 +- clang/lib/AST/JSONNodeDumper.cpp | 144 +- clang/lib/AST/Type.cpp | 6 +- clang/lib/Basic/Targets/ARM.cpp | 9 + clang/lib/CodeGen/CGBuiltin.cpp | 5 - clang/lib/CodeGen/CGOpenMPRuntime.cpp | 16 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 19 +- clang/lib/CodeGen/CodeGenModule.cpp | 2 +- clang/lib/CodeGen/CodeGenModule.h | 3 +- clang/lib/Driver/ToolChains/Arch/ARM.cpp | 4 + clang/lib/Driver/ToolChains/Clang.cpp | 3 + clang/lib/Driver/ToolChains/Darwin.cpp | 169 +- clang/lib/Driver/ToolChains/Darwin.h | 10 + clang/lib/Frontend/ASTUnit.cpp | 22 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Frontend/InitHeaderSearch.cpp | 66 +- clang/lib/Frontend/PrecompiledPreamble.cpp | 28 +- clang/lib/Sema/SemaDeclAttr.cpp | 18 +- clang/test/AST/ast-dump-comment-json.cpp | 1492 ++++++ clang/test/AST/ast-dump-expr-json.c | 5427 ++++++++++++++++++++ clang/test/AST/ast-print-no-sanitize.cpp | 7 + .../include/c++/4.2.1/arm64-apple-darwin10}/.keep | 0 .../usr/lib}/.keep | 0 .../include/c++/4.2.1/arm-apple-darwin10/v6}/.keep | 0 .../include/c++/4.2.1/arm-apple-darwin10/v7}/.keep | 0 .../usr/lib}/.keep | 0 .../c++/4.0.0/powerpc-apple-darwin10/ppc64}/.keep | 0 .../c++/4.2.1/powerpc-apple-darwin10/ppc64}/.keep | 0 .../usr/lib}/.keep | 0 .../include/c++/4.0.0/i686-apple-darwin8}/.keep | 0 .../c++/4.2.1/i686-apple-darwin10/x86_64}/.keep | 0 .../usr/lib}/.keep | 0 .../usr/include}/.keep | 0 .../usr/lib}/.keep | 0 .../usr/include}/.keep | 0 .../usr/lib}/.keep | 0 .../bin => basic_darwin_sdk_usr/usr/include}/.keep | 0 .../bin => basic_darwin_sdk_usr/usr/lib}/.keep | 0 .../usr/include}/.keep | 0 .../usr/lib}/.keep | 0 .../usr/local/include}/.keep | 0 .../usr/local/lib}/.keep | 0 .../usr/local/include}/.keep | 0 .../usr/local/lib}/.keep | 0 .../cuda => basic_darwin_toolchain/usr}/bin/.keep | 0 .../usr/include/c++/v1}/.keep | 0 .../usr}/bin/.keep | 0 clang/test/Driver/darwin-header-search-libcxx.cpp | 78 + .../test/Driver/darwin-header-search-libstdcxx.cpp | 118 + clang/test/Driver/darwin-header-search-system.cpp | 80 + clang/test/Driver/darwin-stdlib.cpp | 11 +- .../FixIt/{fixit-cxx0x.cpp => fixit-c++11.cpp} | 0 clang/test/Frontend/warning-stdlibcxx-darwin.cpp | 6 - clang/test/Index/cxx14-lambdas.cpp | 38 + clang/test/OpenMP/declare_target_codegen.cpp | 12 +- .../declare_target_codegen_globalization.cpp | 2 +- clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 155 +- clang/test/OpenMP/nvptx_allocate_codegen.cpp | 14 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 2 +- .../nvptx_declare_target_var_ctor_dtor_codegen.cpp | 16 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 17 +- clang/test/OpenMP/nvptx_lambda_capturing.cpp | 30 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 2 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 8 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 6 +- .../nvptx_target_parallel_num_threads_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 37 +- .../nvptx_target_teams_distribute_codegen.cpp | 43 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 35 +- ...istribute_parallel_for_generic_mode_codegen.cpp | 4 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 22 +- .../nvptx_target_teams_distribute_simd_codegen.cpp | 12 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 48 +- .../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 16 +- .../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 12 +- clang/test/OpenMP/taskloop_reduction_codegen.cpp | 11 +- .../OpenMP/taskloop_simd_reduction_codegen.cpp | 11 +- clang/test/Preprocessor/arm-target-features.c | 20 + clang/test/SemaObjC/nullability_macro.m | 16 + clang/tools/clang-shlib/CMakeLists.txt | 1 + clang/tools/libclang/CIndex.cpp | 8 +- clang/unittests/Frontend/PCHPreambleTest.cpp | 74 +- clang/unittests/Tooling/CMakeLists.txt | 3 +- clang/unittests/Tooling/RangeSelectorTest.cpp | 5 +- clang/unittests/Tooling/Syntax/CMakeLists.txt | 4 +- compiler-rt/lib/builtins/arm/comparesf2.S | 107 +- compiler-rt/lib/profile/InstrProfiling.c | 4 + compiler-rt/lib/profile/InstrProfiling.h | 8 + libcxx/include/string | 22 +- .../basic.string.hash/char_type_hash.fail.cpp | 66 + lld/ELF/LinkerScript.cpp | 2 - lld/ELF/Relocations.cpp | 14 +- lld/ELF/SymbolTable.h | 5 - lld/test/ELF/linkerscript/memory5.test | 4 +- lld/test/ELF/local-undefined-symbol.s | 8 +- lld/test/wasm/reproduce.ll | 27 + lld/wasm/CMakeLists.txt | 4 +- lld/wasm/Driver.cpp | 44 + lld/wasm/InputChunks.h | 3 + lld/wasm/InputFiles.cpp | 13 +- lld/wasm/InputFiles.h | 8 + lld/wasm/Options.td | 2 + lld/wasm/OutputSections.cpp | 7 +- lld/wasm/OutputSections.h | 53 +- lld/wasm/Relocations.cpp | 86 + lld/wasm/{Writer.h => Relocations.h} | 10 +- lld/wasm/Symbols.cpp | 22 +- lld/wasm/Symbols.h | 46 +- lld/wasm/SyntheticSections.cpp | 543 ++ lld/wasm/SyntheticSections.h | 323 ++ lld/wasm/Writer.cpp | 999 +--- lld/wasm/Writer.h | 2 - .../test/tools/lldb-mi/data/TestMiData.py | 8 + lldb/source/Expression/CMakeLists.txt | 1 + lldb/source/Expression/DWARFExpression.cpp | 31 +- .../Plugins/SymbolFile/DWARF/DWARFBaseDIE.cpp | 11 +- .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.cpp | 93 +- .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.h | 26 +- .../Plugins/SymbolFile/DWARF/DWARFContext.cpp | 5 + .../source/Plugins/SymbolFile/DWARF/DWARFContext.h | 2 + lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp | 21 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 15 +- .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 242 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 88 +- .../Plugins/SymbolFile/DWARF/DWARFDebugRanges.cpp | 6 +- .../Plugins/SymbolFile/DWARF/DWARFFormValue.cpp | 3 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 170 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h | 72 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 16 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 2 - .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 13 - .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h | 2 - lldb/source/Symbol/CMakeLists.txt | 1 - lldb/tools/lldb-mi/MICmdCmdData.cpp | 9 +- lldb/tools/lldb-server/SystemInitializerLLGS.cpp | 27 +- llvm/cmake/config-ix.cmake | 16 + llvm/cmake/modules/AddLLVM.cmake | 19 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 10 +- llvm/docs/BuildingADistribution.rst | 207 + llvm/docs/ORCv2DesignAndImplementation.rst | 250 +- llvm/docs/index.rst | 5 + llvm/include/llvm/CodeGen/TargetLowering.h | 9 + llvm/include/llvm/ExecutionEngine/Orc/Core.h | 4 + llvm/include/llvm/Support/Memory.h | 17 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 8 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- llvm/lib/ExecutionEngine/JITLink/JITLink.cpp | 5 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 10 + llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp | 5 +- llvm/lib/ExecutionEngine/Orc/Layer.cpp | 10 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 31 +- llvm/lib/MC/MCContext.cpp | 19 +- llvm/lib/MC/MCParser/AsmParser.cpp | 15 +- llvm/lib/Support/FileOutputBuffer.cpp | 18 +- llvm/lib/Support/Memory.cpp | 4 +- llvm/lib/Support/Unix/Memory.inc | 22 +- llvm/lib/Support/Windows/Memory.inc | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 6 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 4 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 13 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 36 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 124 +- llvm/lib/Target/AVR/AVRISelLowering.h | 5 + .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 30 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 12 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 2 + llvm/lib/Transforms/Scalar/MergeICmps.cpp | 87 +- llvm/lib/Transforms/Utils/Local.cpp | 23 +- .../AArch64/arm64-neon-vector-shuffle-extract.ll | 33 + llvm/test/CodeGen/AArch64/lround-conv-win.ll | 44 + llvm/test/CodeGen/AArch64/shift-amount-mod.ll | 676 +++ llvm/test/CodeGen/AMDGPU/call-skip.ll | 67 + llvm/test/CodeGen/ARM/CGP/arm-cgp-overflow.ll | 36 +- .../{AArch64 => ARM}/addsubo-legalization.ll | 0 .../test/CodeGen/AVR/umul.with.overflow.i16-bug.ll | 49 + llvm/test/CodeGen/PowerPC/schedule-addi-load.mir | 106 + .../CodeGen/PowerPC/unaligned-addressing-mode.ll | 113 + llvm/test/CodeGen/X86/oddshuffles.ll | 354 ++ llvm/test/CodeGen/X86/shift-amount-mod.ll | 1556 ++++++ llvm/test/CodeGen/X86/vec_saddo.ll | 48 +- llvm/test/CodeGen/X86/vec_ssubo.ll | 44 +- llvm/test/DebugInfo/X86/asm-macro-line-number.s | 10 +- llvm/test/DebugInfo/X86/main-file-name.s | 17 - llvm/test/DebugInfo/salvage-cast-debug-info.ll | 25 - llvm/test/MC/AArch64/SVE2/addp-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/addp.s | 59 + llvm/test/MC/AArch64/SVE2/smaxp-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/smaxp.s | 59 + llvm/test/MC/AArch64/SVE2/sminp-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sminp.s | 59 + llvm/test/MC/AArch64/SVE2/sqabs-diagnostics.s | 23 + llvm/test/MC/AArch64/SVE2/sqabs.s | 60 + llvm/test/MC/AArch64/SVE2/sqneg-diagnostics.s | 23 + llvm/test/MC/AArch64/SVE2/sqneg.s | 60 + llvm/test/MC/AArch64/SVE2/umaxp-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/umaxp.s | 59 + llvm/test/MC/AArch64/SVE2/uminp-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uminp.s | 59 + llvm/test/MC/AArch64/SVE2/urecpe-diagnostics.s | 33 + llvm/test/MC/AArch64/SVE2/urecpe.s | 42 + llvm/test/MC/AArch64/SVE2/ursqrte-diagnostics.s | 33 + llvm/test/MC/AArch64/SVE2/ursqrte.s | 42 + llvm/test/MC/ELF/debug-hash-file.s | 21 + llvm/test/MC/ELF/debug-main-file.s | 41 + llvm/test/MC/MachO/gen-dwarf-cpp.s | 12 +- llvm/test/MC/MachO/gen-dwarf-macro-cpp.s | 3 - ...alentry-symver.s => ppc64-localentry-symbols.s} | 17 + llvm/test/Transforms/EarlyCSE/debug-info-undef.ll | 2 +- .../test/Transforms/InstCombine/cast-mul-select.ll | 2 - .../Transforms/InstCombine/unavailable-debug.ll | 2 +- .../MergeICmps/X86/alias-merge-blocks.ll | 2 +- llvm/test/Transforms/MergeICmps/X86/atomic.ll | 2 +- .../MergeICmps/X86/entry-block-shuffled.ll | 2 +- .../Transforms/MergeICmps/X86/gep-used-outside.ll | 2 +- .../Transforms/MergeICmps/X86/int64-and-ptr.ll | 2 +- .../MergeICmps/X86/last-block-produce-no-value.ll | 2 +- .../MergeICmps/X86/multiple-blocks-does-work.ll | 2 +- .../Transforms/MergeICmps/X86/pair-int32-int32.ll | 4 +- llvm/test/Transforms/MergeICmps/X86/pr36557.ll | 2 +- llvm/test/Transforms/MergeICmps/X86/pr41917.ll | 2 +- .../MergeICmps/X86/split-block-does-work.ll | 2 +- .../Transforms/MergeICmps/X86/tuple-four-int8.ll | 2 +- .../Transforms/MergeICmps/X86/two-complex-bb.ll | 2 +- llvm/test/Transforms/MergeICmps/X86/volatile.ll | 2 +- .../tools/llvm-objcopy/ELF/strip-unneeded.test | 18 +- ...sassemble-implied-by-disassemble-functions.test | 22 + llvm/tools/bugpoint/Miscompilation.cpp | 6 +- llvm/tools/dsymutil/DwarfLinker.cpp | 6 +- llvm/tools/dsymutil/DwarfStreamer.cpp | 3 +- llvm/tools/dsymutil/DwarfStreamer.h | 3 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 2 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 3 +- llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp | 7 +- llvm/unittests/Support/MemoryTest.cpp | 60 +- .../clangd/refactor/tweaks/BUILD.gn | 1 + .../gn/secondary/clang/lib/Tooling/Syntax/BUILD.gn | 13 + llvm/utils/gn/secondary/clang/unittests/BUILD.gn | 1 + .../gn/secondary/clang/unittests/Tooling/BUILD.gn | 1 + .../clang/unittests/Tooling/Syntax/BUILD.gn | 20 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 2 + polly/lib/Analysis/DependenceInfo.cpp | 4 +- polly/lib/CodeGen/BlockGenerators.cpp | 19 +- .../Isl/CodeGen/region_multiexit_partialwrite.ll | 44 + ...ion_multiexit_partialwrite___%bb3---%bb19.jscop | 52 + ...t_partialwrite___%bb3---%bb19.jscop.transformed | 52 + 272 files changed, 15196 insertions(+), 2393 deletions(-) create mode 100644 clang-tools-extra/clangd/refactor/tweaks/RawStringLiteral.cpp create mode 100644 clang/test/AST/ast-dump-comment-json.cpp create mode 100644 clang/test/AST/ast-dump-expr-json.c create mode 100644 clang/test/AST/ast-print-no-sanitize.cpp copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_sdk_ [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda => basic_darwin_toolchai [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => basic_darwin_tool [...] copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda => basic_darwin_toolchai [...] create mode 100644 clang/test/Driver/darwin-header-search-libcxx.cpp create mode 100644 clang/test/Driver/darwin-header-search-libstdcxx.cpp create mode 100644 clang/test/Driver/darwin-header-search-system.cpp rename clang/test/FixIt/{fixit-cxx0x.cpp => fixit-c++11.cpp} (100%) delete mode 100644 clang/test/Frontend/warning-stdlibcxx-darwin.cpp create mode 100644 clang/test/Index/cxx14-lambdas.cpp create mode 100644 clang/test/SemaObjC/nullability_macro.m create mode 100644 libcxx/test/std/strings/basic.string.hash/char_type_hash.fail.cpp create mode 100644 lld/test/wasm/reproduce.ll create mode 100644 lld/wasm/Relocations.cpp copy lld/wasm/{Writer.h => Relocations.h} (64%) create mode 100644 lld/wasm/SyntheticSections.cpp create mode 100644 lld/wasm/SyntheticSections.h create mode 100644 llvm/docs/BuildingADistribution.rst create mode 100644 llvm/test/CodeGen/AArch64/arm64-neon-vector-shuffle-extract.ll create mode 100644 llvm/test/CodeGen/AArch64/lround-conv-win.ll create mode 100644 llvm/test/CodeGen/AArch64/shift-amount-mod.ll create mode 100644 llvm/test/CodeGen/AMDGPU/call-skip.ll rename llvm/test/CodeGen/{AArch64 => ARM}/addsubo-legalization.ll (100%) create mode 100644 llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll create mode 100644 llvm/test/CodeGen/PowerPC/schedule-addi-load.mir create mode 100644 llvm/test/CodeGen/PowerPC/unaligned-addressing-mode.ll create mode 100644 llvm/test/CodeGen/X86/shift-amount-mod.ll delete mode 100644 llvm/test/DebugInfo/X86/main-file-name.s delete mode 100755 llvm/test/DebugInfo/salvage-cast-debug-info.ll create mode 100644 llvm/test/MC/AArch64/SVE2/addp-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/addp.s create mode 100644 llvm/test/MC/AArch64/SVE2/smaxp-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/smaxp.s create mode 100644 llvm/test/MC/AArch64/SVE2/sminp-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sminp.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqabs-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqabs.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqneg-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqneg.s create mode 100644 llvm/test/MC/AArch64/SVE2/umaxp-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/umaxp.s create mode 100644 llvm/test/MC/AArch64/SVE2/uminp-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uminp.s create mode 100644 llvm/test/MC/AArch64/SVE2/urecpe-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/urecpe.s create mode 100644 llvm/test/MC/AArch64/SVE2/ursqrte-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ursqrte.s create mode 100644 llvm/test/MC/ELF/debug-hash-file.s create mode 100644 llvm/test/MC/ELF/debug-main-file.s rename llvm/test/MC/PowerPC/{ppc64-localentry-symver.s => ppc64-localentry-symbols [...] create mode 100644 llvm/test/tools/llvm-objdump/X86/disassemble-implied-by-disasse [...] create mode 100644 llvm/utils/gn/secondary/clang/lib/Tooling/Syntax/BUILD.gn create mode 100644 llvm/utils/gn/secondary/clang/unittests/Tooling/Syntax/BUILD.gn create mode 100644 polly/test/Isl/CodeGen/region_multiexit_partialwrite.ll create mode 100644 polly/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---% [...] create mode 100644 polly/test/Isl/CodeGen/region_multiexit_partialwrite___%bb3---% [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits May 2019