Tcwg-commits May 2019

tcwg-commits@lists.linaro.org

4 participants
17284 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (a0de46c258a -> 07924d006bb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/gcc. from a0de46c258a PR libstdc++/89466 avoid slow xsltproc command in configure adds 7d6228df0f1 Daily bump. adds 07924d006bb Backport r271548 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++++++++ gcc/DATESTAMP | 2 +- gcc/gimplify.c | 1 + gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/g++.dg/asan/pr90570.C | 18 ++++++++++++++++++ 5 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/asan/pr90570.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (d9143b9c02 -> 40f4d1e510)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/binutils-gdb. from d9143b9c02 Automatic date update in version.in adds 40f4d1e510 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (a8e1505a -> 2f005143)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards a8e1505a 0: update: binutils-gcc-linux: boot new 2f005143 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a8e1505a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-prepare_abe/console.log | 406 +- 03-build_abe-binutils/console.log | 11020 +++++++-------- 04-build_abe-stage1/console.log | 13544 ++++++++++--------- 05-build_linux/console.log | 730 +- 06-boot_linux/console.log | 4 +- console.log | 25786 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 25741 insertions(+), 25777 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (61686afe1ff3 -> 4dde821e4296)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from 61686afe1ff3 Merge tag 'docs-5.2-fixes' of git://git.lwn.net/linux adds 5cd213b0fec6 xfs: don't reserve per-AG space for an internal log adds 4dde821e4296 Merge tag 'xfs-5.2-fixes-1' of git://git.kernel.org/pub/sc [...] No new revisions were added by this update. Summary of changes: fs/xfs/libxfs/xfs_ialloc_btree.c | 9 +++++++++ fs/xfs/libxfs/xfs_refcount_btree.c | 9 +++++++++ fs/xfs/libxfs/xfs_rmap_btree.c | 9 +++++++++ 3 files changed, 27 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (9124fda0adf -> 11c3a5c0f98)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 9124fda0adf Merging r355038: adds 1a19847514e Merging r351523: adds 11c3a5c0f98 Merging r360825: No new revisions were added by this update. Summary of changes: compiler-rt/cmake/base-config-ix.cmake | 4 ++-- llvm/lib/Target/AVR/AVRISelLowering.cpp | 28 ++++++++++++++--------- llvm/lib/Target/AVR/AVRISelLowering.h | 8 ++++++- llvm/lib/Target/AVR/AVRSubtarget.cpp | 12 ++++++++-- llvm/lib/Target/AVR/AVRSubtarget.h | 5 +++- llvm/test/CodeGen/AVR/{mul.ll => hardware-mul.ll} | 2 ++ llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/software-mul.ll | 28 +++++++++++++++++++++++ llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- 9 files changed, 72 insertions(+), 19 deletions(-) rename llvm/test/CodeGen/AVR/{mul.ll => hardware-mul.ll} (90%) create mode 100644 llvm/test/CodeGen/AVR/software-mul.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (5747b190 -> 06f24158)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 5747b190 0: update: llvm-linux: boot new 06f24158 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5747b190) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11710 +++++++++++++++++------------------ 03-build_linux/console.log | 672 +- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 25 - console.log | 12608 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 7 files changed, 12616 insertions(+), 12637 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (aa7a2c547e2 -> 468724eed29)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from aa7a2c547e2 [LibTooling] Fix dangling references in RangeSelector. adds 7b7683d7a6c [FileCheck] Remove llvm:: prefix adds eafe8ef6f2b [WebAssembly] Add multivalue and tail-call target features adds 2049e4dd8f6 [LOOPINFO] Extend Loop object to add utilities to get t [...] adds 9b2830b46e1 lld-link, clang: Treat non-existent input files as possible [...] adds 0f3ba44b57b AMDGPU/GlobalISel: Legality for integer min/max adds 4d7054615cc gn build: Merge r361418 more adds d19a36efd14 UpdateTestChecks: -march=mips/-march=mipsel is mips triple. adds 06688fe7158 [NFC][Mips] Autogenerate msa/arithmetic.ll test adds a8a470c45b8 [NFC][Mips] Autogenerate msa/i5-s.ll test adds c8364ef567d [NFC][PPC] Autogenerate vec_add_sub_doubleword.ll test adds 702a152e6ad [NFC][PPC] Autogenerate vec_add_sub_quadword.ll test adds e18b5c62376 [WebAssembly] Implement ReplaceNodeResults to fix a SIMD crash adds 170dfeb2ff0 Resubmit r360436 "[X86] Avoid SFB - Fix inconsistent codege [...] adds a21d5ab369e [HostNativeThreadBase] Undo nullptr changes adds 06e80f64261 [OPENMP]Simplify codegen for the outlined regions. adds 549ed544c3b [Driver] Move the "-o OUT -x TYPE SRC.c" flags to the end of -cc1 adds 517e3cb0a57 Test commit access by removing a empty line adds 4fb41a24bcf [git] Be more specific when looking for llvm-svn adds 3249be1e03c [InstCombine] be more careful when transforming a shuffle mask adds 267ac925fb4 [NewPassManager] Add tuning option: SLPVectorization [clang [...] adds e836096f01f [CMake] Fixing errors in r361513 adds a8e0d49c0ce Fix unresolved symbols when linking tools/clang/unittests/T [...] adds 63729b0c49d [SLPVectorizer] Set flag to previous default. adds cb64cd9b604 [NFC] UpdateTestChecks: asm.py: fix whitespace issue adds a83bf477702 [gdb-remote] Fix more issues with thread_result_t adds e4b27869c60 [NewPassManager] Add tuning option: LoopUnrolling [NFC]. adds 5c714cbdd83 AMDGPU: Correct maximum possible private allocation size adds 9925ef78ce2 Update breaking test. adds f81ebfb045b UpdateTestChecks: ppc32 triple support adds 266b65f8404 [Utility] Avoid a few unnecessary copies (NFC) adds 30905a375ea Fix sphinx unknown document error adds 56d69ef8ca1 [lldb] Make sure RegularExpression constructors always init [...] adds 7d6c0bce503 [DAGCombiner] make folds of binops safe for opcodes that pr [...] adds edb52e2e7d0 [Process] Fix another thread_result_t & nullptr incompatibility. adds 14f4ff6e897 [COFF] Move KeepUnique bit from Chunk to SectionChunk, NFC adds dab31924e9c [clang-tidy]: Add cert-oop54-cpp alias for bugprone-unhandl [...] adds e8df27d9256 [analyzer] Add a new frontend flag to display all checker options adds 987fdfd9a71 Revert [LOOPINFO] Extend Loop object to add utilities t [...] adds f53c502e0b5 [TTI] Fix some typos in comments. NFC adds b4cb7d8045e [NFC] Add blank line (test commit) adds ca6a8ae0bff ELF: Remove a comparison against In.EhFrame. NFCI. adds a85c0fd9187 [X86] Split multi-line chained assignments into single line [...] adds 5bc40d9b188 [analyzer] List checkers in 3 categories: released, alpha, [...] adds e60cb7d1be4 [InstSimplify] insertelement V, undef, ? --> V adds d82ddfa7c37 [NewPassManager] Add tuning option: ForgetAllSCEVInLoopUnro [...] adds 7e55ed84d05 [analyzer] Hide developer-only checker/package options by default adds f2e41dd6ed1 Use clang_cc1 instead of clang in CodeGen test. adds 5554a5fcbdd fix accidental implicit matches in elf-disassemble-symbol-l [...] adds e0ef04f8cb2 [OPENMP]Do not crash for const firstprivates. adds 342571e8d6e [lldb] followup fix for https://reviews.llvm.org/D62305 adds ac95c865113 [analyzer] List checker/plugin options in 3 categories: rel [...] adds 3e4acaabb9d Break false dependencies on target libraries adds 4d4df6f144d [InstCombine] remove redundant fold for insertelement; NFC adds 093c922205f [InstCombine] remove redundant fold for extractelement; NFC adds ffafdb9afc8 Fix hang during constant evaluation of union assignment. adds ae02e894480 P0722R3: Implement library support for destroying delete adds 11c141eb685 [COFF] Remove finalizeContents virtual method from Chunk, NFC adds 3c9c9ea2c98 Update C++2a status for destroying delete adds 3e15f833819 [InstSimplify] add tests for insert-of-extract; NFC adds 8869a98e825 [InstSimplify] fold insertelement-of-extractelement adds 55229f6b102 [WebAssembly] Expand more SIMD float ops adds ab09cca310e llvm-objcopy: Change sectionWithinSegment() to use virtual [...] adds 060f4b48d55 [libFuzzer] when using data-flow-trace (DFT) only load the [...] adds 09ad8c8f73d Fix integer literals which are cast to bool adds 052f87ae361 Revert r361460 adds 79872a88a06 dwarfdump: Add a bit more DWARF64 support adds ecd111533df Revert "[lldb] followup fix for https://reviews.llvm.org/D62305" adds ed595e8627b [AArch64] Add nvcast patterns for v2f32 -> v1f64 adds b7a78c7dff1 [AArch64] Preserve X8 for thunks ending in variadic musttail calls adds 4e53032d9bd [CFG] NFC: Remove implicit conversion from CFGTerminator to [...] adds 1293de8b173 [CFG] NFC: Modernize a test file for constructor initializer CFGs. adds 8458c9ef423 Factor out repeated code to build 'this' expressions and ma [...] adds fc302c2b7f1 dwarfdump: Deterministically... determine whether parsing a [...] adds 414da9d66a5 Clarify how musttail can be used to create forwarding thunks adds 4cecdaa05f8 Fix BUILD_SHARED_LIBS builds after r361567 adds 425e565783d [analyzer] NFC: Prevent multi-file plist test from spamming [...] adds e46721a1534 fix destroying delete test with older apple compilers adds a38ddc36fdc fix test for older clang versions adds 01d6173667f [llvm-nm] Fix Bug 41353 - unique symbols printed as D instead of u adds c652b3455ec [NFC] SwitchInst: Introduce wrapper for prof branch_weights [...] adds 0ee23c958bb [Utility] Small improvements to the Broadcaster class (NFC) adds 0de4e935bb5 Do not resolve directory junctions for `-fdiagnostics-absol [...] adds af0add6c39f [X86] Add test case that was supposed to go with r360102. adds 449bfdd1b02 [Power9] Add a specific heuristic to schedule the addi befo [...] adds b087129b5d3 [clang-tidy] Add option "LiteralInitializers" to cppcoregui [...] adds 8ac0bc9832a DWARFContext: Make loading of sections thread-safe adds f750842c8b3 DWARF: Implement DW_AT_signature lookup for type unit support adds 937af54666c [ARM] ARMExpandPseudoInsts: add debug messages adds d63a2bb35fb [DSE] Bugfix to avoid PartialStoreMerging involving non byt [...] adds c1b482f2a5d [mips] Always check that `shift and add` optimization is ef [...] adds 3d7a057b0d1 CodeGen: factor out swifterror value tracking. adds 3b2157aeed8 GlobalISel: support swifterror attribute on AArch64. adds d9bb7b69abe [AArch64][SVE2] Asm: fix overlapping bit adds 119c31ad937 StructurizeCFG: Relax uniformity checks. adds 6bca64fe5e9 [AArch64][SVE2] Asm: add saturating add/sub instructions adds 968cb0e0499 [AArch64][SVE2] Asm: add various bitwise shift instructions adds b4771425f53 Use the DataLayout::typeSizeEqualsStoreSize helper. NFC adds 7f1ff68a165 [ELF] Deleted unused forward declarations. NFC adds 8bcea9daaa6 [AArch64][SVE2] Asm: add integer add/sub long/wide instructions adds c472f7b010d Fix sphinx "Malformed option description" warning adds 7d4a67852da [ELF] Fix a doc typo. NFC adds 1a0312ca0b2 [FuncUnwinders] Use "symbol file" unwind plans for unwinding adds 980f7605156 [AArch64][SVE2] Asm: add PMULLB/PMULLT instructions adds 95b8d9bbf85 [SelectionDAG] computeKnownBits - support constant pool val [...] adds 8654b8c55b5 [llvm-objdump][test] Fix for spurious matches against file paths adds 5f04f002820 [AArch64][SVE2] Asm: support SVE2 Accumulate Group adds cabab29af2d [CodeComplete] Filter override completions by function name adds adb1d74bf9e [AArch64][SVE2] Asm: support SVE2 Narrowing Group adds 0f748e6e9b9 [clangd] Limit the size of synthesized fix message adds e4f01ec50c4 [llvm-readobj][mips] Align GOT columns headers properly in [...] adds b3e58df80c5 [AArch64][SVE2] Asm: support SVE2 String Processing Group adds f2d5b7a4fa0 Made cppcoreguidelines-pro-type-member-init-use-assignment [...] adds b7f2a2b4c0e Make cppcoreguidelines-pro-type-member-init-use-assignment. [...] adds f835fcf412c [llvm-readelf] - Allow dumping of the .dynamic section even [...] adds 33bee053c39 Revert r361630 "[llvm-readelf] - Allow dumping of the .dyna [...] adds 522307fa40d [PowerPC] Remove CRBits Copy Of Unset/set CBit adds 8362cbe13b3 [llvm-readobj] Implement GNU-style output for dynamic table adds 74de6203efd [LLD][COFF] Implement /filealign parameter adds 35be7ff80c1 [WebAssembly] Add support for -emit-relocs adds 7991b682848 [lld] Trace all references with lld --trace-symbol adds 21977d8e29f [MCA] Zero-initialize field CRD in InstructionBase. Also ru [...] adds e1947b84c12 Revert "[OPENMP][NVPTX]Fix barriers and parallel level coun [...] adds a5ca34e6b3c [WebAssebmly] Add support for --wrap adds c0ea5b2d514 gn build: Merge r361607 adds aa7754cc903 [OpenCL] Add support for the cl_arm_integer_dot_product extensions adds c1cc8d0eca4 [llvm-objcopy] - Strip undefined symbols if they are no lon [...] adds fab7205ac45 [LibTooling] Add Explanation parameter to `makeRule`. adds dffedea0148 [AMDGPU] Divergence driven ISel. Assign register class for [...] adds 47fd4f06c55 [CodeComplete] Add whitespace around braces in lambda completions adds 07745a131fa [CMake] Fix issues building runtimes new 5b33554319c [clang-tidy] In TransformerClangTidyCheck, require Explanat [...] new 6f7734a1255 [LoopVectorize] update test to be independent of instcombine; NFC new 0ff901fba0a AMDGPU: Boost inline threshold with addrspacecasted alloca [...] new 468724eed29 [ASTImporter] Call to HandleNameConflict in VisitRecordDecl [...] The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../bugprone/UnhandledSelfAssignmentCheck.cpp | 61 +- .../bugprone/UnhandledSelfAssignmentCheck.h | 8 +- .../clang-tidy/cert/CERTTidyModule.cpp | 4 + clang-tools-extra/clang-tidy/cert/CMakeLists.txt | 1 + .../cppcoreguidelines/ProTypeMemberInitCheck.cpp | 56 +- .../cppcoreguidelines/ProTypeMemberInitCheck.h | 5 + .../clang-tidy/utils/TransformerClangTidyCheck.cpp | 25 +- .../clang-tidy/utils/TransformerClangTidyCheck.h | 10 +- clang-tools-extra/clangd/Diagnostics.cpp | 38 +- .../clangd/unittests/CodeCompleteTests.cpp | 14 +- .../clangd/unittests/DiagnosticsTests.cpp | 32 +- clang-tools-extra/docs/ReleaseNotes.rst | 12 +- .../checks/bugprone-unhandled-self-assignment.rst | 10 +- .../docs/clang-tidy/checks/cert-oop54-cpp.rst | 10 + .../cppcoreguidelines-pro-type-member-init.rst | 4 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + ...ment-warn-only-if-this-has-suspicious-field.cpp | 41 + .../test/clang-tidy/cert-oop54-cpp.cpp | 16 + ...delines-pro-type-member-init-use-assignment.cpp | 40 + .../clang-tidy/TransformerClangTidyCheckTest.cpp | 15 +- clang/include/clang/Analysis/CFG.h | 57 +- clang/include/clang/Analysis/ProgramPoint.h | 2 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 12 +- clang/include/clang/Basic/OpenCLExtensions.def | 6 + clang/include/clang/Driver/CC1Options.td | 23 +- clang/include/clang/Driver/Driver.h | 8 + clang/include/clang/Driver/Options.td | 4 + clang/include/clang/Sema/Sema.h | 4 + .../clang/StaticAnalyzer/Checkers/CheckerBase.td | 38 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 124 ++- .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 35 +- .../StaticAnalyzer/Frontend/CheckerRegistry.h | 19 +- .../StaticAnalyzer/Frontend/FrontendActions.h | 4 + .../clang/Tooling/Refactoring/Transformer.h | 8 +- clang/lib/AST/ASTImporter.cpp | 2 +- clang/lib/AST/ExprConstant.cpp | 5 +- clang/lib/Analysis/CFG.cpp | 29 +- clang/lib/Analysis/CFGStmtMap.cpp | 2 +- clang/lib/Analysis/Consumed.cpp | 2 +- clang/lib/Analysis/LiveVariables.cpp | 2 +- clang/lib/Analysis/ProgramPoint.cpp | 2 +- clang/lib/Analysis/ReachableCode.cpp | 17 +- clang/lib/Analysis/ThreadSafety.cpp | 8 +- clang/lib/Analysis/UninitializedValues.cpp | 2 +- clang/lib/Basic/Targets/WebAssembly.cpp | 26 + clang/lib/Basic/Targets/WebAssembly.h | 2 + clang/lib/Basic/Targets/X86.cpp | 50 +- clang/lib/CodeGen/BackendUtil.cpp | 9 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 79 +- clang/lib/Driver/Driver.cpp | 41 +- clang/lib/Driver/ToolChains/Clang.cpp | 50 +- clang/lib/Frontend/CompilerInvocation.cpp | 11 +- clang/lib/Frontend/TextDiagnostic.cpp | 21 + .../lib/FrontendTool/ExecuteCompilerInvocation.cpp | 14 +- clang/lib/Headers/opencl-c.h | 28 + clang/lib/Sema/AnalysisBasedWarnings.cpp | 14 +- clang/lib/Sema/SemaCodeComplete.cpp | 50 +- clang/lib/Sema/SemaExprCXX.cpp | 16 +- clang/lib/Sema/SemaExprMember.cpp | 6 +- clang/lib/Sema/SemaOverload.cpp | 6 +- clang/lib/Sema/TreeTransform.h | 8 +- .../Checkers/UnreachableCodeChecker.cpp | 4 +- clang/lib/StaticAnalyzer/Core/AnalyzerOptions.cpp | 32 + clang/lib/StaticAnalyzer/Core/BugReporter.cpp | 4 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 6 +- clang/lib/StaticAnalyzer/Core/CoreEngine.cpp | 4 +- clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 8 +- clang/lib/StaticAnalyzer/Core/LoopUnrolling.cpp | 2 +- clang/lib/StaticAnalyzer/Core/PathDiagnostic.cpp | 2 +- .../Frontend/CheckerRegistration.cpp | 51 +- .../StaticAnalyzer/Frontend/CheckerRegistry.cpp | 120 +- clang/lib/Tooling/Refactoring/Transformer.cpp | 8 +- clang/test/Analysis/analyzer-checker-option-help.c | 87 ++ clang/test/Analysis/analyzer-list-configs.c | 11 +- clang/test/Analysis/checker-plugins.c | 9 + .../expected-plists/plist-multi-file.c.plist | 4 - clang/test/Analysis/diagnostics/plist-multi-file.c | 4 +- clang/test/Analysis/initializers-cfg-output.cpp | 222 ++-- .../CheckerOptionHandling.cpp | 3 +- clang/test/Analysis/show-checker-list.c | 63 +- clang/test/CodeCompletion/lambdas.cpp | 10 +- clang/test/CodeCompletion/overrides.cpp | 12 +- clang/test/CodeGen/loop-vectorize.c | 25 + .../test/CodeGenOpenCL/arm-integer-dot-product.cl | 38 + clang/test/Driver/cuda-options.cu | 6 +- clang/test/Driver/hip-toolchain-no-rdc.hip | 4 +- clang/test/Driver/openmp-offload.c | 102 +- clang/test/Driver/unknown-arg.c | 37 +- clang/test/Driver/unsupported-option.c | 2 +- clang/test/Frontend/absolute-paths-windows.test | 9 + clang/test/Frontend/lit.local.cfg | 2 +- clang/test/Frontend/unknown-arg.c | 2 +- .../OpenMP/distribute_firstprivate_codegen.cpp | 15 +- .../test/OpenMP/distribute_lastprivate_codegen.cpp | 19 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 15 +- ...distribute_parallel_for_lastprivate_codegen.cpp | 20 +- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 10 + ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 18 +- .../distribute_simd_firstprivate_codegen.cpp | 6 +- .../OpenMP/distribute_simd_lastprivate_codegen.cpp | 12 +- clang/test/OpenMP/for_reduction_codegen.cpp | 13 +- clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 4 + .../test/OpenMP/parallel_firstprivate_codegen.cpp | 19 +- clang/test/OpenMP/target_map_codegen.cpp | 8 + ...arget_teams_distribute_firstprivate_codegen.cpp | 9 +- ...target_teams_distribute_lastprivate_codegen.cpp | 18 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 15 +- ...distribute_parallel_for_lastprivate_codegen.cpp | 78 +- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 7 +- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 22 +- ..._teams_distribute_simd_firstprivate_codegen.cpp | 4 +- ...t_teams_distribute_simd_lastprivate_codegen.cpp | 15 +- .../teams_distribute_firstprivate_codegen.cpp | 8 +- .../teams_distribute_lastprivate_codegen.cpp | 13 +- ...istribute_parallel_for_firstprivate_codegen.cpp | 15 +- ...distribute_parallel_for_lastprivate_codegen.cpp | 18 +- ...bute_parallel_for_simd_firstprivate_codegen.cpp | 14 +- ...ibute_parallel_for_simd_lastprivate_codegen.cpp | 18 +- .../teams_distribute_simd_firstprivate_codegen.cpp | 8 +- .../teams_distribute_simd_lastprivate_codegen.cpp | 13 +- clang/test/Preprocessor/wasm-target-features.c | 22 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 8 + clang/test/SemaOpenCL/arm-integer-dot-product.cl | 43 + clang/unittests/Tooling/CMakeLists.txt | 1 + clang/unittests/Tooling/TransformerTest.cpp | 3 +- clang/utils/TableGen/ClangSACheckersEmitter.cpp | 87 +- compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.cpp | 16 +- compiler-rt/lib/fuzzer/FuzzerDataFlowTrace.h | 4 +- compiler-rt/lib/fuzzer/FuzzerLoop.cpp | 7 +- compiler-rt/test/fuzzer/dataflow.test | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/include/new | 15 + libcxx/include/version | 4 +- .../support.dynamic/destroying_delete_t.pass.cpp | 68 ++ .../destroying_delete_t_declaration.pass.cpp | 52 + .../support.limits.general/new.version.pass.cpp | 6 +- .../version.version.pass.cpp | 6 +- .../generate_feature_test_macro_components.py | 9 +- libcxx/www/cxx2a_status.html | 2 +- lld/COFF/Chunks.cpp | 15 +- lld/COFF/Chunks.h | 19 +- lld/COFF/Config.h | 1 + lld/COFF/Driver.cpp | 26 +- lld/COFF/DriverUtils.cpp | 3 +- lld/COFF/Options.td | 1 + lld/COFF/Writer.cpp | 24 +- lld/ELF/Driver.cpp | 2 +- lld/ELF/InputFiles.h | 2 +- lld/ELF/LinkerScript.h | 1 - lld/ELF/MapFile.cpp | 9 +- lld/ELF/MarkLive.cpp | 2 +- lld/ELF/SymbolTable.h | 8 - lld/ELF/Symbols.cpp | 5 +- lld/ELF/Symbols.h | 2 +- lld/ELF/SyntheticSections.h | 4 + lld/include/lld/Common/LLVM.h | 2 + lld/test/COFF/color-diagnostics.test | 4 +- lld/test/COFF/could-not-open.test | 2 +- lld/test/COFF/driver.test | 12 +- lld/test/COFF/error-limit.test | 20 +- lld/test/COFF/filealign.test | 51 + lld/test/COFF/nodefaultlib.test | 4 +- lld/test/COFF/responsefile.test | 6 +- lld/test/ELF/ppc64-dynamic-relocations.s | 2 +- lld/test/ELF/trace-symbols.s | 7 +- lld/test/wasm/emit-relocs.ll | 39 + lld/test/wasm/trace-symbol.ll | 19 +- lld/test/wasm/wrap.ll | 40 + lld/wasm/Config.h | 1 + lld/wasm/Driver.cpp | 86 ++ lld/wasm/InputFiles.h | 2 + lld/wasm/LTO.cpp | 5 + lld/wasm/Options.td | 5 + lld/wasm/SymbolTable.cpp | 23 +- lld/wasm/SymbolTable.h | 15 +- lld/wasm/Symbols.cpp | 13 +- lld/wasm/Symbols.h | 11 +- lld/wasm/SyntheticSections.h | 4 +- lld/wasm/Writer.cpp | 10 +- lldb/include/lldb/Symbol/FuncUnwinders.h | 2 +- lldb/include/lldb/Utility/Broadcaster.h | 151 +-- lldb/include/lldb/Utility/Listener.h | 7 +- .../Breakpad/Inputs/unwind-via-stack-cfi.syms | 6 + .../Breakpad/Inputs/unwind-via-stack-cfi.yaml | 43 + .../lit/SymbolFile/Breakpad/stack-cfi-parsing.test | 4 + .../SymbolFile/Breakpad/unwind-via-stack-cfi.test | 20 + .../SymbolFile/DWARF/Inputs/debug-types-basic.cpp | 10 +- .../DWARF/Inputs/debug-types-expressions.cpp | 8 + lldb/lit/SymbolFile/DWARF/debug-types-basic.test | 8 + .../SymbolFile/DWARF/debug-types-expressions.test | 15 + .../DWARF/debug-types-missing-signature.test | 26 + .../SymbolFile/DWARF/debug-types-signature-loop.s | 115 ++ .../SymbolFile/DWARF/parallel-indexing-stress.s | 82 ++ lldb/source/Commands/CommandObjectPlatform.cpp | 2 +- lldb/source/Commands/CommandObjectTarget.cpp | 4 +- lldb/source/Commands/CommandObjectThread.cpp | 2 +- lldb/source/Core/Address.cpp | 2 +- lldb/source/Core/ModuleList.cpp | 1 - lldb/source/Host/common/HostNativeThreadBase.cpp | 8 +- lldb/source/Host/macosx/objcxx/Host.mm | 2 +- lldb/source/Interpreter/Options.cpp | 6 +- .../Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp | 30 +- .../Clang/ASTResultSynthesizer.cpp | 2 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 30 +- .../Clang/ClangExpressionDeclMap.cpp | 4 +- .../Instruction/ARM64/EmulateInstructionARM64.cpp | 4 +- .../AppleObjCClassDescriptorV2.cpp | 4 +- .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp | 6 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 2 +- .../Process/MacOSX-Kernel/CommunicationKDP.cpp | 2 +- .../Process/Utility/RegisterContextLLDB.cpp | 14 +- .../Process/gdb-remote/GDBRemoteCommunication.cpp | 6 +- .../Process/gdb-remote/ProcessGDBRemote.cpp | 2 +- .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 36 +- .../Plugins/SymbolFile/DWARF/DWARFContext.cpp | 56 +- .../source/Plugins/SymbolFile/DWARF/DWARFContext.h | 31 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 35 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.h | 6 + .../Plugins/SymbolFile/DWARF/DWARFFormValue.cpp | 8 + .../Plugins/SymbolFile/DWARF/DWARFTypeUnit.cpp | 1 - .../Plugins/SymbolFile/DWARF/DWARFTypeUnit.h | 8 + lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 10 + lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h | 8 + .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 2 +- lldb/source/Symbol/ClangASTContext.cpp | 6 +- lldb/source/Symbol/ClangASTImporter.cpp | 2 +- lldb/source/Symbol/CompilerType.cpp | 2 +- lldb/source/Symbol/FuncUnwinders.cpp | 7 +- lldb/source/Symbol/Function.cpp | 2 +- lldb/source/Symbol/SymbolContext.cpp | 2 +- lldb/source/Target/Process.cpp | 16 +- lldb/source/Target/Target.cpp | 2 +- lldb/source/Target/Thread.cpp | 8 +- lldb/source/Utility/Broadcaster.cpp | 94 +- lldb/source/Utility/JSON.cpp | 6 +- lldb/source/Utility/Listener.cpp | 10 +- lldb/source/Utility/RegularExpression.cpp | 7 +- lldb/source/Utility/SelectHelper.cpp | 2 +- lldb/source/Utility/StructuredData.cpp | 4 +- lldb/tools/debugserver/source/DNB.cpp | 4 +- lldb/tools/debugserver/source/JSON.cpp | 6 +- .../debugserver/source/MacOSX/MachThreadList.cpp | 2 +- lldb/tools/debugserver/source/RNBRemote.cpp | 6 +- lldb/tools/debugserver/source/debugserver.cpp | 3 +- lldb/tools/debugserver/source/libdebugserver.cpp | 2 +- llvm/cmake/modules/LLVM-Config.cmake | 7 + llvm/docs/LangRef.rst | 10 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 8 +- llvm/include/llvm/CodeGen/FunctionLoweringInfo.h | 53 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 56 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 3 + llvm/include/llvm/CodeGen/SelectionDAG.h | 1 + llvm/include/llvm/CodeGen/SelectionDAGISel.h | 2 + .../include/llvm/CodeGen/SwiftErrorValueTracking.h | 109 ++ llvm/include/llvm/CodeGen/TargetLowering.h | 15 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 5 + llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h | 11 +- llvm/include/llvm/IR/DataLayout.h | 8 + llvm/include/llvm/IR/Instructions.h | 46 + llvm/include/llvm/MCA/Instruction.h | 7 +- llvm/include/llvm/Object/ELFObjectFile.h | 11 + llvm/include/llvm/Passes/PassBuilder.h | 7 + llvm/include/llvm/Support/FileCheck.h | 14 +- .../llvm/Transforms/Scalar/LoopUnrollPass.h | 24 +- llvm/lib/Analysis/InstructionSimplify.cpp | 11 + llvm/lib/CodeGen/CMakeLists.txt | 1 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 5 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 14 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 89 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 20 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 64 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 55 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 40 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 10 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 280 +---- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 12 + llvm/lib/CodeGen/SwiftErrorValueTracking.cpp | 312 ++++++ llvm/lib/DebugInfo/DWARF/DWARFUnit.cpp | 25 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 13 +- llvm/lib/IR/Instructions.cpp | 120 ++ llvm/lib/Passes/PassBuilder.cpp | 14 +- llvm/lib/Support/FileCheck.cpp | 48 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 16 +- llvm/lib/Target/AArch64/AArch64CallLowering.h | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 6 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 1 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 145 ++- llvm/lib/Target/AArch64/SVEInstrFormats.td | 296 ++++- llvm/lib/Target/AMDGPU/AMDGPU.td | 7 - llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 7 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 23 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 7 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 13 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 142 ++- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 112 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 + llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 18 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 57 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 2 + llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp | 51 + llvm/lib/Target/PowerPC/PPCMachineScheduler.h | 7 + llvm/lib/Target/WebAssembly/WebAssembly.td | 11 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 18 +- .../Target/WebAssembly/WebAssemblyISelLowering.h | 3 + .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 14 +- llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h | 4 + .../Target/X86/X86AvoidStoreForwardingBlocks.cpp | 14 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 16 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 + llvm/lib/Transforms/IPO/GlobalOpt.cpp | 27 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 7 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 2 +- .../InstCombine/InstCombineVectorOps.cpp | 42 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 5 + llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 10 +- llvm/lib/Transforms/Scalar/SROA.cpp | 6 +- llvm/lib/Transforms/Scalar/Scalarizer.cpp | 3 +- llvm/lib/Transforms/Scalar/StructurizeCFG.cpp | 33 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 +- llvm/runtimes/CMakeLists.txt | 10 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 21 +- llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll | 518 +++++++++ llvm/test/CodeGen/AArch64/arm64-nvcast.ll | 12 + llvm/test/CodeGen/AArch64/vararg-tallcall.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 423 ++++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 423 ++++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 413 +++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 413 +++++++ .../AMDGPU/GlobalISel/regbankselect-smax.mir | 73 ++ .../AMDGPU/GlobalISel/regbankselect-smin.mir | 73 ++ .../AMDGPU/GlobalISel/regbankselect-umax.mir | 73 ++ .../AMDGPU/GlobalISel/regbankselect-umin.mir | 73 ++ llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 3 +- llvm/test/CodeGen/AMDGPU/branch-uniformity.ll | 4 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 7 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 55 +- .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 6 +- llvm/test/CodeGen/AMDGPU/fabs.ll | 12 +- llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll | 58 +- llvm/test/CodeGen/AMDGPU/fmin_legacy.ll | 8 +- llvm/test/CodeGen/AMDGPU/fneg-fabs.ll | 16 +- .../test/CodeGen/AMDGPU/frame-index-elimination.ll | 6 +- llvm/test/CodeGen/AMDGPU/fsub.ll | 12 +- llvm/test/CodeGen/AMDGPU/function-returns.ll | 20 + llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll | 31 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 10 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 1 - llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 2 + .../CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 8 +- llvm/test/CodeGen/AMDGPU/madak.ll | 12 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 5 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 5 +- llvm/test/CodeGen/AMDGPU/select-opt.ll | 4 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 3 +- llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 1 - .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 53 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 5 +- .../test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 9 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 6 +- .../vgpr-spill-emergency-stack-slot-compute.ll | 1 + llvm/test/CodeGen/Mips/const-mult.ll | 311 +----- llvm/test/CodeGen/Mips/msa/arithmetic.ll | 689 ++++++------ llvm/test/CodeGen/Mips/msa/i5-s.ll | 72 +- llvm/test/CodeGen/PowerPC/knowCRBitSpill.ll | 14 +- .../CodeGen/PowerPC/remove-copy-crunsetcrbit.mir | 178 +++ llvm/test/CodeGen/PowerPC/schedule-addi-load.mir | 19 +- .../test/CodeGen/PowerPC/vec_add_sub_doubleword.ll | 140 ++- llvm/test/CodeGen/PowerPC/vec_add_sub_quadword.ll | 230 ++-- llvm/test/CodeGen/PowerPC/vec_splat.ll | 292 ++++- llvm/test/CodeGen/WebAssembly/libcalls.ll | 17 +- llvm/test/CodeGen/WebAssembly/multivalue.ll | 28 + .../CodeGen/WebAssembly/simd-illegal-signext.ll | 24 + llvm/test/CodeGen/WebAssembly/simd-unsupported.ll | 180 ++- llvm/test/CodeGen/WebAssembly/tailcall.ll | 21 + .../CodeGen/X86/asm-reg-type-mismatch-avx512.ll | 15 + llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir | 222 ++++ llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 5 +- llvm/test/CodeGen/X86/bitreverse.ll | 18 +- llvm/test/CodeGen/X86/combine-bitreverse.ll | 18 +- llvm/test/CodeGen/X86/combine-shl.ll | 11 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 16 - llvm/test/CodeGen/X86/vector-bitreverse.ll | 553 ++++------ llvm/test/CodeGen/X86/vector-pcmp.ll | 3 +- llvm/test/CodeGen/X86/vector-reduce-mul-widen.ll | 1147 ++++++++------------ llvm/test/CodeGen/X86/vector-reduce-mul.ll | 1122 ++++++++----------- llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll | 24 +- llvm/test/CodeGen/X86/vector-zext.ll | 2 - .../DebugInfo/X86/dwarfdump-str-offsets-macho.s | 7 +- llvm/test/DebugInfo/X86/dwarfdump-str-offsets.s | 7 +- llvm/test/MC/AArch64/SVE2/adclb-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/adclb.s | 36 + llvm/test/MC/AArch64/SVE2/adclt-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/adclt.s | 36 + llvm/test/MC/AArch64/SVE2/addhnb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/addhnb.s | 27 + llvm/test/MC/AArch64/SVE2/addhnt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/addhnt.s | 27 + llvm/test/MC/AArch64/SVE2/cadd-diagnostics.s | 38 + llvm/test/MC/AArch64/SVE2/cadd.s | 72 ++ llvm/test/MC/AArch64/SVE2/match-diagnostics.s | 61 ++ llvm/test/MC/AArch64/SVE2/match.s | 32 + llvm/test/MC/AArch64/SVE2/nmatch-diagnostics.s | 61 ++ llvm/test/MC/AArch64/SVE2/nmatch.s | 32 + llvm/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/pmullb-128.s | 15 + llvm/test/MC/AArch64/SVE2/pmullb-diagnostics.s | 45 + llvm/test/MC/AArch64/SVE2/pmullb.s | 21 + llvm/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/pmullt-128.s | 15 + llvm/test/MC/AArch64/SVE2/pmullt-diagnostics.s | 45 + llvm/test/MC/AArch64/SVE2/pmullt.s | 21 + llvm/test/MC/AArch64/SVE2/raddhnb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/raddhnb.s | 27 + llvm/test/MC/AArch64/SVE2/raddhnt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/raddhnt.s | 27 + llvm/test/MC/AArch64/SVE2/rshrnb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/rshrnb.s | 44 + llvm/test/MC/AArch64/SVE2/rshrnt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/rshrnt.s | 44 + llvm/test/MC/AArch64/SVE2/rsubhnb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/rsubhnb.s | 27 + llvm/test/MC/AArch64/SVE2/rsubhnt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/rsubhnt.s | 27 + llvm/test/MC/AArch64/SVE2/saba-diagnostics.s | 20 + llvm/test/MC/AArch64/SVE2/saba.s | 48 + llvm/test/MC/AArch64/SVE2/sabalb-diagnostics.s | 34 + llvm/test/MC/AArch64/SVE2/sabalb.s | 43 + llvm/test/MC/AArch64/SVE2/sabalt-diagnostics.s | 34 + llvm/test/MC/AArch64/SVE2/sabalt.s | 43 + llvm/test/MC/AArch64/SVE2/sabdlb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/sabdlb.s | 27 + llvm/test/MC/AArch64/SVE2/sabdlt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/sabdlt.s | 27 + llvm/test/MC/AArch64/SVE2/saddlb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/saddlb.s | 27 + llvm/test/MC/AArch64/SVE2/saddlt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/saddlt.s | 27 + llvm/test/MC/AArch64/SVE2/saddwb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/saddwb.s | 27 + llvm/test/MC/AArch64/SVE2/saddwt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/saddwt.s | 27 + llvm/test/MC/AArch64/SVE2/sbclb-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/sbclb.s | 36 + llvm/test/MC/AArch64/SVE2/sbclt-diagnostics.s | 25 + llvm/test/MC/AArch64/SVE2/sbclt.s | 36 + llvm/test/MC/AArch64/SVE2/shrnb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/shrnb.s | 44 + llvm/test/MC/AArch64/SVE2/shrnt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/shrnt.s | 44 + llvm/test/MC/AArch64/SVE2/sli-diagnostics.s | 59 + llvm/test/MC/AArch64/SVE2/sli.s | 56 + llvm/test/MC/AArch64/SVE2/sqadd-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sqadd.s | 59 + llvm/test/MC/AArch64/SVE2/sqcadd-diagnostics.s | 38 + llvm/test/MC/AArch64/SVE2/sqcadd.s | 72 ++ llvm/test/MC/AArch64/SVE2/sqrshl-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sqrshl.s | 59 + llvm/test/MC/AArch64/SVE2/sqrshlr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sqrshlr.s | 59 + llvm/test/MC/AArch64/SVE2/sqrshrnb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqrshrnb.s | 44 + llvm/test/MC/AArch64/SVE2/sqrshrnt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqrshrnt.s | 44 + llvm/test/MC/AArch64/SVE2/sqrshrunb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqrshrunb.s | 44 + llvm/test/MC/AArch64/SVE2/sqrshrunt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqrshrunt.s | 44 + llvm/test/MC/AArch64/SVE2/sqshl-diagnostics.s | 98 ++ llvm/test/MC/AArch64/SVE2/sqshl.s | 131 +++ llvm/test/MC/AArch64/SVE2/sqshlr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sqshlr.s | 59 + llvm/test/MC/AArch64/SVE2/sqshlu-diagnostics.s | 78 ++ llvm/test/MC/AArch64/SVE2/sqshlu.s | 83 ++ llvm/test/MC/AArch64/SVE2/sqshrnb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqshrnb.s | 44 + llvm/test/MC/AArch64/SVE2/sqshrnt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqshrnt.s | 44 + llvm/test/MC/AArch64/SVE2/sqshrunb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqshrunb.s | 44 + llvm/test/MC/AArch64/SVE2/sqshrunt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/sqshrunt.s | 44 + llvm/test/MC/AArch64/SVE2/sqsub-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sqsub.s | 59 + llvm/test/MC/AArch64/SVE2/sqsubr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/sqsubr.s | 59 + llvm/test/MC/AArch64/SVE2/sqxtnb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/sqxtnb.s | 27 + llvm/test/MC/AArch64/SVE2/sqxtnt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/sqxtnt.s | 27 + llvm/test/MC/AArch64/SVE2/sqxtunb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/sqxtunb.s | 27 + llvm/test/MC/AArch64/SVE2/sqxtunt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/sqxtunt.s | 27 + llvm/test/MC/AArch64/SVE2/sri-diagnostics.s | 60 + llvm/test/MC/AArch64/SVE2/sri.s | 56 + llvm/test/MC/AArch64/SVE2/srshl-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/srshl.s | 59 + llvm/test/MC/AArch64/SVE2/srshlr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/srshlr.s | 59 + llvm/test/MC/AArch64/SVE2/srshr-diagnostics.s | 78 ++ llvm/test/MC/AArch64/SVE2/srshr.s | 84 ++ llvm/test/MC/AArch64/SVE2/srsra-diagnostics.s | 60 + llvm/test/MC/AArch64/SVE2/srsra.s | 72 ++ llvm/test/MC/AArch64/SVE2/ssra-diagnostics.s | 60 + llvm/test/MC/AArch64/SVE2/ssra.s | 72 ++ llvm/test/MC/AArch64/SVE2/ssublb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/ssublb.s | 27 + llvm/test/MC/AArch64/SVE2/ssublt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/ssublt.s | 27 + llvm/test/MC/AArch64/SVE2/ssubwb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/ssubwb.s | 27 + llvm/test/MC/AArch64/SVE2/ssubwt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/ssubwt.s | 27 + llvm/test/MC/AArch64/SVE2/subhnb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/subhnb.s | 27 + llvm/test/MC/AArch64/SVE2/subhnt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/subhnt.s | 27 + llvm/test/MC/AArch64/SVE2/suqadd-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/suqadd.s | 59 + llvm/test/MC/AArch64/SVE2/uaba-diagnostics.s | 20 + llvm/test/MC/AArch64/SVE2/uaba.s | 48 + llvm/test/MC/AArch64/SVE2/uabalb-diagnostics.s | 34 + llvm/test/MC/AArch64/SVE2/uabalb.s | 43 + llvm/test/MC/AArch64/SVE2/uabalt-diagnostics.s | 34 + llvm/test/MC/AArch64/SVE2/uabalt.s | 43 + llvm/test/MC/AArch64/SVE2/uabdlb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uabdlb.s | 27 + llvm/test/MC/AArch64/SVE2/uabdlt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uabdlt.s | 27 + llvm/test/MC/AArch64/SVE2/uaddlb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uaddlb.s | 27 + llvm/test/MC/AArch64/SVE2/uaddlt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uaddlt.s | 27 + llvm/test/MC/AArch64/SVE2/uaddwb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uaddwb.s | 27 + llvm/test/MC/AArch64/SVE2/uaddwt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uaddwt.s | 27 + llvm/test/MC/AArch64/SVE2/uqadd-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uqadd.s | 59 + llvm/test/MC/AArch64/SVE2/uqrshl-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uqrshl.s | 59 + llvm/test/MC/AArch64/SVE2/uqrshlr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uqrshlr.s | 59 + llvm/test/MC/AArch64/SVE2/uqrshrnb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/uqrshrnb.s | 44 + llvm/test/MC/AArch64/SVE2/uqrshrnt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/uqrshrnt.s | 44 + llvm/test/MC/AArch64/SVE2/uqshl-diagnostics.s | 98 ++ llvm/test/MC/AArch64/SVE2/uqshl.s | 131 +++ llvm/test/MC/AArch64/SVE2/uqshlr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uqshlr.s | 59 + llvm/test/MC/AArch64/SVE2/uqshrnb-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/uqshrnb.s | 44 + llvm/test/MC/AArch64/SVE2/uqshrnt-diagnostics.s | 65 ++ llvm/test/MC/AArch64/SVE2/uqshrnt.s | 44 + llvm/test/MC/AArch64/SVE2/uqsub-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uqsub.s | 59 + llvm/test/MC/AArch64/SVE2/uqsubr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/uqsubr.s | 59 + llvm/test/MC/AArch64/SVE2/uqxtnb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uqxtnb.s | 27 + llvm/test/MC/AArch64/SVE2/uqxtnt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/uqxtnt.s | 27 + llvm/test/MC/AArch64/SVE2/urshl-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/urshl.s | 59 + llvm/test/MC/AArch64/SVE2/urshlr-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/urshlr.s | 59 + llvm/test/MC/AArch64/SVE2/urshr-diagnostics.s | 78 ++ llvm/test/MC/AArch64/SVE2/urshr.s | 84 ++ llvm/test/MC/AArch64/SVE2/ursra-diagnostics.s | 60 + llvm/test/MC/AArch64/SVE2/ursra.s | 72 ++ llvm/test/MC/AArch64/SVE2/usqadd-diagnostics.s | 37 + llvm/test/MC/AArch64/SVE2/usqadd.s | 59 + llvm/test/MC/AArch64/SVE2/usra-diagnostics.s | 60 + llvm/test/MC/AArch64/SVE2/usra.s | 72 ++ llvm/test/MC/AArch64/SVE2/usublb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/usublb.s | 27 + llvm/test/MC/AArch64/SVE2/usublt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/usublt.s | 27 + llvm/test/MC/AArch64/SVE2/usubwb-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/usubwb.s | 27 + llvm/test/MC/AArch64/SVE2/usubwt-diagnostics.s | 40 + llvm/test/MC/AArch64/SVE2/usubwt.s | 27 + llvm/test/Other/new-pm-defaults.ll | 1 - llvm/test/Other/new-pm-thinlto-defaults.ll | 1 - .../DeadStoreElimination/PartialStore2.ll | 55 + .../Transforms/GlobalOpt/globalsra-multigep.ll | 11 +- llvm/test/Transforms/GlobalOpt/globalsra-struct.ll | 18 - .../Inline/AMDGPU/amdgpu-inline-alloca-argument.ll | 70 ++ llvm/test/Transforms/InstCombine/vec_insertelt.ll | 8 - llvm/test/Transforms/InstCombine/vec_shuffle.ll | 17 + llvm/test/Transforms/InstSimplify/insertelement.ll | 48 +- .../Transforms/LoopVectorize/minmax_reduction.ll | 26 +- .../StructurizeCFG/AMDGPU/uniform-regions.ll | 108 +- llvm/test/tools/llvm-nm/X86/unique.test | 50 + .../ELF/only-section-strip-undefined.test | 60 + .../X86/elf-disassemble-symbol-labels-rel.test | 1 + .../X86/source-interleave-missing-source.test | 2 +- .../X86/source-interleave-no-debug-info.test | 2 +- .../X86/source-interleave-relative-paths.test | 16 +- llvm/test/tools/llvm-readobj/dynamic.test | 59 + .../tools/llvm-readobj/elf-dynamic-malformed.test | 19 +- .../elf-dynamic-not-in-pt-dynamic.test | 24 +- .../tools/llvm-readobj/elf-dynamic-table-dtnull.s | 35 +- .../elf-dynamic-tags-machine-specific.test | 127 ++- llvm/test/tools/llvm-readobj/elf-dynamic-tags.test | 125 ++- .../elf-non-dynamic-in-pt-dynamic.test | 22 +- llvm/test/tools/llvm-readobj/elf-versioninfo.test | 6 +- llvm/test/tools/llvm-readobj/mips-got.test | 10 +- llvm/tools/bugpoint/CMakeLists.txt | 5 +- llvm/tools/dsymutil/CMakeLists.txt | 5 +- llvm/tools/llc/CMakeLists.txt | 5 +- llvm/tools/llvm-ar/CMakeLists.txt | 4 +- llvm/tools/llvm-c-test/CMakeLists.txt | 6 +- llvm/tools/llvm-cxxdump/CMakeLists.txt | 2 +- llvm/tools/llvm-dwp/CMakeLists.txt | 5 +- llvm/tools/llvm-lto/CMakeLists.txt | 5 +- llvm/tools/llvm-lto2/CMakeLists.txt | 5 +- llvm/tools/llvm-mca/llvm-mca.cpp | 13 +- llvm/tools/llvm-nm/llvm-nm.cpp | 12 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 8 +- llvm/tools/llvm-objcopy/ELF/Object.cpp | 14 + llvm/tools/llvm-readobj/ELFDumper.cpp | 131 ++- llvm/tools/llvm-rtdyld/CMakeLists.txt | 4 +- llvm/tools/llvm-xray/CMakeLists.txt | 1 - llvm/tools/lto/CMakeLists.txt | 6 +- llvm/tools/opt/CMakeLists.txt | 5 +- llvm/utils/UpdateTestChecks/asm.py | 10 +- llvm/utils/git-svn/git-llvm | 62 +- .../clang-tools-extra/clang-tidy/utils/BUILD.gn | 1 + .../unittests/clang-tidy/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn | 1 + .../libomptarget/deviceRTLs/nvptx/src/omp_data.cu | 3 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 2 +- openmp/libomptarget/deviceRTLs/nvptx/src/sync.cu | 4 +- 651 files changed, 20391 insertions(+), 5140 deletions(-) create mode 100644 clang-tools-extra/docs/clang-tidy/checks/cert-oop54-cpp.rst create mode 100644 clang-tools-extra/test/clang-tidy/bugprone-unhandled-self-assig [...] create mode 100644 clang-tools-extra/test/clang-tidy/cert-oop54-cpp.cpp create mode 100644 clang-tools-extra/test/clang-tidy/cppcoreguidelines-pro-type-me [...] create mode 100644 clang/test/Analysis/analyzer-checker-option-help.c create mode 100644 clang/test/CodeGen/loop-vectorize.c create mode 100644 clang/test/CodeGenOpenCL/arm-integer-dot-product.cl create mode 100644 clang/test/Frontend/absolute-paths-windows.test create mode 100644 clang/test/SemaOpenCL/arm-integer-dot-product.cl create mode 100644 libcxx/test/std/language.support/support.dynamic/destroying_del [...] create mode 100644 libcxx/test/std/language.support/support.dynamic/destroying_del [...] create mode 100644 lld/test/COFF/filealign.test create mode 100644 lld/test/wasm/emit-relocs.ll create mode 100644 lld/test/wasm/wrap.ll create mode 100644 lldb/lit/SymbolFile/Breakpad/Inputs/unwind-via-stack-cfi.syms create mode 100644 lldb/lit/SymbolFile/Breakpad/Inputs/unwind-via-stack-cfi.yaml create mode 100644 lldb/lit/SymbolFile/Breakpad/unwind-via-stack-cfi.test create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-missing-signature.test create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-signature-loop.s create mode 100644 lldb/lit/SymbolFile/DWARF/parallel-indexing-stress.s create mode 100644 llvm/include/llvm/CodeGen/SwiftErrorValueTracking.h create mode 100644 llvm/lib/CodeGen/SwiftErrorValueTracking.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir create mode 100644 llvm/test/CodeGen/PowerPC/remove-copy-crunsetcrbit.mir create mode 100644 llvm/test/CodeGen/WebAssembly/multivalue.ll create mode 100644 llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll create mode 100644 llvm/test/CodeGen/WebAssembly/tailcall.ll create mode 100644 llvm/test/CodeGen/X86/asm-reg-type-mismatch-avx512.ll create mode 100644 llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir create mode 100644 llvm/test/MC/AArch64/SVE2/adclb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/adclb.s create mode 100644 llvm/test/MC/AArch64/SVE2/adclt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/adclt.s create mode 100644 llvm/test/MC/AArch64/SVE2/addhnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/addhnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/addhnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/addhnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/cadd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/cadd.s create mode 100644 llvm/test/MC/AArch64/SVE2/match-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/match.s create mode 100644 llvm/test/MC/AArch64/SVE2/nmatch-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/nmatch.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullb-128-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullb-128.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullb.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullt-128-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullt-128.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/pmullt.s create mode 100644 llvm/test/MC/AArch64/SVE2/raddhnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/raddhnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/raddhnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/raddhnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/rshrnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/rshrnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/rshrnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/rshrnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/rsubhnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/rsubhnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/rsubhnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/rsubhnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/saba-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/saba.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabalb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabalb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabalt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabalt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabdlb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabdlb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabdlt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sabdlt.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddlb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddlb.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddlt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddlt.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddwb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddwb.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddwt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/saddwt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sbclb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sbclb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sbclt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sbclt.s create mode 100644 llvm/test/MC/AArch64/SVE2/shrnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/shrnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/shrnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/shrnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sli-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sli.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqadd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqadd.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqcadd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqcadd.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshl.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshlr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshlr.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrunb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrunb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrunt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqrshrunt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshl.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshlr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshlr.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshlu-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshlu.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrunb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrunb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrunt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqshrunt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqsub-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqsub.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqsubr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqsubr.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtunb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtunb.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtunt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sqxtunt.s create mode 100644 llvm/test/MC/AArch64/SVE2/sri-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/sri.s create mode 100644 llvm/test/MC/AArch64/SVE2/srshl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/srshl.s create mode 100644 llvm/test/MC/AArch64/SVE2/srshlr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/srshlr.s create mode 100644 llvm/test/MC/AArch64/SVE2/srshr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/srshr.s create mode 100644 llvm/test/MC/AArch64/SVE2/srsra-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/srsra.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssra-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssra.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssublb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssublb.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssublt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssublt.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssubwb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssubwb.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssubwt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ssubwt.s create mode 100644 llvm/test/MC/AArch64/SVE2/subhnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/subhnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/subhnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/subhnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/suqadd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/suqadd.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaba-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaba.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabalb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabalb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabalt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabalt.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabdlb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabdlb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabdlt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uabdlt.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddlb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddlb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddlt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddlt.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddwb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddwb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddwt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uaddwt.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqadd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqadd.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshl.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshlr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshlr.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshrnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshrnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshrnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqrshrnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshl.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshlr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshlr.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshrnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshrnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshrnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqshrnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqsub-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqsub.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqsubr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqsubr.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqxtnb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqxtnb.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqxtnt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/uqxtnt.s create mode 100644 llvm/test/MC/AArch64/SVE2/urshl-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/urshl.s create mode 100644 llvm/test/MC/AArch64/SVE2/urshlr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/urshlr.s create mode 100644 llvm/test/MC/AArch64/SVE2/urshr-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/urshr.s create mode 100644 llvm/test/MC/AArch64/SVE2/ursra-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/ursra.s create mode 100644 llvm/test/MC/AArch64/SVE2/usqadd-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/usqadd.s create mode 100644 llvm/test/MC/AArch64/SVE2/usra-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/usra.s create mode 100644 llvm/test/MC/AArch64/SVE2/usublb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/usublb.s create mode 100644 llvm/test/MC/AArch64/SVE2/usublt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/usublt.s create mode 100644 llvm/test/MC/AArch64/SVE2/usubwb-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/usubwb.s create mode 100644 llvm/test/MC/AArch64/SVE2/usubwt-diagnostics.s create mode 100644 llvm/test/MC/AArch64/SVE2/usubwt.s create mode 100644 llvm/test/Transforms/DeadStoreElimination/PartialStore2.ll delete mode 100644 llvm/test/Transforms/GlobalOpt/globalsra-struct.ll create mode 100644 llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-alloca-argument.ll delete mode 100644 llvm/test/Transforms/InstCombine/vec_insertelt.ll create mode 100644 llvm/test/tools/llvm-nm/X86/unique.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/only-section-strip-undefined.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (c23ac564 -> 4c1a1fc5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards c23ac564 0: update: llvm-linux: 16 new 4c1a1fc5 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c23ac564) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11858 +++++++++++++++++------------------ 03-build_linux/console.log | 802 +-- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 8 +- console.log | 12894 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 12900 insertions(+), 12896 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig updated (9124fda0adf -> 11c3a5c0f98)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 9124fda0adf Merging r355038: adds 1a19847514e Merging r351523: adds 11c3a5c0f98 Merging r360825: No new revisions were added by this update. Summary of changes: compiler-rt/cmake/base-config-ix.cmake | 4 ++-- llvm/lib/Target/AVR/AVRISelLowering.cpp | 28 ++++++++++++++--------- llvm/lib/Target/AVR/AVRISelLowering.h | 8 ++++++- llvm/lib/Target/AVR/AVRSubtarget.cpp | 12 ++++++++-- llvm/lib/Target/AVR/AVRSubtarget.h | 5 +++- llvm/test/CodeGen/AVR/{mul.ll => hardware-mul.ll} | 2 ++ llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/software-mul.ll | 28 +++++++++++++++++++++++ llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- 9 files changed, 72 insertions(+), 19 deletions(-) rename llvm/test/CodeGen/AVR/{mul.ll => hardware-mul.ll} (90%) create mode 100644 llvm/test/CodeGen/AVR/software-mul.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig updated (e51e01cd -> 4bc2ce6f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards e51e01cd 0: update: llvm-linux: all new 4bc2ce6f 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e51e01cd) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11642 +++++++++++++++++----------------- 03-build_linux/console.log | 824 ++- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 6 +- console.log | 12694 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 12698 insertions(+), 12698 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits May 2019