Tcwg-commits May 2019

tcwg-commits@lists.linaro.org

4 participants
17284 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig updated (b9205521f -> b56154bd6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards b9205521f 0: update: binutils-gcc-linux: all new b56154bd6 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b9205521f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 240 +- 03-build_abe-binutils/console.log | 11128 +++++++-------- 04-build_abe-stage1/console.log | 13814 ++++++++++--------- 05-build_linux/console.log | 960 +- 06-boot_linux/console.log | 2 +- 08-update_baseline/console.log | 8 +- console.log | 26174 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 9 files changed, 26230 insertions(+), 26238 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig updated (35efb51eee22 -> cd6c84d8f0cd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/linux. from 35efb51eee22 Merge tag 'ext4_for_linus_stable' of git://git.kernel.org/ [...] adds 58be0106c530 random: fix soft lockup when trying to read from an uninit [...] adds 128f2bfafcf2 Merge tag 'random_for_linus_stable' of git://git.kernel.or [...] adds b41fb528dd87 KVM: s390: fix typo in parameter description adds 6e9b622d1c36 KVM: s390: change default halt poll time to 50us adds 94830f188a80 Merge tag 'kvm-s390-master-5.2-1' of git://git.kernel.org/ [...] adds 493fcbc8435e MAINTAINERS: KVM: arm/arm64: Remove myself as maintainer adds b7c50fab66ab KVM: arm64: Move pmu hyp code under hyp's Makefile to avoi [...] adds 623e1528d409 KVM: arm/arm64: Move cc/it checks under hyp's Makefile to [...] adds 6bff2a3dc9ba Merge tag 'kvmarm-fixes-for-5.2' of git://git.kernel.org/p [...] adds db80927ea197 KVM: nVMX: really fix the size checks on KVM_SET_NESTED_STATE adds 21be4ca1ea68 KVM: nVMX: Clear nested_run_pending if setting nested state fails adds 2eb06c306a57 KVM: Fix spinlock taken warning during host resume adds be7fcf1d1701 KVM: selftests: Fix a condition in test_hv_cpuid() adds 3b339e2527a6 kvm: selftests: avoid type punning adds 319f6f97e3a1 KVM: selftests: Compile code with warnings enabled adds 32a243df82c8 kvm: x86: Include multiple indices with CPUID leaf 0x8000001d adds 382409b4c43e kvm: x86: Include CPUID leaf 0x8000001e in kvm's supported CPUID adds d30b214d1d0a kvm: fix compilation on s390 adds 541e886f7972 KVM: nVMX: Fix using __this_cpu_read() in preemptible context adds 4d259965655c kvm: vmx: Fix -Wmissing-prototypes warnings adds 0e6edceb8f18 KVM: LAPIC: Fix lapic_timer_advance_ns parameter overflow adds 16ba3ab4e15c KVM: LAPIC: Expose per-vCPU timer_advance_ns to userspace adds 12e9612cae0c KVM: selftests: Remove duplicated TEST_ASSERT in hyperv_cpuid.c adds 204c91eff798 KVM: selftests: do not blindly clobber registers in guest asm adds c9bcd3e3335d kvm: svm/avic: fix off-by-one in checking host APIC ID adds 654f1f13ea56 kvm: Check irqchip mode before assign irqfd adds 6f2f84532c15 KVM: x86: do not spam dmesg with VMCS/VMCB dumps adds a80c4ec10ed9 x86/kvm/pmu: Set AMD's virt PMU version to 1 adds 0e6f467ee28e KVM: x86/pmu: mask the result of rdpmc according to the wi [...] adds 2924b52117b2 KVM: x86/pmu: do not mask the value that is written to fixed PMUs adds 19ec166c3f39 KVM: s390: fix memory slot handling for KVM_SET_USER_MEMOR [...] adds bffed38d4fb5 kvm: selftests: aarch64: dirty_log_test: fix unaligned mem [...] adds 55eda003f02f kvm: selftests: aarch64: fix default vm mode adds 98e683443ba2 kvm: selftests: aarch64: compile with warnings on adds c795720629ae KVM: selftests: Wrap vcpu_nested_state_get/set functions w [...] adds 883d25e70b2f tools/kvm_stat: fix fields filter for child events adds 66f61c92889f KVM: x86: fix return value for reserved EFER adds 862f0a3227b3 Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt [...] adds 0c97bf863efc tracing: Silence GCC 9 array bounds warning adds c5b440951a19 Merge tag 'trace-v5.2-rc1-2' of git://git.kernel.org/pub/s [...] adds cd6c84d8f0cd Linux 5.2-rc2 No new revisions were added by this update. Summary of changes: MAINTAINERS | 2 - Makefile | 4 +- arch/arm/kvm/hyp/Makefile | 1 + arch/arm64/include/asm/kvm_host.h | 3 - arch/arm64/kvm/hyp/Makefile | 1 + arch/arm64/kvm/hyp/switch.c | 39 +++++++ arch/arm64/kvm/pmu.c | 38 ------- arch/s390/include/asm/kvm_host.h | 2 +- arch/s390/kvm/kvm-s390.c | 37 ++++--- arch/x86/kvm/cpuid.c | 8 +- arch/x86/kvm/debugfs.c | 18 +++ arch/x86/kvm/irq.c | 7 ++ arch/x86/kvm/irq.h | 1 + arch/x86/kvm/pmu.c | 10 +- arch/x86/kvm/pmu.h | 3 +- arch/x86/kvm/pmu_amd.c | 4 +- arch/x86/kvm/svm.c | 15 ++- arch/x86/kvm/vmx/nested.c | 35 +++--- arch/x86/kvm/vmx/pmu_intel.c | 26 +++-- arch/x86/kvm/vmx/vmx.c | 26 +++-- arch/x86/kvm/vmx/vmx.h | 1 + arch/x86/kvm/x86.c | 4 +- drivers/char/random.c | 16 ++- kernel/trace/trace.c | 6 +- kernel/trace/trace.h | 18 +++ kernel/trace/trace_kdb.c | 6 +- tools/kvm/kvm_stat/kvm_stat | 16 ++- tools/kvm/kvm_stat/kvm_stat.txt | 2 + tools/testing/selftests/kvm/Makefile | 4 +- tools/testing/selftests/kvm/dirty_log_test.c | 8 +- tools/testing/selftests/kvm/include/kvm_util.h | 2 + .../testing/selftests/kvm/lib/aarch64/processor.c | 11 +- tools/testing/selftests/kvm/lib/kvm_util.c | 5 +- tools/testing/selftests/kvm/lib/ucall.c | 2 +- tools/testing/selftests/kvm/lib/x86_64/processor.c | 4 +- .../selftests/kvm/x86_64/cr4_cpuid_sync_test.c | 1 + tools/testing/selftests/kvm/x86_64/evmcs_test.c | 7 +- tools/testing/selftests/kvm/x86_64/hyperv_cpuid.c | 9 +- .../selftests/kvm/x86_64/platform_info_test.c | 1 - tools/testing/selftests/kvm/x86_64/smm_test.c | 3 +- tools/testing/selftests/kvm/x86_64/state_test.c | 7 +- .../testing/selftests/kvm/x86_64/sync_regs_test.c | 54 +++++---- .../kvm/x86_64/vmx_close_while_nested_test.c | 5 +- .../kvm/x86_64/vmx_set_nested_state_test.c | 2 +- .../selftests/kvm/x86_64/vmx_tsc_adjust_test.c | 5 +- virt/kvm/arm/aarch32.c | 121 --------------------- virt/kvm/arm/{ => hyp}/aarch32.c | 107 +----------------- virt/kvm/eventfd.c | 9 ++ virt/kvm/kvm_main.c | 7 +- 49 files changed, 300 insertions(+), 423 deletions(-) copy virt/kvm/arm/{ => hyp}/aarch32.c (54%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig updated (9d03e9723 -> 015c825a4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allyesconfig in repository toolchain/ci/base-artifacts. discards 9d03e9723 2: update: llvm-linux: 17751 new 015c825a4 2: update: llvm-linux: 17751 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9d03e9723) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11634 +++++++++++++++---------------- 03-build_linux/console.log | 2036 +++--- 05-check_regression/console.log | 6 +- 06-update_baseline/console.log | 20 +- console.log | 13916 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13920 insertions(+), 13920 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (2db79ef32c6 -> cfe08bc7d68)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project. from 2db79ef32c6 [Driver] Update handling of c++ and runtime directories adds f29120658b2 [Driver][RISCV] Simplify. NFC adds 603ca511f91 [PowerPC] Add missing R_PPC_* relocation types adds 1c1e2ca0221 [ARM] Add some base fullfp16 tests. NFC adds caf8a11b656 [ARM] Promote fp16 frem adds aeade651f35 [ARM] Select fp16 fsqrt adds 2881325b17a [ARM] Select fp16 fabs adds 58a8541dcc3 [X86][AVX] combineBitcastvxi1 - peek through bitops to dete [...] adds c9f4b7d201c [ARM] Promote various fp16 math intrinsics adds 21542cd6f4c [ARM] Select a number of fp16 rounding functions adds 0dbafe191e5 [ARM] Select fp16 fma adds 352f5987952 [InstCombine] Remove OverflowCheckFlavor; NFC adds 39f2bebf415 [InstCombine] Refactor OptimizeOverflowCheck; NFCI adds 7228b50802c gn build: Merge r361664 adds d0f13e618fa [ValueTracking] Base computeOverflowForUnsignedMul() on Con [...] adds b7cc093db28 [Support] make countLeadingZeros() and countTrailingZeros() [...] adds 50c73a044f2 [SimplifyCFG] NFC, update Switch tests to HEAD so I can see [...] adds 444eaaf1cce [SimpligyCFG] NFC, remove GCD that was only used for powers of two adds 30111c786f7 [SimplifyCFG] Run ReduceSwitchRange unconditionally, generalize adds fa91ab85d9f [SimplifyCFG] ReduceSwitchRange: Improve on the case where [...] adds 9317963920a [InstCombine] prevent crashing with invalid extractelement index adds 927fe7328df [SimplifyCFG] NFC, fix failing tests from last patches. adds aabe7781a50 [LLParser] Fix uninitialized variable warnings. NFCI. adds e434368a67c Revert rL361731 : [LLParser] Fix uninitialized variable war [...] adds 7b883b7ed05 [SimplifyCFG] NFC, one more fixed test from previous push. adds a044410f37e [X86][SSE] Add shuffle combining support for ISD::ANY_EXTEN [...] adds bd324fa2273 DeleteNullPointerCheck now deletes until the end brace of t [...] adds 343578759e2 [SimplifyCFG] back out all SwitchInst commits adds a549dd25607 [MCA] Refactor the logic that computes the critical memory [...] adds 2916b9e28ca [SelectionDAG] MaskedValueIsZero - add demanded elements im [...] adds 06e02856ab5 [SelectionDAG] GetDemandedBits - cleanup to more closely ma [...] adds c2493ce4a40 [MCA][Scheduler] Improved critical memory dependency computation. adds ba447bae744 [AMDGPU] Divergence driven ISel. Assign register class [...] adds e698958ad80 [BPF] generate R_BPF_NONE relocation for BTF DataSec variables adds 11b2f4fe50d [LoopInterchange] Fix handling of LCSSA nodes defined in he [...] adds cfe08bc7d68 llvm-undname: Make demangling of MD5 names more robust No new revisions were added by this update. Summary of changes: .../readability/DeleteNullPointerCheck.cpp | 9 +- .../clang-tidy/readability-delete-null-pointer.cpp | 9 + clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 44 +- .../llvm/BinaryFormat/ELFRelocs/PowerPC.def | 32 ++ llvm/include/llvm/CodeGen/FunctionLoweringInfo.h | 11 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 11 +- llvm/include/llvm/CodeGen/TargetLowering.h | 11 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 5 + llvm/include/llvm/MCA/Instruction.h | 52 +- llvm/lib/Analysis/ValueTracking.cpp | 102 ++-- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 6 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 54 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- llvm/lib/Demangle/MicrosoftDemangle.cpp | 28 +- llvm/lib/MCA/HardwareUnits/Scheduler.cpp | 94 +++- llvm/lib/MCA/Instruction.cpp | 24 +- llvm/lib/MCA/Stages/DispatchStage.cpp | 3 - llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 166 +++--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 91 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 22 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 19 +- .../Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 32 +- .../Target/X86/MCTargetDesc/X86InstComments.cpp | 18 +- llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp | 5 +- llvm/lib/Target/X86/Utils/X86ShuffleDecode.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 31 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 11 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 151 +++-- .../Transforms/InstCombine/InstCombineInternal.h | 43 +- .../InstCombine/InstCombineVectorOps.cpp | 5 +- llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 86 ++- llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 3 +- llvm/test/CodeGen/AMDGPU/branch-uniformity.ll | 4 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 7 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 55 +- .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 6 +- llvm/test/CodeGen/AMDGPU/fabs.ll | 12 +- llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll | 58 +- llvm/test/CodeGen/AMDGPU/fmin_legacy.ll | 8 +- llvm/test/CodeGen/AMDGPU/fneg-fabs.ll | 16 +- llvm/test/CodeGen/AMDGPU/fsub.ll | 12 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 10 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 1 - llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 2 + .../CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 8 +- llvm/test/CodeGen/AMDGPU/madak.ll | 12 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 5 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 5 +- llvm/test/CodeGen/AMDGPU/select-opt.ll | 4 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 3 +- llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 1 - .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 53 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 5 +- .../test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 9 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 6 +- .../vgpr-spill-emergency-stack-slot-compute.ll | 1 + llvm/test/CodeGen/ARM/fp16-fullfp16.ll | 606 +++++++++++++++++++++ llvm/test/CodeGen/ARM/fp16-instructions.ll | 13 - llvm/test/CodeGen/BPF/reloc-btf-2.ll | 60 ++ llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll | 28 +- llvm/test/CodeGen/X86/shrink_vmul.ll | 52 +- llvm/test/Demangle/ms-md5.test | 16 +- llvm/test/Transforms/InstCombine/extractelement.ll | 19 + .../Transforms/LoopInterchange/perserve-lcssa.ll | 181 ++++++ .../tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s | 2 +- .../clang/lib/StaticAnalyzer/Checkers/BUILD.gn | 1 + 81 files changed, 1847 insertions(+), 729 deletions(-) create mode 100644 llvm/test/CodeGen/ARM/fp16-fullfp16.ll create mode 100644 llvm/test/CodeGen/BPF/reloc-btf-2.ll create mode 100644 llvm/test/Transforms/LoopInterchange/perserve-lcssa.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (650544e15 -> 867184ee0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 650544e15 0: update: llvm-linux: all new 867184ee0 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (650544e15) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 70 +- 02-build_llvm/console.log | 11810 +++++++++++++++--------------- 03-build_linux/console.log | 2848 ++++---- 04-boot_linux/console.log | 3 - 05-check_regression/console.log | 6 +- console.log | 14737 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 14738 insertions(+), 14744 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (d4a9cae9650 -> cfe08bc7d68)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/llvm-project. from d4a9cae9650 Add missing newline at end of file adds 2db79ef32c6 [Driver] Update handling of c++ and runtime directories adds f29120658b2 [Driver][RISCV] Simplify. NFC adds 603ca511f91 [PowerPC] Add missing R_PPC_* relocation types adds 1c1e2ca0221 [ARM] Add some base fullfp16 tests. NFC adds caf8a11b656 [ARM] Promote fp16 frem adds aeade651f35 [ARM] Select fp16 fsqrt adds 2881325b17a [ARM] Select fp16 fabs adds 58a8541dcc3 [X86][AVX] combineBitcastvxi1 - peek through bitops to dete [...] adds c9f4b7d201c [ARM] Promote various fp16 math intrinsics adds 21542cd6f4c [ARM] Select a number of fp16 rounding functions adds 0dbafe191e5 [ARM] Select fp16 fma adds 352f5987952 [InstCombine] Remove OverflowCheckFlavor; NFC adds 39f2bebf415 [InstCombine] Refactor OptimizeOverflowCheck; NFCI adds 7228b50802c gn build: Merge r361664 adds d0f13e618fa [ValueTracking] Base computeOverflowForUnsignedMul() on Con [...] adds b7cc093db28 [Support] make countLeadingZeros() and countTrailingZeros() [...] adds 50c73a044f2 [SimplifyCFG] NFC, update Switch tests to HEAD so I can see [...] adds 444eaaf1cce [SimpligyCFG] NFC, remove GCD that was only used for powers of two adds 30111c786f7 [SimplifyCFG] Run ReduceSwitchRange unconditionally, generalize adds fa91ab85d9f [SimplifyCFG] ReduceSwitchRange: Improve on the case where [...] adds 9317963920a [InstCombine] prevent crashing with invalid extractelement index adds 927fe7328df [SimplifyCFG] NFC, fix failing tests from last patches. adds aabe7781a50 [LLParser] Fix uninitialized variable warnings. NFCI. adds e434368a67c Revert rL361731 : [LLParser] Fix uninitialized variable war [...] adds 7b883b7ed05 [SimplifyCFG] NFC, one more fixed test from previous push. adds a044410f37e [X86][SSE] Add shuffle combining support for ISD::ANY_EXTEN [...] adds bd324fa2273 DeleteNullPointerCheck now deletes until the end brace of t [...] adds 343578759e2 [SimplifyCFG] back out all SwitchInst commits adds a549dd25607 [MCA] Refactor the logic that computes the critical memory [...] adds 2916b9e28ca [SelectionDAG] MaskedValueIsZero - add demanded elements im [...] adds 06e02856ab5 [SelectionDAG] GetDemandedBits - cleanup to more closely ma [...] adds c2493ce4a40 [MCA][Scheduler] Improved critical memory dependency computation. adds ba447bae744 [AMDGPU] Divergence driven ISel. Assign register class [...] adds e698958ad80 [BPF] generate R_BPF_NONE relocation for BTF DataSec variables adds 11b2f4fe50d [LoopInterchange] Fix handling of LCSSA nodes defined in he [...] adds cfe08bc7d68 llvm-undname: Make demangling of MD5 names more robust No new revisions were added by this update. Summary of changes: .../readability/DeleteNullPointerCheck.cpp | 9 +- .../clang-tidy/readability-delete-null-pointer.cpp | 9 + clang/include/clang/Driver/ToolChain.h | 6 + clang/lib/Driver/ToolChain.cpp | 65 ++- clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 44 +- clang/lib/Driver/ToolChains/Fuchsia.cpp | 33 +- .../local/cuda => basic_fuchsia_tree}/bin/.keep | 0 .../lib/aarch64-fuchsia/c++/asan/libc++.so | 0 .../lib/aarch64-fuchsia/c++/libc++.so | 0 .../lib/aarch64-fuchsia/c++/noexcept/libc++.so | 0 .../lib/x86_64-fuchsia/c++/asan/libc++.so | 0 .../lib/x86_64-fuchsia/c++/libc++.so | 0 .../lib/x86_64-fuchsia/c++/noexcept/libc++.so | 0 .../aarch64-fuchsia/lib/asan/.keep | 0 .../aarch64-fuchsia/lib/noexcept/.keep | 0 .../x86_64-fuchsia/lib/asan/.keep | 0 .../x86_64-fuchsia/lib/noexcept/.keep | 0 clang/test/Driver/fuchsia.c | 4 - clang/test/Driver/fuchsia.cpp | 21 +- clang/test/Driver/linux-per-target-runtime-dir.c | 1 - .../llvm/BinaryFormat/ELFRelocs/PowerPC.def | 32 ++ llvm/include/llvm/CodeGen/FunctionLoweringInfo.h | 11 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 11 +- llvm/include/llvm/CodeGen/TargetLowering.h | 11 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 5 + llvm/include/llvm/MCA/Instruction.h | 52 +- llvm/lib/Analysis/ValueTracking.cpp | 102 ++-- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 6 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 54 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- llvm/lib/Demangle/MicrosoftDemangle.cpp | 28 +- llvm/lib/MCA/HardwareUnits/Scheduler.cpp | 94 +++- llvm/lib/MCA/Instruction.cpp | 24 +- llvm/lib/MCA/Stages/DispatchStage.cpp | 3 - llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 166 +++--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 91 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 22 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 19 +- .../Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 32 +- .../Target/X86/MCTargetDesc/X86InstComments.cpp | 18 +- llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp | 5 +- llvm/lib/Target/X86/Utils/X86ShuffleDecode.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 31 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 11 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 151 +++-- .../Transforms/InstCombine/InstCombineInternal.h | 43 +- .../InstCombine/InstCombineVectorOps.cpp | 5 +- llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 86 ++- llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 3 +- llvm/test/CodeGen/AMDGPU/branch-uniformity.ll | 4 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 7 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 55 +- .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 6 +- llvm/test/CodeGen/AMDGPU/fabs.ll | 12 +- llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll | 58 +- llvm/test/CodeGen/AMDGPU/fmin_legacy.ll | 8 +- llvm/test/CodeGen/AMDGPU/fneg-fabs.ll | 16 +- llvm/test/CodeGen/AMDGPU/fsub.ll | 12 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 10 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 1 - llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 2 + .../CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 8 +- llvm/test/CodeGen/AMDGPU/madak.ll | 12 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 5 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 5 +- llvm/test/CodeGen/AMDGPU/select-opt.ll | 4 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 3 +- llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 1 - .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 53 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 5 +- .../test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 9 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 6 +- .../vgpr-spill-emergency-stack-slot-compute.ll | 1 + llvm/test/CodeGen/ARM/fp16-fullfp16.ll | 606 +++++++++++++++++++++ llvm/test/CodeGen/ARM/fp16-instructions.ll | 13 - llvm/test/CodeGen/BPF/reloc-btf-2.ll | 60 ++ llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll | 28 +- llvm/test/CodeGen/X86/shrink_vmul.ll | 52 +- llvm/test/Demangle/ms-md5.test | 16 +- llvm/test/Transforms/InstCombine/extractelement.ll | 19 + .../Transforms/LoopInterchange/perserve-lcssa.ll | 181 ++++++ .../tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s | 2 +- .../clang/lib/StaticAnalyzer/Checkers/BUILD.gn | 1 + 98 files changed, 1921 insertions(+), 785 deletions(-) copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda => basic_fuchsia_tree}/b [...] copy clang-tools-extra/clangd/unittests/TestScheme.h => clang/test/Driver/Inputs/b [...] copy clang-tools-extra/clangd/unittests/TestScheme.h => clang/test/Driver/Inputs/b [...] copy clang-tools-extra/clangd/unittests/TestScheme.h => clang/test/Driver/Inputs/b [...] copy clang-tools-extra/clangd/unittests/TestScheme.h => clang/test/Driver/Inputs/b [...] copy clang-tools-extra/clangd/unittests/TestScheme.h => clang/test/Driver/Inputs/b [...] copy clang-tools-extra/clangd/unittests/TestScheme.h => clang/test/Driver/Inputs/b [...] delete mode 100644 clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/aa [...] delete mode 100644 clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/aa [...] delete mode 100644 clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/x8 [...] delete mode 100644 clang/test/Driver/Inputs/resource_dir_with_per_target_subdir/x8 [...] create mode 100644 llvm/test/CodeGen/ARM/fp16-fullfp16.ll create mode 100644 llvm/test/CodeGen/BPF/reloc-btf-2.ll create mode 100644 llvm/test/Transforms/LoopInterchange/perserve-lcssa.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (891840c0cdb -> fa1e16cfd3a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/gcc. from 891840c0cdb Daily bump. adds b4103d4b914 Remove Solaris 10-only note about -mvect8-ret-in-mem adds ec26a196c79 Added ChangeLog entry for last commit. adds 8dc5b8c7bd2 2019-05-26 Thomas Koenig <tkoenig(a)gcc.gnu.org> adds 42e1d959702 * config/pa/linux-unwind.h (pa32_fallback_frame_state): Add cast. adds 497b3a05b68 * doc/invoke.texi (Link Options): Many editorial changes a [...] adds e00bc0e4d4f darwin, x86, testsuite - Amend three PIE tests, adds ba475497835 * doc/xml/manual/appendix_contributing.xml: Update pointer [...] adds c07e90cdc2d * config/i386/i386.md (@leave_<mode>): New expander. (*le [...] adds e3c34695023 PR go/90614 syscall: avoid unused parameter error if W [...] adds 1367cb4637c PR go/90635 libgo: correct typo in USE_LIBFFI AM_CONDITIONAL adds fa1e16cfd3a Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 91 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/i386-expand.c | 6 +- gcc/config/i386/i386-options.c | 33 -------- gcc/config/i386/i386-options.h | 10 --- gcc/config/i386/i386.c | 62 ++++++--------- gcc/config/i386/i386.md | 69 +++++++--------- gcc/config/i386/sse.md | 2 +- gcc/config/i386/x86-tune-sched.c | 6 +- gcc/doc/invoke.texi | 68 ++++++++-------- gcc/fortran/ChangeLog | 6 ++ gcc/fortran/trans-types.c | 4 + gcc/go/gofrontend/MERGE | 2 +- gcc/testsuite/ChangeLog | 7 ++ gcc/testsuite/gcc.target/i386/pr39013-1.c | 8 +- gcc/testsuite/gcc.target/i386/pr39013-2.c | 8 +- gcc/testsuite/gcc.target/i386/pr64317.c | 11 ++- libgcc/ChangeLog | 4 + libgcc/config/pa/linux-unwind.h | 2 +- libgo/configure | 2 +- libgo/configure.ac | 2 +- libgo/go/syscall/wait.c | 2 +- libstdc++-v3/ChangeLog | 5 ++ .../doc/xml/manual/appendix_contributing.xml | 2 +- 24 files changed, 238 insertions(+), 176 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (5b6d4fc74b -> d5b7ce35a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/binutils-gdb. from 5b6d4fc74b Automatic date update in version.in adds d5b7ce35a1 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (634d6b130 -> 2d7a96f30)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 634d6b130 0: update: binutils-gcc-glibc-llvm: 0 new 2d7a96f30 0: update: binutils-gcc-glibc-llvm: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (634d6b130) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-master-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 294 +- 02-prepare_abe/console.log | 441 +- 03-build_abe-binutils/console.log | 11023 +-- 04-build_abe-stage1/console.log | 20162 +++--- 05-build_abe-linux/console.log | 284 +- 06-build_abe-glibc/console.log | 39621 ++++++----- 07-build_abe-stage2/console.log | 46734 ++++++------- 08-build_llvm-true/console.log | 11832 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 9 +- 09-benchmark/console.log | 486 +- 10-check_regression/console.log | 80 +- 11-update_baseline/console.log | 96 +- console.log | 131073 +++++++++++++++++------------------ jenkins/manifest.sh | 18 +- results_id | 2 +- 16 files changed, 131021 insertions(+), 131136 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (2db79ef32c6 -> cfe08bc7d68)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project. from 2db79ef32c6 [Driver] Update handling of c++ and runtime directories adds f29120658b2 [Driver][RISCV] Simplify. NFC adds 603ca511f91 [PowerPC] Add missing R_PPC_* relocation types adds 1c1e2ca0221 [ARM] Add some base fullfp16 tests. NFC adds caf8a11b656 [ARM] Promote fp16 frem adds aeade651f35 [ARM] Select fp16 fsqrt adds 2881325b17a [ARM] Select fp16 fabs adds 58a8541dcc3 [X86][AVX] combineBitcastvxi1 - peek through bitops to dete [...] adds c9f4b7d201c [ARM] Promote various fp16 math intrinsics adds 21542cd6f4c [ARM] Select a number of fp16 rounding functions adds 0dbafe191e5 [ARM] Select fp16 fma adds 352f5987952 [InstCombine] Remove OverflowCheckFlavor; NFC adds 39f2bebf415 [InstCombine] Refactor OptimizeOverflowCheck; NFCI adds 7228b50802c gn build: Merge r361664 adds d0f13e618fa [ValueTracking] Base computeOverflowForUnsignedMul() on Con [...] adds b7cc093db28 [Support] make countLeadingZeros() and countTrailingZeros() [...] adds 50c73a044f2 [SimplifyCFG] NFC, update Switch tests to HEAD so I can see [...] adds 444eaaf1cce [SimpligyCFG] NFC, remove GCD that was only used for powers of two adds 30111c786f7 [SimplifyCFG] Run ReduceSwitchRange unconditionally, generalize adds fa91ab85d9f [SimplifyCFG] ReduceSwitchRange: Improve on the case where [...] adds 9317963920a [InstCombine] prevent crashing with invalid extractelement index adds 927fe7328df [SimplifyCFG] NFC, fix failing tests from last patches. adds aabe7781a50 [LLParser] Fix uninitialized variable warnings. NFCI. adds e434368a67c Revert rL361731 : [LLParser] Fix uninitialized variable war [...] adds 7b883b7ed05 [SimplifyCFG] NFC, one more fixed test from previous push. adds a044410f37e [X86][SSE] Add shuffle combining support for ISD::ANY_EXTEN [...] adds bd324fa2273 DeleteNullPointerCheck now deletes until the end brace of t [...] adds 343578759e2 [SimplifyCFG] back out all SwitchInst commits adds a549dd25607 [MCA] Refactor the logic that computes the critical memory [...] adds 2916b9e28ca [SelectionDAG] MaskedValueIsZero - add demanded elements im [...] adds 06e02856ab5 [SelectionDAG] GetDemandedBits - cleanup to more closely ma [...] adds c2493ce4a40 [MCA][Scheduler] Improved critical memory dependency computation. adds ba447bae744 [AMDGPU] Divergence driven ISel. Assign register class [...] adds e698958ad80 [BPF] generate R_BPF_NONE relocation for BTF DataSec variables adds 11b2f4fe50d [LoopInterchange] Fix handling of LCSSA nodes defined in he [...] adds cfe08bc7d68 llvm-undname: Make demangling of MD5 names more robust No new revisions were added by this update. Summary of changes: .../readability/DeleteNullPointerCheck.cpp | 9 +- .../clang-tidy/readability-delete-null-pointer.cpp | 9 + clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 44 +- .../llvm/BinaryFormat/ELFRelocs/PowerPC.def | 32 ++ llvm/include/llvm/CodeGen/FunctionLoweringInfo.h | 11 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 11 +- llvm/include/llvm/CodeGen/TargetLowering.h | 11 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 5 + llvm/include/llvm/MCA/Instruction.h | 52 +- llvm/lib/Analysis/ValueTracking.cpp | 102 ++-- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 6 +- .../CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 14 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 54 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 +- llvm/lib/Demangle/MicrosoftDemangle.cpp | 28 +- llvm/lib/MCA/HardwareUnits/Scheduler.cpp | 94 +++- llvm/lib/MCA/Instruction.cpp | 24 +- llvm/lib/MCA/Stages/DispatchStage.cpp | 3 - llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 166 +++--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 91 +++- llvm/lib/Target/AMDGPU/SIISelLowering.h | 5 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 5 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 22 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 19 +- .../Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 32 +- .../Target/X86/MCTargetDesc/X86InstComments.cpp | 18 +- llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp | 5 +- llvm/lib/Target/X86/Utils/X86ShuffleDecode.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 31 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 11 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 151 +++-- .../Transforms/InstCombine/InstCombineInternal.h | 43 +- .../InstCombine/InstCombineVectorOps.cpp | 5 +- llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 86 ++- llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 3 +- llvm/test/CodeGen/AMDGPU/branch-uniformity.ll | 4 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 7 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 55 +- .../CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll | 6 +- llvm/test/CodeGen/AMDGPU/fabs.ll | 12 +- llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll | 58 +- llvm/test/CodeGen/AMDGPU/fmin_legacy.ll | 8 +- llvm/test/CodeGen/AMDGPU/fneg-fabs.ll | 16 +- llvm/test/CodeGen/AMDGPU/fsub.ll | 12 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 10 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 1 - llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 2 + .../CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll | 2 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 8 +- llvm/test/CodeGen/AMDGPU/madak.ll | 12 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 5 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 5 +- llvm/test/CodeGen/AMDGPU/select-opt.ll | 4 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 3 +- llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 2 +- llvm/test/CodeGen/AMDGPU/smrd.ll | 1 - .../CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 53 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 5 +- .../test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 9 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 6 +- .../vgpr-spill-emergency-stack-slot-compute.ll | 1 + llvm/test/CodeGen/ARM/fp16-fullfp16.ll | 606 +++++++++++++++++++++ llvm/test/CodeGen/ARM/fp16-instructions.ll | 13 - llvm/test/CodeGen/BPF/reloc-btf-2.ll | 60 ++ llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll | 28 +- llvm/test/CodeGen/X86/shrink_vmul.ll | 52 +- llvm/test/Demangle/ms-md5.test | 16 +- llvm/test/Transforms/InstCombine/extractelement.ll | 19 + .../Transforms/LoopInterchange/perserve-lcssa.ll | 181 ++++++ .../tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s | 2 +- .../clang/lib/StaticAnalyzer/Checkers/BUILD.gn | 1 + 81 files changed, 1847 insertions(+), 729 deletions(-) create mode 100644 llvm/test/CodeGen/ARM/fp16-fullfp16.ll create mode 100644 llvm/test/CodeGen/BPF/reloc-btf-2.ll create mode 100644 llvm/test/Transforms/LoopInterchange/perserve-lcssa.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits May 2019