Tcwg-commits April 2019

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig updated (8669f96f0d -> 02e902e1a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig in repository toolchain/ci/binutils-gdb. from 8669f96f0d Automatic date update in version.in adds 031254f211 [binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI adds e0991585ad [GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M Mainline adds e12437dc86 [binutils, ARM, 3/16] BF insns infrastructure with new bfd_r [...] adds e2b0ab5978 [binutils, ARM, 4/16] BF insns infrastructure with array of [...] adds e5d6e09ee6 [binutils, ARM, 5/16] BF insns infrastructure with new globa [...] adds 4389b29a5a [binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline adds f1c7f42126 [binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8 [...] adds 1caf72a584 [binutils, ARM, 8/16] BFL infrastructure with new global rel [...] adds 65d1bc05e8 [binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline adds 1889da7048 [binutils, ARM, 10/16] BFCSEL infrastructure with new global [...] adds f6b2b12db8 [binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M [...] adds 60f993ce17 [binutils, ARM, 12/16] Scalar Low Overhead loop instructions [...] adds 4b5a202f10 [binutils, ARM, 13/16] Add support for CLRM adds 6b0dd09474 [opcodes, ARM, 14/16] Add mode availability to coprocessor t [...] adds efd6b3591b [binutils, ARM, 15/16] Add support for VSCCLRM adds 32c36c3ce9 [binutils, ARM, 16/16] Add support to VLDR and VSTR of syste [...] adds ccb8d7e819 AArch64: Tidy up aarch64_gdbarch_init adds 4da037ef9d AArch64 SVE: Check for vector length change when getting gdbarch adds 48574d91bf AArch64 SVE: Support changing vector lengths for ptrace adds 86333705ae Skip print-map-discarded test for non-ELF targets adds 4aa866af6b Fix AMD64 return value ABI in expression evaluation adds 02e902e1a1 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 69 + bfd/archures.c | 1 + bfd/bfd-in2.h | 20 + bfd/cpu-arm.c | 1 + bfd/elf32-arm.c | 282 +++- bfd/libbfd.h | 7 + bfd/reloc.c | 32 + bfd/version.h | 2 +- binutils/ChangeLog | 4 + binutils/readelf.c | 2 +- elfcpp/ChangeLog | 12 + elfcpp/arm.h | 7 +- gas/ChangeLog | 201 +++ gas/config/tc-arm.c | 1484 ++++++++++++++++----- gas/doc/c-arm.texi | 11 + gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.d | 4 + gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l | 16 + gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s | 23 + gas/testsuite/gas/arm/archv8m_1m-cmse-main.d | 57 + gas/testsuite/gas/arm/archv8m_1m-cmse-main.s | 54 + gas/testsuite/gas/arm/armv8.1-m.main-fp-dp.d | 203 +++ gas/testsuite/gas/arm/armv8.1-m.main-fp.d | 270 ++++ gas/testsuite/gas/arm/armv8.1-m.main-hp.d | 75 ++ gas/testsuite/gas/arm/armv8_1-m-bf-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-bf-bad.l | 9 + gas/testsuite/gas/arm/armv8_1-m-bf-bad.s | 14 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l | 7 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange.d | 14 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bf-rel.d | 10 + gas/testsuite/gas/arm/armv8_1-m-bf-rel.s | 5 + gas/testsuite/gas/arm/armv8_1-m-bf.d | 13 + gas/testsuite/gas/arm/armv8_1-m-bf.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bfcsel.d | 12 + gas/testsuite/gas/arm/armv8_1-m-bfcsel.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bfl-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-bfl-bad.l | 9 + gas/testsuite/gas/arm/armv8_1-m-bfl-bad.s | 14 + gas/testsuite/gas/arm/armv8_1-m-bfl-rel.d | 10 + gas/testsuite/gas/arm/armv8_1-m-bfl-rel.s | 5 + gas/testsuite/gas/arm/armv8_1-m-bfl.d | 13 + gas/testsuite/gas/arm/armv8_1-m-bfl.s | 12 + gas/testsuite/gas/arm/armv8_1-m-loloop-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-loloop-bad.l | 7 + gas/testsuite/gas/arm/armv8_1-m-loloop-bad.s | 12 + gas/testsuite/gas/arm/armv8_1-m-loloop.d | 17 + gas/testsuite/gas/arm/armv8_1-m-loloop.s | 14 + gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d | 13 + gdb/ChangeLog | 27 + gdb/aarch64-linux-nat.c | 36 + gdb/aarch64-tdep.c | 92 +- gdb/amd64-tdep.c | 44 +- gdb/nat/aarch64-sve-linux-ptrace.c | 92 +- gdb/nat/aarch64-sve-linux-ptrace.h | 12 +- gdb/testsuite/ChangeLog | 5 + gdb/testsuite/gdb.arch/amd64-eval.cc | 120 ++ gdb/testsuite/gdb.arch/amd64-eval.exp | 43 + include/ChangeLog | 21 + include/elf/arm.h | 6 +- include/opcode/arm.h | 6 + ld/ChangeLog | 29 + ld/testsuite/ld-arm/arm-elf.exp | 10 + ld/testsuite/ld-arm/attr-merge-13.attr | 6 + ld/testsuite/ld-arm/attr-merge-13a.s | 5 + ld/testsuite/ld-arm/attr-merge-13b.s | 5 + ld/testsuite/ld-arm/bf.d | 14 + ld/testsuite/ld-arm/bf.s | 19 + ld/testsuite/ld-arm/bfcsel.d | 18 + ld/testsuite/ld-arm/bfcsel.s | 25 + ld/testsuite/ld-arm/bfl.d | 14 + ld/testsuite/ld-arm/bfl.s | 19 + ld/testsuite/ld-gc/gc.exp | 4 +- opcodes/ChangeLog | 73 + opcodes/arm-dis.c | 1070 +++++++++------ 76 files changed, 4031 insertions(+), 895 deletions(-) create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.d create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main.d create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main.s create mode 100644 gas/testsuite/gas/arm/armv8.1-m.main-fp-dp.d create mode 100644 gas/testsuite/gas/arm/armv8.1-m.main-fp.d create mode 100644 gas/testsuite/gas/arm/armv8.1-m.main-hp.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-rel.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-rel.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfcsel.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfcsel.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-rel.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-rel.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop.s create mode 100644 gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d create mode 100644 gdb/testsuite/gdb.arch/amd64-eval.cc create mode 100644 gdb/testsuite/gdb.arch/amd64-eval.exp create mode 100644 ld/testsuite/ld-arm/attr-merge-13.attr create mode 100644 ld/testsuite/ld-arm/attr-merge-13a.s create mode 100644 ld/testsuite/ld-arm/attr-merge-13b.s create mode 100644 ld/testsuite/ld-arm/bf.d create mode 100644 ld/testsuite/ld-arm/bf.s create mode 100644 ld/testsuite/ld-arm/bfcsel.d create mode 100644 ld/testsuite/ld-arm/bfcsel.s create mode 100644 ld/testsuite/ld-arm/bfl.d create mode 100644 ld/testsuite/ld-arm/bfl.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig updated (1bd67b5a -> 2aa90e04)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards 1bd67b5a 0: good: binutils-gcc-linux: boot new 2aa90e04 0: good: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1bd67b5a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 118 +- 02-prepare_abe/console.log | 168 +- 03-build_abe-binutils/console.log | 10773 +++++++------- 04-build_abe-stage1/console.log | 14866 +++++++++--------- 05-build_linux/console.log | 2572 ++-- 06-boot_linux/console.log | 422 +- console.log | 28923 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- 8 files changed, 28344 insertions(+), 29514 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[llvm] branch master updated (5a75931d50a -> 57426150050)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5a75931d50a Remove some more unused headers from MachineFunction.h and [...] new 57426150050 [CodeExtractor] Add a few debug lines to understand why a r [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Transforms/Utils/CodeExtractor.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (dc4060a5dc25 -> 618d919cae2f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/linux. from dc4060a5dc25 Linux 5.1-rc5 adds 11cf9d863dcb fs/dax: Deposit pagetable even when installing zero page adds 5512320c9f6f Merge tag 'fsdax-fix-5.1-rc6' of git://git.kernel.org/pub/ [...] adds 351f339faa30 acpi/nfit: Always dump _DSM output payload adds 55c1fc0af29a libnvdimm/namespace: Fix a potential NULL pointer dereference adds 486fa92df470 libnvdimm/btt: Fix a kmemdup failure check adds 037c8489ade6 libnvdimm/security: provide fix for secure-erase to use zero-key adds d2e5b6436c28 libnvdimm/security, acpi/nfit: unify zero-key for all secu [...] adds 9dc6488e84b0 libnvdimm/pmem: fix a possible OOB access when read and wr [...] adds 2170a0d53bee tools/testing/nvdimm: Retain security state after overwrite adds 618d919cae2f Merge tag 'libnvdimm-fixes-5.1-rc6' of git://git.kernel.or [...] No new revisions were added by this update. Summary of changes: drivers/acpi/nfit/core.c | 12 ++-- drivers/acpi/nfit/intel.c | 10 ++-- drivers/nvdimm/btt_devs.c | 18 ++++-- drivers/nvdimm/namespace_devs.c | 5 +- drivers/nvdimm/pmem.c | 8 +-- drivers/nvdimm/security.c | 118 ++++++++++++++++++++++++--------------- fs/dax.c | 15 +++++ tools/testing/nvdimm/test/nfit.c | 17 ++++-- 8 files changed, 132 insertions(+), 71 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (ae050d214b9 -> 26326434548)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/llvm-project. from ae050d214b9 llvm-undname: Fix oss-fuzz-foudn crash-on-invalid with inco [...] adds d189680baa0 [GlobalISel] Introduce a CSEConfigBase class to allow targe [...] adds 946b1246d6c [GlobalISel] Enable CSE in the IRTranslator & legalizer for [...] adds 489f8255fcb [Sparc] Fix typo. NFC. adds abd87ff48b9 [X86] Regenerate checks for domain-reassignment.mir adds 60569363a58 [SelectionDAG] Use KnownBits::computeForAddSub/computeForAddCarry adds 43e92880acf [clangd] Reorder source files in CMakeLists adds 50a09670f0d [DWARF] Make DWARFDebugLine::ParsingState::RowNumber a loca [...] adds bd8a1ce7bbb [clang-format] [PR41170] Break after return type ignored wi [...] adds b93de4cd263 [DWARF] Fix DWARFVerifier::DieRangeInfo::intersects adds 42605f83d3e [DWARF] Delete redundant check in DWARFAddressRange::intersects adds dc8d8fb20b8 [Lookup] Invisible decls should not be ambiguous when renaming. adds f54328372b1 [NewPM] Add Option handling for SimplifyCFG adds 6a63e5aa7be [Transforms][ASan] Move findAllocaForValue() to Utils/Local [...] adds 0e17ab0fd2a Revert "[DWARF] Delete redundant check in DWARFAddressRange [...] adds a9ce09be033 [clangd] Bump clangd-index version for TemplateArgument changes adds 3992e9d229e Codegen: Fixed perf branch_weights in couple of tests. NFC. adds 38803920c49 [DebugInfo][Docs] Document variable location metadata trans [...] adds f56a436891e [DWARF] Fix DWARFVerifier::DieRangeInfo::contains adds 38c1bda9f64 [Docs] Correct some indentation muppetry that trips buildbots adds 301ed1cb49a [TableGen] Include schedule model name in diagnostic. adds e038fa7292c FileCheck [1/12]: Move variable table in new object adds 7a112c44ff4 [Docs] Switch a code block from LLVM to text adds 842be38162e [AMDGPU] Fixed incorrect test in vcnd/vcmp optimization adds 7844031d460 [MinGW] Remove some supefluous calls to MakeArgString. NFC. adds cdf126ebec1 [COFF] Link crtend.o as the last object file adds 19bb1d5739b [llvm-readobj] Reapply: Improve error message for --string-dump adds 4918738c070 [llvm-readelf] Correctly dump symbols whose section id is S [...] adds abcade08b5d gn build: Merge r358390 adds 9db00f7e5b3 DAG: propagate whether an arg is a pointer for CallingConv [...] adds 2be3f868f9c DAG: propagate ConsecutiveRegs flags to returns too. adds 9ef03dd20a5 [clangd] Wait for compile command in ASTWorker instead of C [...] adds 5db281cd4ed clang-format vs plugin: Visual Studio 2019 support adds 5e13cd2e61c [InstCombine] canonicalize fdiv after fmul if reassociation [...] adds b688a200e4c [llvm-objdump] Align instructions to a tab stop in disassem [...] adds c71433335ad [EarlyCSE] regenerate test checks; NFC adds f3e4f24ed74 [libc++] Make sure that the symbol differ takes into accoun [...] adds f2073321c93 [clang] Aligned allocation is actually supported in macosx 10.13 adds 5e165fba3ac [NFC] Add missing revision number in libc++ ABI changelog adds bb6cd8254c2 [clangd] Fallback to OrigD when SLoc is invalid adds 70921d4a86e Revert r358337: "[CommandLineParser] Add DefaultOption flag" adds 9d812f44994 [llvm-objdump] Reorganize cl::opt variables and move Mach-O [...] adds 8c1353dd14e [llvm-objdump] Delete unused forward declarations adds 523758ef5b5 [llvm-objdump] Wrap things in namespace llvm adds 204339a2348 [llvm-objdump] Simplify PrintHelpMessage() logic adds fbe64a2cfb4 [LoopPred] Hoist and of predicated checks where legal adds 0e0bb0e24a0 [EarlyCSE] add tests for selects with commuted operands (PR [...] adds 64041d7b907 llvm-undname: Fix nullptr deref on invalid conversion opera [...] adds 09e539fcaeb [PGO] Profile guided code size optimization. adds 3c3ccc00495 [libc++] Fix build failure with _LIBCPP_DEBUG=0 when iterat [...] adds 8d856488a89 Add slbfee instruction. adds 8e364c680fa [X86] Restore the pavg intrinsics. adds b85f74a283a [CommandLineParser] Add DefaultOption flag adds 5221532a4eb Fix header guard typo and build error. adds 3929c432e65 Add explicit dependency to MCDwarf.h in ARC backend. adds 4fe42214e24 [DEBUGINFO] Prevent Instcombine from dropping debuginfo whe [...] adds 8ae68f26489 [x86] update test checks; NFC adds e1e1bd7f9c4 [libc++] Fix debug_less test in C++03 adds e46d77d1d91 [LoopPred] Stop passing around builders [NFC] adds a54a11e22a3 [X86] Improve avx512-kconstraints-att_inline_asm.c to not b [...] adds 3d9b47c770d [X86] Block i32/i64 for 'k' and 'Yk' in getRegForInlineAsmC [...] adds 0fa94ee318d Revert "[clang] Aligned allocation is actually supported in [...] adds 4f21f5f5ce6 [OpenMP] Exchange code in asm file for inline assembly adds af808ee2ee0 [Tests] Add a few more tests for LoopPredication w/invariant loads adds 8b1ec798b56 [LLD][COFF] use offset in archive to disambiguate archive members adds 407dd4d1693 [clang-format] Fix -Wconversion-null warning in GCC adds 13532ea6234 [OPENMP][NVPTX]Fix dynamic scheduling in L2+ SPMD parallel [...] adds 16256123d00 Revert r358418: "[llvm-objdump] Simplify PrintHelpMessage() logic" adds 5ae05d810c8 [EarlyCSE] add test for select condition double-negation; NFC adds e0eb13135f9 [OPENMP][NVPTX]Run parallel regions with num_threads clause [...] adds fbdd2a18874 AMDGPU: Fix printed format of SReg_96 adds 101abd219b3 AMDGPU: Fix unreachable when counting register usage of SGPR96 adds 26536728591 Time profiler: small fixes and optimizations adds 77439bb1280 [X86] Fix a stack folding test to have a full xmm2-31 clobb [...] adds 0495f29e42c [X86] Limit the 'x' inline assembly constraint to zmm0-15 w [...] adds c8497467edc [Support] Add a test for recursive response file expansion adds c8df4fb9c38 [Support] Fix recursive response file expansion guard adds 45129145b9d Fix test on Windows that uses a different path separator ch [...] adds 800a0c3e4b0 [EarlyCSE] add more tests for double-negated select condition; NFC adds de68a375181 Only use argv[0] as the main executable name if it exists. adds fda04268886 [LSR] Rewrite misses some fixup locations if it splits crit [...] adds 02a90ea73de [AArch64][GlobalISel] Don't do extending loads combine for [...] adds d9d0c3e1382 Revert r358405: "[llvm-objdump] Align instructions to a tab [...] adds d60ac111e67 Revert [Support] Fix recursive response file expansion guard adds 8eeb56d1333 Revert [Support] Add a test for recursive response file expansion adds e4b19c9c286 [ASTImporter] Regression test to ensure that we handling im [...] adds 728780bfadf Simplify diagnosis of misplaced attributes in module-declarations. adds b068f92d94a DebugInfo: Default to standalone debug when tuning for LLDB adds 0a61be96fc9 Reapply [Support] Add a test for recursive response file expansion adds 1826095a5fa Reapply [Support] Fix recursive response file expansion guard adds 1600e245211 PR41192: fix cases where "missing ';' after class" error wo [...] new 3ad162bbebc Remove some more unused headers from MachineFunction.h and [...] new 26326434548 [TSan][libdispatch] Port gcd-sync-block-copy.mm to C++ The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 18 +- clang-tools-extra/clangd/ClangdServer.h | 3 - clang-tools-extra/clangd/Compiler.h | 2 +- .../clangd/GlobalCompilationDatabase.cpp | 9 +- clang-tools-extra/clangd/TUScheduler.cpp | 125 ++++-- clang-tools-extra/clangd/TUScheduler.h | 14 +- clang-tools-extra/clangd/index/Serialization.cpp | 2 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 6 + clang-tools-extra/unittests/clangd/CMakeLists.txt | 2 +- clang-tools-extra/unittests/clangd/ClangdTests.cpp | 58 +++ .../unittests/clangd/CodeCompleteTests.cpp | 2 +- .../unittests/clangd/SymbolCollectorTests.cpp | 8 + .../unittests/clangd/TUSchedulerTests.cpp | 65 ++- clang/include/clang/Basic/BuiltinsX86.def | 6 + clang/include/clang/Tooling/Core/Lookup.h | 3 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 17 +- clang/lib/Driver/ToolChains/Clang.cpp | 7 +- clang/lib/Driver/ToolChains/MinGW.cpp | 16 +- clang/lib/Format/TokenAnnotator.h | 14 +- clang/lib/Headers/avx2intrin.h | 12 +- clang/lib/Headers/avx512bwintrin.h | 12 +- clang/lib/Headers/emmintrin.h | 12 +- clang/lib/Parse/ParseDeclCXX.cpp | 2 + clang/lib/Parse/Parser.cpp | 7 +- clang/lib/Tooling/Core/Lookup.cpp | 21 +- .../Tooling/Refactoring/Rename/USRLocFinder.cpp | 4 +- clang/test/CXX/cpp/cpp.module/p2.cpp | 5 +- clang/test/CodeGen/avx2-builtins.c | 16 +- .../CodeGen/avx512-kconstraints-att_inline_asm.c | 82 ++-- clang/test/CodeGen/avx512bw-builtins.c | 50 +-- clang/test/CodeGen/avx512vlbw-builtins.c | 68 +-- clang/test/CodeGen/sse2-builtins.c | 16 +- clang/test/Driver/debug-options.c | 21 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 68 ++- .../nvptx_target_parallel_num_threads_codegen.cpp | 31 +- clang/test/Parser/cxx-class.cpp | 11 + .../source.extension.vsixmanifest.in | 2 +- clang/tools/driver/cc1_main.cpp | 2 +- clang/unittests/Format/FormatTest.cpp | 27 +- clang/unittests/Tooling/LookupTest.cpp | 46 ++- .../test/tsan/Darwin/gcd-sync-block-copy.mm | 10 +- .../test/tsan/libdispatch/sync-block-copy.cc | 45 ++ libcxx/include/algorithm | 9 + libcxx/lib/abi/CHANGELOG.TXT | 2 +- libcxx/test/libcxx/algorithms/debug_less.pass.cpp | 35 ++ libcxx/utils/libcxx/sym_check/diff.py | 6 +- lld/COFF/Driver.cpp | 49 ++- lld/COFF/Driver.h | 2 +- lld/COFF/InputFiles.cpp | 21 +- lld/COFF/InputFiles.h | 3 +- lld/docs/ReleaseNotes.rst | 4 +- lld/test/COFF/Inputs/eh_frame_terminator-crtend.s | 3 + .../COFF/Inputs/eh_frame_terminator-otherfunc.s | 7 + lld/test/COFF/eh_frame_terminator.s | 26 ++ lld/test/COFF/thinlto-archivecollision.ll | 29 ++ lld/test/COFF/thinlto-archives.ll | 8 +- .../cast_int_to_anonymous_enum}/Makefile | 0 .../TestCastIntToAnonymousEnum.py | 22 + .../cast_int_to_anonymous_enum/main.cpp | 9 + llvm/docs/SourceLevelDebugging.rst | 310 ++++++++++++++ llvm/include/llvm/CodeGen/CSEConfigBase.h | 28 ++ llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h | 34 +- llvm/include/llvm/CodeGen/MachineFunction.h | 6 +- llvm/include/llvm/CodeGen/MachineMemOperand.h | 2 - llvm/include/llvm/CodeGen/PseudoSourceValue.h | 1 - llvm/include/llvm/CodeGen/TargetCallingConv.h | 16 +- llvm/include/llvm/CodeGen/TargetPassConfig.h | 4 + .../llvm/DebugInfo/DWARF/DWARFAddressRange.h | 6 - llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 3 - llvm/include/llvm/IR/IntrinsicsX86.td | 18 + llvm/include/llvm/Support/FileCheck.h | 63 ++- llvm/include/llvm/Support/TimeProfiler.h | 16 +- llvm/include/llvm/Target/TargetCallingConv.td | 9 + .../llvm/Transforms/Scalar/ConstantHoisting.h | 5 +- llvm/include/llvm/Transforms/Utils/Local.h | 4 + .../llvm/Transforms/Utils/SimplifyLibCalls.h | 5 + llvm/include/llvm/Transforms/Utils/SizeOpts.h | 34 ++ llvm/include/llvm/Transforms/Utils/UnrollLoop.h | 5 +- .../llvm/Transforms/Vectorize/LoopVectorize.h | 4 +- llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp | 20 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 5 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 21 +- llvm/lib/CodeGen/GlobalISel/Legalizer.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 92 ++--- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 40 ++ llvm/lib/CodeGen/TargetPassConfig.cpp | 7 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 62 ++- llvm/lib/Demangle/MicrosoftDemangle.cpp | 11 +- llvm/lib/IR/AutoUpgrade.cpp | 36 +- llvm/lib/Passes/PassBuilder.cpp | 46 ++- llvm/lib/Passes/PassRegistry.def | 6 +- llvm/lib/Support/CommandLine.cpp | 12 +- llvm/lib/Support/FileCheck.cpp | 171 ++++---- llvm/lib/Support/Signals.cpp | 4 +- llvm/lib/Support/TimeProfiler.cpp | 78 ++-- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 5 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 7 + llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 3 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 6 + .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 3 + .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 +- .../Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp | 1 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 6 + llvm/lib/Target/Mips/MipsTargetMachine.cpp | 6 + llvm/lib/Target/PowerPC/P9InstrResources.td | 1 + llvm/lib/Target/PowerPC/PPCInstrFormats.td | 1 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 4 + llvm/lib/Target/PowerPC/PPCSchedule.td | 1 + llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 49 ++- llvm/lib/Target/X86/X86IntrinsicsInfo.h | 6 + llvm/lib/Target/X86/X86RegisterInfo.cpp | 1 + llvm/lib/Target/X86/X86RegisterInfo.td | 4 + llvm/lib/Target/X86/X86TargetMachine.cpp | 6 + .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 +- .../InstCombine/InstCombineMulDivRem.cpp | 8 + .../InstCombine/InstructionCombining.cpp | 29 +- .../Instrumentation/AddressSanitizer.cpp | 42 +- llvm/lib/Transforms/Scalar/ConstantHoisting.cpp | 18 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 36 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 94 +++-- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 43 +- .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 24 +- llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + llvm/lib/Transforms/Utils/Local.cpp | 47 ++- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 10 +- llvm/lib/Transforms/Utils/SizeOpts.cpp | 37 ++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 37 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 2 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 29 +- .../AArch64/GlobalISel/call-translator-ios.ll | 2 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 3 +- .../CodeGen/AArch64/GlobalISel/legalize-div.mir | 8 +- .../CodeGen/AArch64/GlobalISel/legalize-ext.mir | 5 +- .../legalize-load-store-s128-unaligned.mir | 3 +- .../AArch64/GlobalISel/legalize-merge-values.mir | 3 +- .../CodeGen/AArch64/GlobalISel/legalize-phi.mir | 3 +- .../CodeGen/AArch64/GlobalISel/legalize-rem.mir | 5 +- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 15 +- .../CodeGen/AArch64/GlobalISel/legalize-vaarg.mir | 10 +- .../GlobalISel/non-pow-2-extload-combine.mir | 37 ++ .../CodeGen/AArch64/GlobalISel/translate-gep.ll | 21 +- llvm/test/CodeGen/AArch64/ragreedy-csr.ll | 4 +- .../AMDGPU/GlobalISel/legalize-addrspacecast.mir | 34 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 240 +++++------ .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 6 +- .../AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir | 6 +- .../AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 240 +++++------ .../AMDGPU/GlobalISel/legalize-merge-values.mir | 37 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 300 ++++++-------- .../CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir | 18 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 133 +++--- .../CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir | 18 +- .../CodeGen/AMDGPU/call-graph-register-usage.ll | 13 + llvm/test/CodeGen/AMDGPU/inline-asm.ll | 10 + .../ARM/GlobalISel/arm-legalize-bitcounts.mir | 2 - .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 8 - .../CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 16 +- .../ARM/GlobalISel/arm-legalize-load-store.mir | 12 +- .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 12 +- .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir | 30 +- .../Mips/GlobalISel/legalizer/rem_and_div.mir | 92 ++--- .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir | 12 +- llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll | 16 +- llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll | 40 +- .../CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll | 36 +- llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll | 20 +- llvm/test/CodeGen/X86/GlobalISel/add-ext.ll | 79 ++-- llvm/test/CodeGen/X86/GlobalISel/gep.ll | 16 +- .../X86/GlobalISel/irtranslator-callingconv.ll | 38 +- .../X86/GlobalISel/legalize-memop-scalar-32.mir | 3 +- .../x86_64-irtranslator-struct-return.ll | 39 +- llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll | 31 ++ llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 16 +- .../CodeGen/X86/avx2-intrinsics-x86-upgrade.ll | 20 - llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll | 32 ++ llvm/test/CodeGen/X86/avx512bw-intrinsics.ll | 52 +++ llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll | 105 +++++ llvm/test/CodeGen/X86/domain-reassignment.mir | 7 +- .../CodeGen/X86/inline-asm-avx512f-x-constraint.ll | 10 + llvm/test/CodeGen/X86/lea-2.ll | 37 +- llvm/test/CodeGen/X86/lea-3.ll | 104 ++--- llvm/test/CodeGen/X86/lea-4.ll | 42 +- llvm/test/CodeGen/X86/pr32282.ll | 19 +- llvm/test/CodeGen/X86/ragreedy-bug.ll | 4 +- llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 38 +- .../CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 40 -- llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll | 42 ++ llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll | 31 +- llvm/test/Demangle/invalid-manglings.test | 5 + llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s | 4 + llvm/test/Object/corrupt.test | 6 +- llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/Other/new-pm-lto-defaults.ll | 1 + llvm/test/Other/new-pm-thinlto-defaults.ll | 2 +- llvm/test/Other/opt-O2-pipeline.ll | 2 + llvm/test/Other/opt-O3-pipeline.ll | 2 + llvm/test/Other/opt-Os-pipeline.ll | 2 + llvm/test/TableGen/SchedModelError.td | 18 + .../ARM/const-addr-no-neg-offset.ll | 59 +++ llvm/test/Transforms/EarlyCSE/commute.ll | 382 ++++++++++++++--- .../test/Transforms/InstCombine/cast-mul-select.ll | 9 + llvm/test/Transforms/InstCombine/fast-math.ll | 4 +- llvm/test/Transforms/InstCombine/fmul-pow.ll | 5 +- llvm/test/Transforms/InstCombine/fmul.ll | 36 +- llvm/test/Transforms/InstCombine/fputs-opt-size.ll | 33 ++ llvm/test/Transforms/LoopLoadElim/opt-size.ll | 53 +++ llvm/test/Transforms/LoopPredication/basic.ll | 6 +- .../Transforms/LoopPredication/invariant_load.ll | 129 +++++- llvm/test/Transforms/LoopPredication/widened.ll | 6 +- .../missing-phi-operand-update.ll | 101 +++++ .../Transforms/LoopUnroll/unroll-opt-attribute.ll | 46 +++ llvm/test/Transforms/LoopVectorize/optsize.ll | 43 ++ .../SimplifyCFG/ARM/switch-to-lookup-table.ll | 6 + .../Transforms/SimplifyCFG/CoveredLookupTable.ll | 1 + .../SimplifyCFG/ForwardSwitchConditionToPHI.ll | 3 + .../SimplifyCFG/X86/disable-lookup-table.ll | 1 + .../SimplifyCFG/X86/switch-covered-bug.ll | 2 + .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 + .../SimplifyCFG/X86/switch_to_lookup_table.ll | 2 +- .../SimplifyCFG/branch-fold-threshold.ll | 3 + llvm/test/Transforms/SimplifyCFG/multiple-phis.ll | 1 + llvm/test/Transforms/SimplifyCFG/no-md-sink.ll | 1 + .../SimplifyCFG/preserve-llvm-loop-metadata.ll | 1 + llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 1 + .../Transforms/SimplifyCFG/sink-common-code.ll | 1 + llvm/test/Transforms/SimplifyCFG/switch_undef.ll | 1 + llvm/test/tools/llvm-readobj/basic.test | 4 +- .../tools/llvm-readobj/codeview-merging-cycle.test | 2 +- .../tools/llvm-readobj/elf-dynamic-malformed.test | 4 +- .../llvm-readobj/elf-malformed-pt-dynamic.test | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error1.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error2.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error3.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error4.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error5.s | 2 +- llvm/test/tools/llvm-readobj/many-sections2.s | 24 ++ llvm/test/tools/llvm-readobj/mips-got.test | 4 +- llvm/test/tools/llvm-readobj/string-dump.test | 11 +- .../tools/llvm-readobj/thin-archive-paths.test | 4 +- llvm/test/tools/llvm-readobj/thin-archive.test | 2 +- llvm/test/tools/llvm-readobj/wasm-invalid.test | 2 +- llvm/tools/llvm-objdump/COFFDump.cpp | 17 +- llvm/tools/llvm-objdump/ELFDump.cpp | 19 +- llvm/tools/llvm-objdump/MachODump.cpp | 247 +++++++---- llvm/tools/llvm-objdump/WasmDump.cpp | 9 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 460 +++++++++------------ llvm/tools/llvm-objdump/llvm-objdump.h | 40 -- llvm/tools/llvm-readobj/ELFDumper.cpp | 7 +- llvm/tools/llvm-readobj/ObjDumper.cpp | 6 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 21 +- llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp | 42 ++ llvm/unittests/CodeGen/GlobalISel/CSETest.cpp | 2 +- .../DebugInfo/DWARF/DWARFDebugInfoTest.cpp | 84 ++-- llvm/unittests/Support/CMakeLists.txt | 1 + llvm/unittests/Support/CommandLineTest.cpp | 72 ++++ llvm/unittests/Support/FileCheckTest.cpp | 52 +++ llvm/utils/TableGen/CodeGenSchedule.cpp | 3 +- .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 + .../libomptarget/deviceRTLs/nvptx/src/libcall.cu | 3 +- openmp/libomptarget/deviceRTLs/nvptx/src/loop.cu | 19 +- .../libomptarget/deviceRTLs/nvptx/src/parallel.cu | 2 +- .../nvptx/test/parallel/spmd_parallel_regions.cpp | 30 ++ openmp/runtime/src/kmp.h | 102 +++-- openmp/runtime/src/z_Linux_asm.S | 173 -------- 276 files changed, 4814 insertions(+), 2961 deletions(-) create mode 100644 compiler-rt/test/tsan/libdispatch/sync-block-copy.cc create mode 100644 lld/test/COFF/Inputs/eh_frame_terminator-crtend.s create mode 100644 lld/test/COFF/Inputs/eh_frame_terminator-otherfunc.s create mode 100644 lld/test/COFF/eh_frame_terminator.s create mode 100644 lld/test/COFF/thinlto-archivecollision.ll copy lldb/packages/Python/lldbsuite/test/{api/check_public_api_headers => expressi [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/cast_int [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/cast_int [...] create mode 100644 llvm/include/llvm/CodeGen/CSEConfigBase.h create mode 100644 llvm/include/llvm/Transforms/Utils/SizeOpts.h create mode 100644 llvm/lib/Transforms/Utils/SizeOpts.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/non-pow-2-extload-combine.mir create mode 100644 llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll create mode 100644 llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll create mode 100644 llvm/test/TableGen/SchedModelError.td create mode 100644 llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll create mode 100644 llvm/test/tools/llvm-readobj/many-sections2.s create mode 100644 llvm/unittests/Support/FileCheckTest.cpp create mode 100644 openmp/libomptarget/deviceRTLs/nvptx/test/parallel/spmd_paralle [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (be16d3c2 -> 3fe15d5e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards be16d3c2 2: good: llvm-linux: 19261 new 3fe15d5e 2: good: llvm-linux: 19261 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (be16d3c2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 126 +- 02-build_llvm/console.log | 11488 +++++++++++++++--------------- 03-build_linux/console.log | 3309 ++++----- console.log | 14923 ++++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 5 files changed, 14948 insertions(+), 14910 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[clang] branch master updated (56eca6c6aa -> 0b3908b51c)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 56eca6c6aa PR41192: fix cases where "missing ';' after class" error wou [...] new 0b3908b51c Tweak test to pass when using a non-integrated assembler. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/Driver/modules.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (ae050d214b9 -> 1600e245211)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/llvm-project. from ae050d214b9 llvm-undname: Fix oss-fuzz-foudn crash-on-invalid with inco [...] adds d189680baa0 [GlobalISel] Introduce a CSEConfigBase class to allow targe [...] adds 946b1246d6c [GlobalISel] Enable CSE in the IRTranslator & legalizer for [...] adds 489f8255fcb [Sparc] Fix typo. NFC. adds abd87ff48b9 [X86] Regenerate checks for domain-reassignment.mir adds 60569363a58 [SelectionDAG] Use KnownBits::computeForAddSub/computeForAddCarry adds 43e92880acf [clangd] Reorder source files in CMakeLists adds 50a09670f0d [DWARF] Make DWARFDebugLine::ParsingState::RowNumber a loca [...] adds bd8a1ce7bbb [clang-format] [PR41170] Break after return type ignored wi [...] adds b93de4cd263 [DWARF] Fix DWARFVerifier::DieRangeInfo::intersects adds 42605f83d3e [DWARF] Delete redundant check in DWARFAddressRange::intersects adds dc8d8fb20b8 [Lookup] Invisible decls should not be ambiguous when renaming. adds f54328372b1 [NewPM] Add Option handling for SimplifyCFG adds 6a63e5aa7be [Transforms][ASan] Move findAllocaForValue() to Utils/Local [...] adds 0e17ab0fd2a Revert "[DWARF] Delete redundant check in DWARFAddressRange [...] adds a9ce09be033 [clangd] Bump clangd-index version for TemplateArgument changes adds 3992e9d229e Codegen: Fixed perf branch_weights in couple of tests. NFC. adds 38803920c49 [DebugInfo][Docs] Document variable location metadata trans [...] adds f56a436891e [DWARF] Fix DWARFVerifier::DieRangeInfo::contains adds 38c1bda9f64 [Docs] Correct some indentation muppetry that trips buildbots adds 301ed1cb49a [TableGen] Include schedule model name in diagnostic. adds e038fa7292c FileCheck [1/12]: Move variable table in new object adds 7a112c44ff4 [Docs] Switch a code block from LLVM to text adds 842be38162e [AMDGPU] Fixed incorrect test in vcnd/vcmp optimization adds 7844031d460 [MinGW] Remove some supefluous calls to MakeArgString. NFC. adds cdf126ebec1 [COFF] Link crtend.o as the last object file adds 19bb1d5739b [llvm-readobj] Reapply: Improve error message for --string-dump adds 4918738c070 [llvm-readelf] Correctly dump symbols whose section id is S [...] adds abcade08b5d gn build: Merge r358390 adds 9db00f7e5b3 DAG: propagate whether an arg is a pointer for CallingConv [...] adds 2be3f868f9c DAG: propagate ConsecutiveRegs flags to returns too. adds 9ef03dd20a5 [clangd] Wait for compile command in ASTWorker instead of C [...] adds 5db281cd4ed clang-format vs plugin: Visual Studio 2019 support adds 5e13cd2e61c [InstCombine] canonicalize fdiv after fmul if reassociation [...] adds b688a200e4c [llvm-objdump] Align instructions to a tab stop in disassem [...] adds c71433335ad [EarlyCSE] regenerate test checks; NFC adds f3e4f24ed74 [libc++] Make sure that the symbol differ takes into accoun [...] adds f2073321c93 [clang] Aligned allocation is actually supported in macosx 10.13 adds 5e165fba3ac [NFC] Add missing revision number in libc++ ABI changelog adds bb6cd8254c2 [clangd] Fallback to OrigD when SLoc is invalid adds 70921d4a86e Revert r358337: "[CommandLineParser] Add DefaultOption flag" adds 9d812f44994 [llvm-objdump] Reorganize cl::opt variables and move Mach-O [...] adds 8c1353dd14e [llvm-objdump] Delete unused forward declarations adds 523758ef5b5 [llvm-objdump] Wrap things in namespace llvm adds 204339a2348 [llvm-objdump] Simplify PrintHelpMessage() logic adds fbe64a2cfb4 [LoopPred] Hoist and of predicated checks where legal adds 0e0bb0e24a0 [EarlyCSE] add tests for selects with commuted operands (PR [...] adds 64041d7b907 llvm-undname: Fix nullptr deref on invalid conversion opera [...] adds 09e539fcaeb [PGO] Profile guided code size optimization. adds 3c3ccc00495 [libc++] Fix build failure with _LIBCPP_DEBUG=0 when iterat [...] adds 8d856488a89 Add slbfee instruction. adds 8e364c680fa [X86] Restore the pavg intrinsics. adds b85f74a283a [CommandLineParser] Add DefaultOption flag adds 5221532a4eb Fix header guard typo and build error. adds 3929c432e65 Add explicit dependency to MCDwarf.h in ARC backend. adds 4fe42214e24 [DEBUGINFO] Prevent Instcombine from dropping debuginfo whe [...] adds 8ae68f26489 [x86] update test checks; NFC adds e1e1bd7f9c4 [libc++] Fix debug_less test in C++03 adds e46d77d1d91 [LoopPred] Stop passing around builders [NFC] adds a54a11e22a3 [X86] Improve avx512-kconstraints-att_inline_asm.c to not b [...] adds 3d9b47c770d [X86] Block i32/i64 for 'k' and 'Yk' in getRegForInlineAsmC [...] adds 0fa94ee318d Revert "[clang] Aligned allocation is actually supported in [...] adds 4f21f5f5ce6 [OpenMP] Exchange code in asm file for inline assembly adds af808ee2ee0 [Tests] Add a few more tests for LoopPredication w/invariant loads adds 8b1ec798b56 [LLD][COFF] use offset in archive to disambiguate archive members adds 407dd4d1693 [clang-format] Fix -Wconversion-null warning in GCC adds 13532ea6234 [OPENMP][NVPTX]Fix dynamic scheduling in L2+ SPMD parallel [...] adds 16256123d00 Revert r358418: "[llvm-objdump] Simplify PrintHelpMessage() logic" adds 5ae05d810c8 [EarlyCSE] add test for select condition double-negation; NFC adds e0eb13135f9 [OPENMP][NVPTX]Run parallel regions with num_threads clause [...] adds fbdd2a18874 AMDGPU: Fix printed format of SReg_96 adds 101abd219b3 AMDGPU: Fix unreachable when counting register usage of SGPR96 adds 26536728591 Time profiler: small fixes and optimizations adds 77439bb1280 [X86] Fix a stack folding test to have a full xmm2-31 clobb [...] adds 0495f29e42c [X86] Limit the 'x' inline assembly constraint to zmm0-15 w [...] adds c8497467edc [Support] Add a test for recursive response file expansion adds c8df4fb9c38 [Support] Fix recursive response file expansion guard adds 45129145b9d Fix test on Windows that uses a different path separator ch [...] adds 800a0c3e4b0 [EarlyCSE] add more tests for double-negated select condition; NFC adds de68a375181 Only use argv[0] as the main executable name if it exists. adds fda04268886 [LSR] Rewrite misses some fixup locations if it splits crit [...] adds 02a90ea73de [AArch64][GlobalISel] Don't do extending loads combine for [...] adds d9d0c3e1382 Revert r358405: "[llvm-objdump] Align instructions to a tab [...] adds d60ac111e67 Revert [Support] Fix recursive response file expansion guard adds 8eeb56d1333 Revert [Support] Add a test for recursive response file expansion adds e4b19c9c286 [ASTImporter] Regression test to ensure that we handling im [...] adds 728780bfadf Simplify diagnosis of misplaced attributes in module-declarations. adds b068f92d94a DebugInfo: Default to standalone debug when tuning for LLDB adds 0a61be96fc9 Reapply [Support] Add a test for recursive response file expansion adds 1826095a5fa Reapply [Support] Fix recursive response file expansion guard new 1600e245211 PR41192: fix cases where "missing ';' after class" error wo [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 18 +- clang-tools-extra/clangd/ClangdServer.h | 3 - clang-tools-extra/clangd/Compiler.h | 2 +- .../clangd/GlobalCompilationDatabase.cpp | 9 +- clang-tools-extra/clangd/TUScheduler.cpp | 125 ++++-- clang-tools-extra/clangd/TUScheduler.h | 14 +- clang-tools-extra/clangd/index/Serialization.cpp | 2 +- clang-tools-extra/clangd/index/SymbolCollector.cpp | 6 + clang-tools-extra/unittests/clangd/CMakeLists.txt | 2 +- clang-tools-extra/unittests/clangd/ClangdTests.cpp | 58 +++ .../unittests/clangd/CodeCompleteTests.cpp | 2 +- .../unittests/clangd/SymbolCollectorTests.cpp | 8 + .../unittests/clangd/TUSchedulerTests.cpp | 65 ++- clang/include/clang/Basic/BuiltinsX86.def | 6 + clang/include/clang/Tooling/Core/Lookup.h | 3 + clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 17 +- clang/lib/Driver/ToolChains/Clang.cpp | 7 +- clang/lib/Driver/ToolChains/MinGW.cpp | 16 +- clang/lib/Format/TokenAnnotator.h | 14 +- clang/lib/Headers/avx2intrin.h | 12 +- clang/lib/Headers/avx512bwintrin.h | 12 +- clang/lib/Headers/emmintrin.h | 12 +- clang/lib/Parse/ParseDeclCXX.cpp | 2 + clang/lib/Parse/Parser.cpp | 7 +- clang/lib/Tooling/Core/Lookup.cpp | 21 +- .../Tooling/Refactoring/Rename/USRLocFinder.cpp | 4 +- clang/test/CXX/cpp/cpp.module/p2.cpp | 5 +- clang/test/CodeGen/avx2-builtins.c | 16 +- .../CodeGen/avx512-kconstraints-att_inline_asm.c | 82 ++-- clang/test/CodeGen/avx512bw-builtins.c | 50 +-- clang/test/CodeGen/avx512vlbw-builtins.c | 68 +-- clang/test/CodeGen/sse2-builtins.c | 16 +- clang/test/Driver/debug-options.c | 21 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 68 ++- .../nvptx_target_parallel_num_threads_codegen.cpp | 31 +- clang/test/Parser/cxx-class.cpp | 11 + .../source.extension.vsixmanifest.in | 2 +- clang/tools/driver/cc1_main.cpp | 2 +- clang/unittests/Format/FormatTest.cpp | 27 +- clang/unittests/Tooling/LookupTest.cpp | 46 ++- libcxx/include/algorithm | 9 + libcxx/lib/abi/CHANGELOG.TXT | 2 +- libcxx/test/libcxx/algorithms/debug_less.pass.cpp | 35 ++ libcxx/utils/libcxx/sym_check/diff.py | 6 +- lld/COFF/Driver.cpp | 49 ++- lld/COFF/Driver.h | 2 +- lld/COFF/InputFiles.cpp | 21 +- lld/COFF/InputFiles.h | 3 +- lld/docs/ReleaseNotes.rst | 4 +- lld/test/COFF/Inputs/eh_frame_terminator-crtend.s | 3 + .../COFF/Inputs/eh_frame_terminator-otherfunc.s | 7 + lld/test/COFF/eh_frame_terminator.s | 26 ++ lld/test/COFF/thinlto-archivecollision.ll | 29 ++ lld/test/COFF/thinlto-archives.ll | 8 +- .../cast_int_to_anonymous_enum}/Makefile | 0 .../TestCastIntToAnonymousEnum.py | 22 + .../cast_int_to_anonymous_enum/main.cpp | 9 + llvm/docs/SourceLevelDebugging.rst | 310 ++++++++++++++ llvm/include/llvm/CodeGen/CSEConfigBase.h | 28 ++ llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h | 34 +- llvm/include/llvm/CodeGen/TargetCallingConv.h | 16 +- llvm/include/llvm/CodeGen/TargetPassConfig.h | 4 + .../llvm/DebugInfo/DWARF/DWARFAddressRange.h | 6 - llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 3 - llvm/include/llvm/IR/IntrinsicsX86.td | 18 + llvm/include/llvm/Support/FileCheck.h | 63 ++- llvm/include/llvm/Support/TimeProfiler.h | 16 +- llvm/include/llvm/Target/TargetCallingConv.td | 9 + .../llvm/Transforms/Scalar/ConstantHoisting.h | 5 +- llvm/include/llvm/Transforms/Utils/Local.h | 4 + .../llvm/Transforms/Utils/SimplifyLibCalls.h | 5 + llvm/include/llvm/Transforms/Utils/SizeOpts.h | 34 ++ llvm/include/llvm/Transforms/Utils/UnrollLoop.h | 5 +- .../llvm/Transforms/Vectorize/LoopVectorize.h | 4 +- llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp | 20 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 5 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 21 +- llvm/lib/CodeGen/GlobalISel/Legalizer.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 92 ++--- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 40 ++ llvm/lib/CodeGen/TargetPassConfig.cpp | 7 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 62 ++- llvm/lib/Demangle/MicrosoftDemangle.cpp | 11 +- llvm/lib/IR/AutoUpgrade.cpp | 36 +- llvm/lib/Passes/PassBuilder.cpp | 46 ++- llvm/lib/Passes/PassRegistry.def | 6 +- llvm/lib/Support/CommandLine.cpp | 12 +- llvm/lib/Support/FileCheck.cpp | 171 ++++---- llvm/lib/Support/Signals.cpp | 4 +- llvm/lib/Support/TimeProfiler.cpp | 78 ++-- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 5 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 7 + llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 3 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 6 + .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 3 + .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 +- .../Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp | 1 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 6 + llvm/lib/Target/Mips/MipsTargetMachine.cpp | 6 + llvm/lib/Target/PowerPC/P9InstrResources.td | 1 + llvm/lib/Target/PowerPC/PPCInstrFormats.td | 1 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 4 + llvm/lib/Target/PowerPC/PPCSchedule.td | 1 + llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 49 ++- llvm/lib/Target/X86/X86IntrinsicsInfo.h | 6 + llvm/lib/Target/X86/X86RegisterInfo.cpp | 1 + llvm/lib/Target/X86/X86RegisterInfo.td | 4 + llvm/lib/Target/X86/X86TargetMachine.cpp | 6 + .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 +- .../InstCombine/InstCombineMulDivRem.cpp | 8 + .../InstCombine/InstructionCombining.cpp | 29 +- .../Instrumentation/AddressSanitizer.cpp | 42 +- llvm/lib/Transforms/Scalar/ConstantHoisting.cpp | 18 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 36 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 94 +++-- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 43 +- .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 24 +- llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + llvm/lib/Transforms/Utils/Local.cpp | 47 ++- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 10 +- llvm/lib/Transforms/Utils/SizeOpts.cpp | 37 ++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 37 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 2 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 29 +- .../AArch64/GlobalISel/call-translator-ios.ll | 2 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 2 +- .../CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 3 +- .../CodeGen/AArch64/GlobalISel/legalize-div.mir | 8 +- .../CodeGen/AArch64/GlobalISel/legalize-ext.mir | 5 +- .../legalize-load-store-s128-unaligned.mir | 3 +- .../AArch64/GlobalISel/legalize-merge-values.mir | 3 +- .../CodeGen/AArch64/GlobalISel/legalize-phi.mir | 3 +- .../CodeGen/AArch64/GlobalISel/legalize-rem.mir | 5 +- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 15 +- .../CodeGen/AArch64/GlobalISel/legalize-vaarg.mir | 10 +- .../GlobalISel/non-pow-2-extload-combine.mir | 37 ++ .../CodeGen/AArch64/GlobalISel/translate-gep.ll | 21 +- llvm/test/CodeGen/AArch64/ragreedy-csr.ll | 4 +- .../AMDGPU/GlobalISel/legalize-addrspacecast.mir | 34 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 240 +++++------ .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir | 6 +- .../AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir | 6 +- .../AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir | 9 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 240 +++++------ .../AMDGPU/GlobalISel/legalize-merge-values.mir | 37 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 300 ++++++-------- .../CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir | 18 +- .../AMDGPU/GlobalISel/legalize-unmerge-values.mir | 133 +++--- .../CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir | 18 +- .../CodeGen/AMDGPU/call-graph-register-usage.ll | 13 + llvm/test/CodeGen/AMDGPU/inline-asm.ll | 10 + .../ARM/GlobalISel/arm-legalize-bitcounts.mir | 2 - .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 8 - .../CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 16 +- .../ARM/GlobalISel/arm-legalize-load-store.mir | 12 +- .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 12 +- .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir | 30 +- .../Mips/GlobalISel/legalizer/rem_and_div.mir | 92 ++--- .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir | 12 +- llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll | 16 +- llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll | 40 +- .../CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll | 36 +- llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll | 20 +- llvm/test/CodeGen/X86/GlobalISel/add-ext.ll | 79 ++-- llvm/test/CodeGen/X86/GlobalISel/gep.ll | 16 +- .../X86/GlobalISel/irtranslator-callingconv.ll | 38 +- .../X86/GlobalISel/legalize-memop-scalar-32.mir | 3 +- .../x86_64-irtranslator-struct-return.ll | 39 +- llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll | 31 ++ llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 16 +- .../CodeGen/X86/avx2-intrinsics-x86-upgrade.ll | 20 - llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll | 32 ++ llvm/test/CodeGen/X86/avx512bw-intrinsics.ll | 52 +++ llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll | 105 +++++ llvm/test/CodeGen/X86/domain-reassignment.mir | 7 +- .../CodeGen/X86/inline-asm-avx512f-x-constraint.ll | 10 + llvm/test/CodeGen/X86/lea-2.ll | 37 +- llvm/test/CodeGen/X86/lea-3.ll | 104 ++--- llvm/test/CodeGen/X86/lea-4.ll | 42 +- llvm/test/CodeGen/X86/pr32282.ll | 19 +- llvm/test/CodeGen/X86/ragreedy-bug.ll | 4 +- llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 38 +- .../CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 40 -- llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll | 42 ++ llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll | 31 +- llvm/test/Demangle/invalid-manglings.test | 5 + llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s | 4 + llvm/test/Object/corrupt.test | 6 +- llvm/test/Other/new-pm-defaults.ll | 2 +- llvm/test/Other/new-pm-lto-defaults.ll | 1 + llvm/test/Other/new-pm-thinlto-defaults.ll | 2 +- llvm/test/Other/opt-O2-pipeline.ll | 2 + llvm/test/Other/opt-O3-pipeline.ll | 2 + llvm/test/Other/opt-Os-pipeline.ll | 2 + llvm/test/TableGen/SchedModelError.td | 18 + .../ARM/const-addr-no-neg-offset.ll | 59 +++ llvm/test/Transforms/EarlyCSE/commute.ll | 382 ++++++++++++++--- .../test/Transforms/InstCombine/cast-mul-select.ll | 9 + llvm/test/Transforms/InstCombine/fast-math.ll | 4 +- llvm/test/Transforms/InstCombine/fmul-pow.ll | 5 +- llvm/test/Transforms/InstCombine/fmul.ll | 36 +- llvm/test/Transforms/InstCombine/fputs-opt-size.ll | 33 ++ llvm/test/Transforms/LoopLoadElim/opt-size.ll | 53 +++ llvm/test/Transforms/LoopPredication/basic.ll | 6 +- .../Transforms/LoopPredication/invariant_load.ll | 129 +++++- llvm/test/Transforms/LoopPredication/widened.ll | 6 +- .../missing-phi-operand-update.ll | 101 +++++ .../Transforms/LoopUnroll/unroll-opt-attribute.ll | 46 +++ llvm/test/Transforms/LoopVectorize/optsize.ll | 43 ++ .../SimplifyCFG/ARM/switch-to-lookup-table.ll | 6 + .../Transforms/SimplifyCFG/CoveredLookupTable.ll | 1 + .../SimplifyCFG/ForwardSwitchConditionToPHI.ll | 3 + .../SimplifyCFG/X86/disable-lookup-table.ll | 1 + .../SimplifyCFG/X86/switch-covered-bug.ll | 2 + .../Transforms/SimplifyCFG/X86/switch-table-bug.ll | 2 + .../SimplifyCFG/X86/switch_to_lookup_table.ll | 2 +- .../SimplifyCFG/branch-fold-threshold.ll | 3 + llvm/test/Transforms/SimplifyCFG/multiple-phis.ll | 1 + llvm/test/Transforms/SimplifyCFG/no-md-sink.ll | 1 + .../SimplifyCFG/preserve-llvm-loop-metadata.ll | 1 + llvm/test/Transforms/SimplifyCFG/rangereduce.ll | 1 + .../Transforms/SimplifyCFG/sink-common-code.ll | 1 + llvm/test/Transforms/SimplifyCFG/switch_undef.ll | 1 + llvm/test/tools/llvm-readobj/basic.test | 4 +- .../tools/llvm-readobj/codeview-merging-cycle.test | 2 +- .../tools/llvm-readobj/elf-dynamic-malformed.test | 4 +- .../llvm-readobj/elf-malformed-pt-dynamic.test | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error1.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error2.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error3.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error4.s | 2 +- .../tools/llvm-readobj/elf-packed-relocs-error5.s | 2 +- llvm/test/tools/llvm-readobj/many-sections2.s | 24 ++ llvm/test/tools/llvm-readobj/mips-got.test | 4 +- llvm/test/tools/llvm-readobj/string-dump.test | 11 +- .../tools/llvm-readobj/thin-archive-paths.test | 4 +- llvm/test/tools/llvm-readobj/thin-archive.test | 2 +- llvm/test/tools/llvm-readobj/wasm-invalid.test | 2 +- llvm/tools/llvm-objdump/COFFDump.cpp | 17 +- llvm/tools/llvm-objdump/ELFDump.cpp | 19 +- llvm/tools/llvm-objdump/MachODump.cpp | 247 +++++++---- llvm/tools/llvm-objdump/WasmDump.cpp | 9 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 460 +++++++++------------ llvm/tools/llvm-objdump/llvm-objdump.h | 40 -- llvm/tools/llvm-readobj/ELFDumper.cpp | 7 +- llvm/tools/llvm-readobj/ObjDumper.cpp | 6 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 21 +- llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp | 42 ++ llvm/unittests/CodeGen/GlobalISel/CSETest.cpp | 2 +- .../DebugInfo/DWARF/DWARFDebugInfoTest.cpp | 84 ++-- llvm/unittests/Support/CMakeLists.txt | 1 + llvm/unittests/Support/CommandLineTest.cpp | 72 ++++ llvm/unittests/Support/FileCheckTest.cpp | 52 +++ llvm/utils/TableGen/CodeGenSchedule.cpp | 3 +- .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 + .../libomptarget/deviceRTLs/nvptx/src/libcall.cu | 3 +- openmp/libomptarget/deviceRTLs/nvptx/src/loop.cu | 19 +- .../libomptarget/deviceRTLs/nvptx/src/parallel.cu | 2 +- .../nvptx/test/parallel/spmd_parallel_regions.cpp | 30 ++ openmp/runtime/src/kmp.h | 102 +++-- openmp/runtime/src/z_Linux_asm.S | 173 -------- 271 files changed, 4760 insertions(+), 2951 deletions(-) create mode 100644 lld/test/COFF/Inputs/eh_frame_terminator-crtend.s create mode 100644 lld/test/COFF/Inputs/eh_frame_terminator-otherfunc.s create mode 100644 lld/test/COFF/eh_frame_terminator.s create mode 100644 lld/test/COFF/thinlto-archivecollision.ll copy lldb/packages/Python/lldbsuite/test/{api/check_public_api_headers => expressi [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/cast_int [...] create mode 100644 lldb/packages/Python/lldbsuite/test/expression_command/cast_int [...] create mode 100644 llvm/include/llvm/CodeGen/CSEConfigBase.h create mode 100644 llvm/include/llvm/Transforms/Utils/SizeOpts.h create mode 100644 llvm/lib/Transforms/Utils/SizeOpts.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/non-pow-2-extload-combine.mir create mode 100644 llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll create mode 100644 llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll create mode 100644 llvm/test/TableGen/SchedModelError.td create mode 100644 llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll create mode 100644 llvm/test/tools/llvm-readobj/many-sections2.s create mode 100644 llvm/unittests/Support/FileCheckTest.cpp create mode 100644 openmp/libomptarget/deviceRTLs/nvptx/test/parallel/spmd_paralle [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (3b275f5d475 -> 4c8e1b387a7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/gcc. from 3b275f5d475 Daily bump. adds d71996db7a9 [NDS32] Provide one valid nds32 assembly instruction to che [...] adds 39ebb01497b 2019-04-15 Dominique d'Humieres <dominiq(a)gcc.gnu.org> adds 08dfb42801b [NDS32] Rewrite PIC/TLS patterns. adds 0be984ed89d [NDS32] nds32*-*-linux* target using init_array/finit_array [...] adds 48f42cbf10f [NDS32] Refine force unwind. Linux kernel only uses RT_SIGRETURN. adds fc01d804ff1 Reorganize cgraph_node::clone_of_p adds d8c947941f4 2019-04-15 Richard Biener <rguenther(a)suse.de> adds f9fd14f18d5 combine: Count auto_inc properly (PR89794) adds a5189c16a7e 2019-04-15 Richard Biener <rguenther(a)suse.de> adds 969b7ab65f2 2019-04-15 Richard Biener <rguenther(a)suse.de> adds c5d64f62f40 PR d/90059 PR d/90060 PR d/90062 libphobos: Merge upstre [...] adds 09d943db959 * config/microblaze/microblaze.c (microblaze_expand_block_ [...] new 4c8e1b387a7 Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 9 ++ gcc/ChangeLog | 67 ++++++++++++++ gcc/DATESTAMP | 2 +- gcc/cgraph.c | 30 ++++--- gcc/combine.c | 60 +++++++++---- gcc/config.gcc | 1 + gcc/config/microblaze/microblaze.c | 12 +-- gcc/config/nds32/nds32-md-auxiliary.c | 43 ++++++--- gcc/config/nds32/nds32-protos.h | 3 + gcc/config/nds32/nds32-relax-opt.c | 19 ++-- gcc/config/nds32/nds32.md | 27 ++++++ gcc/configure | 2 +- gcc/configure.ac | 2 +- gcc/testsuite/ChangeLog | 32 +++++++ gcc/testsuite/g++.dg/ipa/pr89693.C | 52 +++++++++++ gcc/testsuite/gcc.dg/guality/pr90074.c | 31 +++++++ gcc/testsuite/gcc.dg/torture/pr88936-1.c | 27 ++++++ gcc/testsuite/gcc.dg/torture/pr88936-2.c | 22 +++++ gcc/testsuite/gcc.dg/torture/pr88936-3.c | 21 +++++ gcc/testsuite/gcc.dg/torture/pr89794.c | 24 +++++ gcc/testsuite/gcc.dg/torture/pr90020.c | 2 + gcc/testsuite/gcc.dg/torture/pr90071.c | 24 +++++ gcc/tree-loop-distribution.c | 43 +++++++-- gcc/tree-ssa-ccp.c | 25 +++--- gcc/tree-ssa-reassoc.c | 3 +- gcc/tree-ssa-structalias.c | 72 +++++++++++++++ gcc/tree.c | 18 ++-- gcc/tree.h | 1 + libgcc/ChangeLog | 6 ++ libgcc/config/nds32/linux-unwind.h | 9 +- libphobos/libdruntime/MERGE | 2 +- libphobos/libdruntime/core/sys/posix/ucontext.d | 114 ++++++++++++++++++++++-- libphobos/libdruntime/core/sys/solaris/link.d | 37 ++++---- libphobos/libdruntime/core/thread.d | 9 ++ 34 files changed, 733 insertions(+), 118 deletions(-) create mode 100644 gcc/testsuite/g++.dg/ipa/pr89693.C create mode 100644 gcc/testsuite/gcc.dg/guality/pr90074.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr88936-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr88936-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr88936-3.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr89794.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr90071.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os updated (8669f96f0d -> 02e902e1a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Os in repository toolchain/ci/binutils-gdb. from 8669f96f0d Automatic date update in version.in adds 031254f211 [binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI adds e0991585ad [GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M Mainline adds e12437dc86 [binutils, ARM, 3/16] BF insns infrastructure with new bfd_r [...] adds e2b0ab5978 [binutils, ARM, 4/16] BF insns infrastructure with array of [...] adds e5d6e09ee6 [binutils, ARM, 5/16] BF insns infrastructure with new globa [...] adds 4389b29a5a [binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline adds f1c7f42126 [binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8 [...] adds 1caf72a584 [binutils, ARM, 8/16] BFL infrastructure with new global rel [...] adds 65d1bc05e8 [binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline adds 1889da7048 [binutils, ARM, 10/16] BFCSEL infrastructure with new global [...] adds f6b2b12db8 [binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M [...] adds 60f993ce17 [binutils, ARM, 12/16] Scalar Low Overhead loop instructions [...] adds 4b5a202f10 [binutils, ARM, 13/16] Add support for CLRM adds 6b0dd09474 [opcodes, ARM, 14/16] Add mode availability to coprocessor t [...] adds efd6b3591b [binutils, ARM, 15/16] Add support for VSCCLRM adds 32c36c3ce9 [binutils, ARM, 16/16] Add support to VLDR and VSTR of syste [...] adds ccb8d7e819 AArch64: Tidy up aarch64_gdbarch_init adds 4da037ef9d AArch64 SVE: Check for vector length change when getting gdbarch adds 48574d91bf AArch64 SVE: Support changing vector lengths for ptrace adds 86333705ae Skip print-map-discarded test for non-ELF targets adds 4aa866af6b Fix AMD64 return value ABI in expression evaluation new 02e902e1a1 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 69 + bfd/archures.c | 1 + bfd/bfd-in2.h | 20 + bfd/cpu-arm.c | 1 + bfd/elf32-arm.c | 282 +++- bfd/libbfd.h | 7 + bfd/reloc.c | 32 + bfd/version.h | 2 +- binutils/ChangeLog | 4 + binutils/readelf.c | 2 +- elfcpp/ChangeLog | 12 + elfcpp/arm.h | 7 +- gas/ChangeLog | 201 +++ gas/config/tc-arm.c | 1484 ++++++++++++++++----- gas/doc/c-arm.texi | 11 + gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.d | 4 + gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l | 16 + gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s | 23 + gas/testsuite/gas/arm/archv8m_1m-cmse-main.d | 57 + gas/testsuite/gas/arm/archv8m_1m-cmse-main.s | 54 + gas/testsuite/gas/arm/armv8.1-m.main-fp-dp.d | 203 +++ gas/testsuite/gas/arm/armv8.1-m.main-fp.d | 270 ++++ gas/testsuite/gas/arm/armv8.1-m.main-hp.d | 75 ++ gas/testsuite/gas/arm/armv8_1-m-bf-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-bf-bad.l | 9 + gas/testsuite/gas/arm/armv8_1-m-bf-bad.s | 14 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l | 7 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange.d | 14 + gas/testsuite/gas/arm/armv8_1-m-bf-exchange.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bf-rel.d | 10 + gas/testsuite/gas/arm/armv8_1-m-bf-rel.s | 5 + gas/testsuite/gas/arm/armv8_1-m-bf.d | 13 + gas/testsuite/gas/arm/armv8_1-m-bf.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bfcsel.d | 12 + gas/testsuite/gas/arm/armv8_1-m-bfcsel.s | 12 + gas/testsuite/gas/arm/armv8_1-m-bfl-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-bfl-bad.l | 9 + gas/testsuite/gas/arm/armv8_1-m-bfl-bad.s | 14 + gas/testsuite/gas/arm/armv8_1-m-bfl-rel.d | 10 + gas/testsuite/gas/arm/armv8_1-m-bfl-rel.s | 5 + gas/testsuite/gas/arm/armv8_1-m-bfl.d | 13 + gas/testsuite/gas/arm/armv8_1-m-bfl.s | 12 + gas/testsuite/gas/arm/armv8_1-m-loloop-bad.d | 4 + gas/testsuite/gas/arm/armv8_1-m-loloop-bad.l | 7 + gas/testsuite/gas/arm/armv8_1-m-loloop-bad.s | 12 + gas/testsuite/gas/arm/armv8_1-m-loloop.d | 17 + gas/testsuite/gas/arm/armv8_1-m-loloop.s | 14 + gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d | 13 + gdb/ChangeLog | 27 + gdb/aarch64-linux-nat.c | 36 + gdb/aarch64-tdep.c | 92 +- gdb/amd64-tdep.c | 44 +- gdb/nat/aarch64-sve-linux-ptrace.c | 92 +- gdb/nat/aarch64-sve-linux-ptrace.h | 12 +- gdb/testsuite/ChangeLog | 5 + gdb/testsuite/gdb.arch/amd64-eval.cc | 120 ++ gdb/testsuite/gdb.arch/amd64-eval.exp | 43 + include/ChangeLog | 21 + include/elf/arm.h | 6 +- include/opcode/arm.h | 6 + ld/ChangeLog | 29 + ld/testsuite/ld-arm/arm-elf.exp | 10 + ld/testsuite/ld-arm/attr-merge-13.attr | 6 + ld/testsuite/ld-arm/attr-merge-13a.s | 5 + ld/testsuite/ld-arm/attr-merge-13b.s | 5 + ld/testsuite/ld-arm/bf.d | 14 + ld/testsuite/ld-arm/bf.s | 19 + ld/testsuite/ld-arm/bfcsel.d | 18 + ld/testsuite/ld-arm/bfcsel.s | 25 + ld/testsuite/ld-arm/bfl.d | 14 + ld/testsuite/ld-arm/bfl.s | 19 + ld/testsuite/ld-gc/gc.exp | 4 +- opcodes/ChangeLog | 73 + opcodes/arm-dis.c | 1070 +++++++++------ 76 files changed, 4031 insertions(+), 895 deletions(-) create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.d create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main.d create mode 100644 gas/testsuite/gas/arm/archv8m_1m-cmse-main.s create mode 100644 gas/testsuite/gas/arm/armv8.1-m.main-fp-dp.d create mode 100644 gas/testsuite/gas/arm/armv8.1-m.main-fp.d create mode 100644 gas/testsuite/gas/arm/armv8.1-m.main-hp.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-exchange.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-rel.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf-rel.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bf.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfcsel.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfcsel.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-rel.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl-rel.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-bfl.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop-bad.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop-bad.l create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop-bad.s create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop.d create mode 100644 gas/testsuite/gas/arm/armv8_1-m-loloop.s create mode 100644 gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d create mode 100644 gdb/testsuite/gdb.arch/amd64-eval.cc create mode 100644 gdb/testsuite/gdb.arch/amd64-eval.exp create mode 100644 ld/testsuite/ld-arm/attr-merge-13.attr create mode 100644 ld/testsuite/ld-arm/attr-merge-13a.s create mode 100644 ld/testsuite/ld-arm/attr-merge-13b.s create mode 100644 ld/testsuite/ld-arm/bf.d create mode 100644 ld/testsuite/ld-arm/bf.s create mode 100644 ld/testsuite/ld-arm/bfcsel.d create mode 100644 ld/testsuite/ld-arm/bfcsel.s create mode 100644 ld/testsuite/ld-arm/bfl.d create mode 100644 ld/testsuite/ld-arm/bfl.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

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