Tcwg-commits April 2019

tcwg-commits@lists.linaro.org

5 participants
16351 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (83a89406f01 -> 19ab4f2bf73)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/gcc. from 83a89406f01 Daily bump. adds 19ab4f2bf73 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (3df7eb8798 -> 61096c8e82)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/binutils-gdb. from 3df7eb8798 Automatic date update in version.in adds 61096c8e82 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (107238d1 -> a9a1a13a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 107238d1 0: update: binutils-gcc-linux: boot new a9a1a13a 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (107238d1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 178 +- 03-build_abe-binutils/console.log | 10311 +++++++-------- 04-build_abe-stage1/console.log | 12940 +++++++++---------- 05-build_linux/console.log | 592 +- 06-boot_linux/console.log | 4 +- console.log | 24159 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 8 files changed, 24168 insertions(+), 24158 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (085b7755808a -> 7142eaa58b49)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from 085b7755808a Linux 5.1-rc6 adds 1bfb97b9a519 MAINTAINERS: BMIPS: Add internal Broadcom mailing list adds 79b4a9cf0e2e MIPS: scall64-o32: Fix indirect syscall number load adds a1e8783db8e0 MIPS: perf: ath79: Fix perfcount IRQ assignment adds 7142eaa58b49 Merge tag 'mips_fixes_5.1_3' of git://git.kernel.org/pub/s [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 + arch/mips/ath79/setup.c | 6 ------ arch/mips/kernel/scall64-o32.S | 2 +- drivers/irqchip/irq-ath79-misc.c | 11 +++++++++++ 4 files changed, 13 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (25895ad2836 -> 7aa4dc9458a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project. from 25895ad2836 Merging r356924: adds 79c29c6b53c Merging r355854: adds aaac4e0ac6e Merging r354672: adds 1cef8c24333 Merging r356198: adds 257c01056b2 Merging r354808: adds 25b6e82d72b Merging r354882: adds 047302e0421 Merging r355825: adds 1ff9bed8858 Merging r356039: adds 7aa4dc9458a Merging r357506: No new revisions were added by this update. Summary of changes: clang/lib/CodeGen/CGStmtOpenMP.cpp | 5 +- clang/lib/Driver/ToolChains/Linux.cpp | 33 +- clang/lib/Sema/SemaOpenMP.cpp | 3 +- clang/test/Driver/linux-ld.c | 10 + clang/test/OpenMP/ordered_doacross_codegen.cpp | 13 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 6 + .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 7 +- llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td | 4 +- llvm/lib/Target/Mips/MicroMipsInstrFPU.td | 5 + llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 3 +- llvm/lib/Target/Mips/MipsDSPInstrInfo.td | 4 +- llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp | 1 + llvm/lib/Target/Mips/MipsFastISel.cpp | 35 +- llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 3 + llvm/test/CodeGen/Mips/Fast-ISel/icmpbr1.ll | 3 +- llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll | 23 + llvm/test/CodeGen/Mips/abiflags32.ll | 8 + llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll | 418 +++++++++++ .../CodeGen/Mips/micromips-pseudo-mtlohi-expand.ll | 63 ++ llvm/test/CodeGen/Mips/pseudo-jump-fill.ll | 68 ++ llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 805 +++++++++++++++++++++ 21 files changed, 1484 insertions(+), 36 deletions(-) create mode 100644 llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll create mode 100644 llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll create mode 100644 llvm/test/CodeGen/Mips/micromips-pseudo-mtlohi-expand.ll create mode 100644 llvm/test/CodeGen/Mips/pseudo-jump-fill.ll create mode 100644 llvm/test/CodeGen/X86/regalloc-copy-hints.mir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (f2e744fe -> e8f24de4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards f2e744fe 0: update: llvm-linux: boot new e8f24de4 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f2e744fe) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 11610 ++++++++++++++++++------------------ 03-build_linux/console.log | 604 +- console.log | 12342 ++++++++++++++++++++------------------- jenkins/manifest.sh | 14 +- 5 files changed, 12425 insertions(+), 12273 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (806052b6943 -> c8d498d36b6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 806052b6943 [APSInt][OpenMP] Fix isNegative, etc. for unsigned types new b6a93dc59cd [AArch64][GlobalISel] Add G_FMA to isPreISelGenericFloating [...] new c8d498d36b6 [AliasAnalysis] AAResults preserves AAManager. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/Analysis/AliasAnalysis.h | 6 +++ lib/Analysis/AliasAnalysis.cpp | 10 ++-- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 1 + .../MemoryDependenceAnalysis/invalidation.ll | 7 ++- test/CodeGen/AArch64/GlobalISel/regbank-fma.mir | 57 ++++++++++++++++++++++ test/Other/new-pass-manager.ll | 2 - .../Transforms/Scalar/LoopPassManagerTest.cpp | 1 - 7 files changed, 71 insertions(+), 13 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/regbank-fma.mir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig updated (25895ad2836 -> 7aa4dc9458a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 25895ad2836 Merging r356924: adds 79c29c6b53c Merging r355854: adds aaac4e0ac6e Merging r354672: adds 1cef8c24333 Merging r356198: adds 257c01056b2 Merging r354808: adds 25b6e82d72b Merging r354882: adds 047302e0421 Merging r355825: adds 1ff9bed8858 Merging r356039: adds 7aa4dc9458a Merging r357506: No new revisions were added by this update. Summary of changes: clang/lib/CodeGen/CGStmtOpenMP.cpp | 5 +- clang/lib/Driver/ToolChains/Linux.cpp | 33 +- clang/lib/Sema/SemaOpenMP.cpp | 3 +- clang/test/Driver/linux-ld.c | 10 + clang/test/OpenMP/ordered_doacross_codegen.cpp | 13 +- llvm/lib/CodeGen/TargetRegisterInfo.cpp | 6 + .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 7 +- llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td | 4 +- llvm/lib/Target/Mips/MicroMipsInstrFPU.td | 5 + llvm/lib/Target/Mips/MipsAsmPrinter.cpp | 3 +- llvm/lib/Target/Mips/MipsDSPInstrInfo.td | 4 +- llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp | 1 + llvm/lib/Target/Mips/MipsFastISel.cpp | 35 +- llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 3 + llvm/test/CodeGen/Mips/Fast-ISel/icmpbr1.ll | 3 +- llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll | 23 + llvm/test/CodeGen/Mips/abiflags32.ll | 8 + llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll | 418 +++++++++++ .../CodeGen/Mips/micromips-pseudo-mtlohi-expand.ll | 63 ++ llvm/test/CodeGen/Mips/pseudo-jump-fill.ll | 68 ++ llvm/test/CodeGen/X86/regalloc-copy-hints.mir | 805 +++++++++++++++++++++ 21 files changed, 1484 insertions(+), 36 deletions(-) create mode 100644 llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll create mode 100644 llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll create mode 100644 llvm/test/CodeGen/Mips/micromips-pseudo-mtlohi-expand.ll create mode 100644 llvm/test/CodeGen/Mips/pseudo-jump-fill.ll create mode 100644 llvm/test/CodeGen/X86/regalloc-copy-hints.mir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig updated (38aa191a -> 8c16d82e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 38aa191a 0: update: llvm-linux: all new 8c16d82e 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (38aa191a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-build_llvm/console.log | 11344 ++++++++++++++++++------------------ 03-build_linux/console.log | 626 +- 04-boot_linux/console.log | 2 +- console.log | 12138 ++++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 6 files changed, 12239 insertions(+), 12047 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (01f8d556aa7 -> 3234887fe2e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from 01f8d556aa7 [PGO/SamplePGO][NFC] Move the function updateProfWeight fro [...] adds 37104d7189c [LPM/BPI] Preserve BPI through trivial loop pass pipeline ( [...] adds 5de5d74c8dc [OPENMP][NVPTX] Fix the test, NFC. adds e90d5c8db06 [IPSCCP] Add missing `AssumptionCacheTracker` dependency adds a282bde69e3 [ASTMatchers] Introduce Objective-C matchers `isClassMessag [...] adds 8f470890344 [Tests] Add a negative test for masked.gather part of D59703 adds f01583d0975 [Tests] Revise a test as requested by reviewer in D59703 adds e3f7074c7e9 [libc++][test] Update some wstring_convert tests for MSVC quirks adds f84ce75cd1c AMDGPU: Skip debug instructions in assert adds 2b744665308 Use const DebugLoc& adds 87e7f895bb2 Use correct way to test for MIPS arch after rOMP355687 adds 5828421c7cd gn build: Merge r358869 adds d8d9b7b20e7 [InstSimplify] Move masked.gather w/no active lanes handlin [...] adds 2eea99a4b98 [Support] unflake TempFileCollisions test adds e9a2d1c3921 [libcxx] Update gen_link_script.py to support different inp [...] adds 32176baee78 [Reproducers] Fix lifetime issue adds 906b2642517 [VerifyDiagnosticConsumer] Document -verify=<prefixes> in doxygen adds 2a27af82379 [EditLineTest] Not always TERM is available, e.g. on some bots. adds d748689c7f7 [InstCombine] Eliminate stores to constant memory adds 0d809aa2184 [dsymutil] Collect parseable Swift interfaces in the .dSYM bundle. adds 389d5a3474e [AMDGPU] Fix an issue in `op_sel_hi` skipping. adds a6314ea6c25 Rename C++ TestGlobalVariables.py to have a distinct name f [...] adds 16df7e086b6 Relax test to check for a valid number instead of a specifi [...] adds e495ec23fe4 Try to work around compile errors with older versions of GCC. adds d44a7be17b6 [Docs] Move API docs to the front page adds a38b8c8abce Fix a bug in my change to ModulesDidLoad in r357955. In the [...] adds bf8aacb7151 [SelectionDAG] move splat util functions up from x86 lowering adds 68602ab2f35 DebugInfo: Emit only one kind of accelerated access/name table adds e181de7f4fe [c++2a] Implement semantic restrictions for 'export' declarations. adds 05aad1567be Fully qualify llvm::Optional, some compilers complain otherwise. adds fbcce9fe9dc [CMake] Replace the sanitizer support in runtimes build wit [...] adds c86011f5bc3 [libc++abi] Don't use a .sh.cpp test for uncaught_exception adds 9270a201b9d Add a small check to PlatformDarwin::LoadScriptingResourceF [...] adds 759805fd8a6 One small tweak to LocateExecutableScriptingResources - I w [...] adds bbddf21f900 Revert "Use const DebugLoc&" adds ab66e34c637 add Qiu Chaofan (qiucf(a)cn.ibm.com) to the CREDITS.txt adds 32c0ebe6157 Use llvm::stable_sort adds 8c6119a4427 [analyzer] PR41269: Add a bit of C++ smart pointer modeling. adds e2a8e431605 [analyzer] PR41335: Fix crash when no-store event is in a b [...] adds 727d6ca3f0a [analyzer] Unbreak body farms in presence of multiple decla [...] adds 9da81421b8d [WebAssembly] Bail out of fastisel earlier when computing P [...] adds 19828e399b3 [PowerPC] [Clang] Port MMX intrinsics and basic test cases [...] adds d986e41fe49 [PPC64] Allow R_PPC64_DTPREL* to preemptable local-dynamic symbols adds 54976e76e67 [Analyzer] Instead of recording comparisons in interator ch [...] adds fb2783f6805 [PowerPC] Fix test with -fno-discard-value-names after rC358949 adds 8f8827014d6 [Analyzer] Fix for previous commit adds ed4f48d290e yamlify TestMiniDumpUUID binaries adds 63a2aa715ad [LSR] Limit the recursion for setup cost adds 7a784203535 UnwindPlan: pretty-print dwarf expressions adds b9ed9cb5d7e [llvm-mc] - Properly set the the address align field of the [...] adds 545f621a7c7 [LLD][ELF] - Update test case after llvm-mc change. adds 2619f399f99 [ARM][FIX] Add missing f16.lane.vldN/vstN lowering adds 1cdc3dbc589 [AArch64] Add support for MTE intrinsics adds 2359429168a FuncUnwinders: remove "current_offset" from function arguments adds f97b29be884 [DAGCombiner] Combine OR as ADD when no common bits are set adds b7dc13f4c02 [LLD][ELF] - Remove multiple-eh-relocs.elf binary from the [...] adds 330bc8af131 modify-python-lldb: Remove \a-removing code adds 850361f6c1d [analyzer][CrossTU] Extend CTU to VarDecls with initializer adds e7a68fd93e8 Fix MSVC "32-bit shift implicitly converted to 64 bits" war [...] adds ddd225d1a92 Fix MSVC "32-bit shift implicitly converted to 64 bits" war [...] adds d2e2e20de36 [Analyzer] Second fix for last commit for IteratorChecker adds 6684a351ed4 [LLD][ELF] - Fix mips-invalid-options-descriptor.s test cas [...] adds 6b1825081dc Fix "-Wimplicit-fallthrough" warning. NFCI. adds 2f9eed62653 [ARM] Don't replicate instructions in Ifcvt at minsize adds 003c18a39c7 [PPC][PPC64] Improve some llvm-objdump -d -D tests adds 4eda12aea51 Move postfix expression code out of the NativePDB plugin adds c519d3c4039 [ARM] Update check for CBZ in Ifcvt adds 61ef9193aa7 Removing the explicit specifier from some default construct [...] adds 98c858a23be [ELF] Change findOrphanPos to only consider live sections adds 2769d58628f [LLD][COFF] Fix /linkrepro with output options that take a [...] adds ccba42c7eb3 [ELF] Change default output section type to SHT_PROGBITS adds 652168a99b5 [CallSite removal] move InlineCost to CallBase usage adds 7edae4c4038 AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies adds 06ff5eae5b4 [DAGCombiner] generalize binop-of-splats scalarization adds 95203efc1ac [LLD][ELF] - Remove file-class.a binary from inputs and imp [...] adds a6be919c929 [Docs] ReleaseNotes: fixup markup in memcmp()->bcmp() entry adds 6af366be8ad ARM: disallow add/sub to sp unless Rn is also sp. adds d524fe5b3a0 [libc++] Remove redundant conditionals for Apple platforms adds 0e4992ce27b [X86] Pull out collectConcatOps helper. NFCI. adds bb2079b7e13 [LLD][ELF] - Remove dynamic-section-sh_size.elf binary, con [...] adds d7a748a71b1 gn build: Merge r358949 adds 3eed961973d [AMDGPU] Fix hidden argument metadata duplication for V3 adds 9fc422830a9 gn build: Merge r358944 adds df3cb477a31 [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers adds 99cf58339fc [WebAssembly] Fix typo in relocation checking adds efd94c56bad Use llvm::stable_sort adds a2470a46531 Revert "DebugInfo: Emit only one kind of accelerated access [...] adds 6e7cc49d5cb [SPARC] Use the correct register set for the "r" asm constraint. adds 12a561fa1b7 [x86] use psubus for more vsetcc lowering (PR39859) adds 2ce017026af [InstCombine] Convert a masked.load of a dereferenceable ad [...] adds 03e906d9d59 [dsymutil] Fix use-after-free when sys::path::append grows [...] adds c7bde29cfeb Revert "[dsymutil] Fix use-after-free when sys::path::appen [...] adds 53bd7ce42ed [dsymutil] Fix use-after-free when sys::path::append grows [...] adds 056fde75271 [Docs] Add 301 redirects for old URLs adds 3ba5f66177a [Docs] Add missing leading slash adds 171b74e31c7 [x86] add tests for vector fdiv with splat divisor; NFC adds e8f21b1a6b0 llvm-undname: Support demangling the spaceship operator new 7c0bd5a27c5 [x86] fix test checks for fdiv combine; NFC new 27df4092036 MS ABI: Support mangling op<=> now that MSVC 2019 has a mangling new 2351d6102f3 [dsymutil] Put Swift interface files into a per-arch subdirectory. new bdb864a5762 Revert "[EditLineTest] Not always TERM is available, e.g. o [...] new 3234887fe2e [APSInt][OpenMP] Fix isNegative, etc. for unsigned types The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang/cmake/caches/Fuchsia-stage2.cmake | 14 +- clang/docs/LibASTMatchersReference.html | 39 +- clang/include/clang/AST/Decl.h | 4 +- clang/include/clang/AST/DeclBase.h | 4 - clang/include/clang/ASTMatchers/ASTMatchers.h | 51 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 19 + clang/include/clang/CrossTU/CrossTranslationUnit.h | 43 +- .../clang/Frontend/VerifyDiagnosticConsumer.h | 28 +- clang/include/clang/Sema/Sema.h | 3 + .../clang/StaticAnalyzer/Checkers/Checkers.td | 4 + .../Core/BugReporter/PathDiagnostic.h | 4 +- clang/lib/AST/DeclBase.cpp | 16 - clang/lib/AST/MicrosoftMangle.cpp | 11 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 3 + clang/lib/Analysis/BodyFarm.cpp | 2 - clang/lib/CrossTU/CrossTranslationUnit.cpp | 133 +- clang/lib/Driver/CMakeLists.txt | 1 + clang/lib/Driver/Driver.cpp | 6 + clang/lib/Driver/ToolChains/PPCLinux.cpp | 31 + clang/lib/Driver/ToolChains/PPCLinux.h | 33 + clang/lib/Headers/CMakeLists.txt | 6 +- clang/lib/Headers/ppc_wrappers/mmintrin.h | 1457 ++++++++++++++++++++ clang/lib/Parse/ParseDeclCXX.cpp | 3 +- clang/lib/Sema/SemaDeclCXX.cpp | 3 + clang/lib/Sema/SemaModule.cpp | 167 ++- clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt | 1 + .../StaticAnalyzer/Checkers/IteratorChecker.cpp | 384 ++---- clang/lib/StaticAnalyzer/Checkers/Move.h | 30 + clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp | 12 + .../StaticAnalyzer/Checkers/SmartPtrModeling.cpp | 74 + .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 16 +- clang/lib/StaticAnalyzer/Core/RegionStore.cpp | 6 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 29 + clang/test/Analysis/Inputs/ctu-other.cpp | 38 + .../Inputs/ctu-other.cpp.externalDefMap.txt | 10 + .../Analysis/Inputs/system-header-simulator-cxx.h | 1 + clang/test/Analysis/OSAtomic_mac.c | 27 + clang/test/Analysis/ctu-main.cpp | 50 + clang/test/Analysis/func-mapping-test.cpp | 40 +- clang/test/Analysis/redecl.c | 13 + clang/test/Analysis/smart-ptr.cpp | 18 + clang/test/Analysis/use-after-move.cpp | 26 +- .../CXX/module/module.interface/Inputs/header.h | 3 + clang/test/CXX/module/module.interface/p1.cpp | 8 +- clang/test/CXX/module/module.interface/p2.cpp | 94 ++ clang/test/CXX/module/module.interface/p3.cpp | 54 + clang/test/CXX/module/module.interface/p5.cpp | 89 ++ .../modules-ts/basic/basic.def.odr/p4/module.cpp | 2 - .../modules-ts/basic/basic.def.odr/p4/module.cppm | 16 - .../CXX/modules-ts/basic/basic.def.odr/p4/user.cpp | 2 - clang/test/CodeGen/alloc-size.c | 9 + clang/test/CodeGen/ppc-mmintrin.c | 60 + .../test/CodeGenCXX/cxx2a-three-way-comparison.cpp | 8 +- clang/test/Headers/ppc-intrinsics.c | 13 + clang/test/OpenMP/distribute_collapse_messages.cpp | 4 +- .../distribute_parallel_for_collapse_messages.cpp | 4 +- ...tribute_parallel_for_simd_collapse_messages.cpp | 4 +- ...stribute_parallel_for_simd_safelen_messages.cpp | 14 +- ...stribute_parallel_for_simd_simdlen_messages.cpp | 14 +- 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.../OpenMP/target_parallel_for_map_messages.cpp | 4 + .../target_parallel_for_ordered_messages.cpp | 4 +- .../target_parallel_for_simd_collapse_messages.cpp | 4 +- .../target_parallel_for_simd_map_messages.cpp | 4 + .../target_parallel_for_simd_ordered_messages.cpp | 4 +- .../target_parallel_for_simd_safelen_messages.cpp | 4 +- .../target_parallel_for_simd_simdlen_messages.cpp | 4 +- clang/test/OpenMP/target_parallel_map_messages.cpp | 4 + .../test/OpenMP/target_simd_collapse_messages.cpp | 4 +- clang/test/OpenMP/target_simd_safelen_messages.cpp | 4 +- clang/test/OpenMP/target_simd_simdlen_messages.cpp | 4 +- .../target_teams_distribute_collapse_messages.cpp | 4 +- .../target_teams_distribute_map_messages.cpp | 4 + ...s_distribute_parallel_for_collapse_messages.cpp | 4 +- ..._teams_distribute_parallel_for_map_messages.cpp | 4 + ...tribute_parallel_for_simd_collapse_messages.cpp | 4 +- ...s_distribute_parallel_for_simd_map_messages.cpp | 4 + ...stribute_parallel_for_simd_safelen_messages.cpp | 14 +- ...stribute_parallel_for_simd_simdlen_messages.cpp | 14 +- ...get_teams_distribute_simd_collapse_messages.cpp | 4 +- .../target_teams_distribute_simd_map_messages.cpp | 4 + ...rget_teams_distribute_simd_safelen_messages.cpp | 14 +- ...rget_teams_distribute_simd_simdlen_messages.cpp | 14 +- clang/test/OpenMP/target_teams_map_messages.cpp | 2 + clang/test/OpenMP/taskloop_collapse_messages.cpp | 4 +- .../OpenMP/taskloop_simd_collapse_messages.cpp | 4 +- .../test/OpenMP/taskloop_simd_safelen_messages.cpp | 4 +- .../test/OpenMP/taskloop_simd_simdlen_messages.cpp | 4 +- .../OpenMP/teams_distribute_collapse_messages.cpp | 4 +- ...s_distribute_parallel_for_collapse_messages.cpp | 4 +- ...tribute_parallel_for_simd_collapse_messages.cpp | 4 +- ...stribute_parallel_for_simd_safelen_messages.cpp | 14 +- ...stribute_parallel_for_simd_simdlen_messages.cpp | 14 +- .../teams_distribute_simd_collapse_messages.cpp | 4 +- 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lld/ELF/InputSection.cpp | 3 +- lld/ELF/LinkerScript.cpp | 4 +- lld/ELF/MapFile.cpp | 6 +- lld/ELF/OutputSections.cpp | 9 +- lld/ELF/Relocations.cpp | 19 +- lld/ELF/SyntheticSections.cpp | 15 +- lld/ELF/Writer.cpp | 23 +- lld/lib/ReaderWriter/MachO/MachOLinkingContext.cpp | 9 +- lld/test/COFF/linkrepro-pdb.test | 15 +- lld/test/ELF/compressed-debug-input.s | 2 +- .../ELF/invalid/Inputs/dynamic-section-sh_size.elf | Bin 482 -> 0 bytes lld/test/ELF/invalid/Inputs/file-class.a | Bin 156 -> 0 bytes .../Inputs/mips-invalid-options-descriptor.elf | Bin 480 -> 0 bytes lld/test/ELF/invalid/Inputs/multiple-eh-relocs.elf | Bin 784 -> 0 bytes lld/test/ELF/invalid/dynamic-section-broken.test | 36 + lld/test/ELF/invalid/dynamic-section-size.s | 4 - lld/test/ELF/invalid/invalid-elf.test | 8 - lld/test/ELF/invalid/invalid-file-class.test | 19 + .../ELF/invalid/mips-invalid-options-descriptor.s | 5 - .../invalid/mips-invalid-options-descriptor.test | 21 + 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lld/test/ELF/ppc64-toc-restore.s | 32 +- lld/test/ELF/ppc64-weak-undef-call.s | 10 +- lld/test/wasm/pie.ll | 53 + lld/wasm/InputFiles.cpp | 4 +- lld/wasm/Writer.cpp | 8 +- lldb/docs/.htaccess | 7 + lldb/docs/conf.py | 1 + lldb/docs/index.rst | 7 + lldb/docs/resources/external.rst | 6 - lldb/include/lldb/Symbol/DWARFCallFrameInfo.h | 16 +- lldb/include/lldb/Symbol/FuncUnwinders.h | 30 +- lldb/include/lldb/Symbol/PostfixExpression.h | 179 +++ lldb/include/lldb/Utility/RangeMap.h | 1 + lldb/include/lldb/Utility/Reproducer.h | 2 + lldb/lit/Unwind/Inputs/eh-frame-small-fde.s | 48 + lldb/lit/Unwind/Inputs/unwind-plan-dwarf-dump.s | 13 + lldb/lit/Unwind/eh-frame-small-fde.test | 22 + lldb/lit/Unwind/unwind-plan-dwarf-dump.test | 14 + .../postmortem/minidump-new/TestMiniDumpUUID.py | 50 +- .../minidump-new/linux-arm-partial-uuids-match.dmp | Bin 403 -> 0 bytes .../linux-arm-partial-uuids-match.yaml | 15 + .../linux-arm-partial-uuids-mismatch.dmp | Bin 409 -> 0 bytes .../linux-arm-partial-uuids-mismatch.yaml | 15 + .../linux-arm-uuids-elf-build-id-16.dmp | Bin 460 -> 0 bytes .../linux-arm-uuids-elf-build-id-16.yaml | 19 + .../linux-arm-uuids-elf-build-id-20.dmp | Bin 468 -> 0 bytes .../linux-arm-uuids-elf-build-id-20.yaml | 19 + .../linux-arm-uuids-elf-build-id-zero.dmp | Bin 492 -> 0 bytes .../linux-arm-uuids-elf-build-id-zero.yaml | 19 + .../minidump-new/linux-arm-uuids-no-age.dmp | Bin 470 -> 0 bytes .../minidump-new/linux-arm-uuids-no-age.yaml | 19 + .../minidump-new/linux-arm-uuids-with-age.dmp | Bin 470 -> 0 bytes .../minidump-new/linux-arm-uuids-with-age.yaml | 19 + .../minidump-new/linux-arm-zero-uuids.dmp | Bin 534 -> 0 bytes .../minidump-new/linux-arm-zero-uuids.yaml | 21 + .../minidump-new/macos-arm-uuids-no-age.dmp | Bin 470 -> 0 bytes .../minidump-new/macos-arm-uuids-no-age.yaml | 21 + ...lobalVariables.py => TestCPPGlobalVariables.py} | 0 lldb/scripts/Python/modify-python-lldb.py | 4 - lldb/scripts/interface/SBCompileUnit.i | 4 +- lldb/scripts/interface/SBModule.i | 6 +- lldb/scripts/interface/SBTarget.i | 20 +- lldb/scripts/interface/SBValue.i | 8 +- lldb/source/Commands/CommandObjectTarget.cpp | 18 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 9 +- .../Process/Utility/RegisterContextLLDB.cpp | 26 +- .../NativePDB/PdbFPOProgramToDWARFExpression.cpp | 300 +--- lldb/source/Symbol/DWARFCallFrameInfo.cpp | 39 +- lldb/source/Symbol/FuncUnwinders.cpp | 78 +- lldb/source/Symbol/UnwindPlan.cpp | 39 +- lldb/source/Target/Target.cpp | 8 +- lldb/source/Utility/Reproducer.cpp | 2 - llvm/CREDITS.TXT | 4 + llvm/docs/ReleaseNotes.rst | 8 +- llvm/include/llvm/ADT/APSInt.h | 18 + llvm/include/llvm/Analysis/InlineCost.h | 8 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 7 + llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 4 + llvm/include/llvm/DebugInfo/DWARF/DWARFFormValue.h | 13 + .../include/llvm/Demangle/MicrosoftDemangleNodes.h | 4 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 17 + llvm/include/llvm/ProfileData/GCOV.h | 6 - llvm/include/llvm/ProfileData/SampleProf.h | 7 +- llvm/include/llvm/Support/JSON.h | 4 +- llvm/lib/Analysis/InlineCost.cpp | 193 ++- llvm/lib/Analysis/InstructionSimplify.cpp | 3 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 7 +- llvm/lib/Analysis/ScalarEvolution.cpp | 9 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 15 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 25 +- llvm/lib/CodeGen/GlobalMerge.cpp | 20 +- llvm/lib/CodeGen/IfConversion.cpp | 2 +- llvm/lib/CodeGen/MachineBlockPlacement.cpp | 19 +- llvm/lib/CodeGen/MachineOutliner.cpp | 9 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 2 +- llvm/lib/CodeGen/MachineSink.cpp | 5 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 140 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 52 + llvm/lib/CodeGen/StackColoring.cpp | 9 +- llvm/lib/CodeGen/StackSlotColoring.cpp | 4 +- llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp | 3 +- llvm/lib/Demangle/MicrosoftDemangle.cpp | 5 +- llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 5 +- llvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp | 4 +- llvm/lib/IR/MDBuilder.cpp | 4 +- llvm/lib/IR/Metadata.cpp | 5 +- llvm/lib/MC/ELFObjectWriter.cpp | 8 +- llvm/lib/MC/MCDwarf.cpp | 9 +- llvm/lib/MC/WasmObjectWriter.cpp | 5 +- .../ProfileData/Coverage/CoverageMappingWriter.cpp | 17 +- llvm/lib/ProfileData/GCOV.cpp | 8 +- llvm/lib/ProfileData/SampleProfWriter.cpp | 5 +- llvm/lib/Support/Statistic.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 63 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 5 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 16 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 16 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 30 - llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 9 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 23 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 9 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 67 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 10 + llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 34 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 14 + .../Target/ARM/Disassembler/ARMDisassembler.cpp | 14 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 6 + .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 2 + .../RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp | 4 + .../Target/RISCV/MCTargetDesc/RISCVFixupKinds.h | 6 + .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 6 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 13 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h | 2 + llvm/lib/Target/Sparc/SparcISelLowering.cpp | 2 + .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 17 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 159 +-- llvm/lib/Transforms/IPO/InlineSimple.cpp | 6 +- llvm/lib/Transforms/IPO/Inliner.cpp | 5 +- llvm/lib/Transforms/IPO/LowerTypeTests.cpp | 17 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 2 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 13 +- llvm/lib/Transforms/IPO/SCCP.cpp | 1 + llvm/lib/Transforms/IPO/SampleProfile.cpp | 5 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 41 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 6 + llvm/lib/Transforms/Instrumentation/CFGMST.h | 9 +- .../Instrumentation/ControlHeightReduction.cpp | 2 +- .../Instrumentation/MaximumSpanningTree.h | 3 +- llvm/lib/Transforms/Scalar/ConstantHoisting.cpp | 4 +- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 2 +- llvm/lib/Transforms/Scalar/GVNSink.cpp | 5 +- llvm/lib/Transforms/Scalar/LoopSink.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 25 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 8 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 7 +- llvm/lib/Transforms/Utils/ASanStackFrameLayout.cpp | 2 +- llvm/lib/Transforms/Utils/LCSSA.cpp | 5 + llvm/lib/Transforms/Utils/LoopSimplify.cpp | 8 + llvm/lib/Transforms/Utils/PredicateInfo.cpp | 2 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 10 +- llvm/lib/XRay/Trace.cpp | 7 +- llvm/runtimes/CMakeLists.txt | 42 +- .../GlobalISel/legalizer-info-validation.mir | 2 +- llvm/test/CodeGen/AArch64/arm64-mte.ll | 497 +++++++ .../CodeGen/AMDGPU/branch-relaxation-debug-info.ll | 56 + llvm/test/CodeGen/AMDGPU/calling-conventions.ll | 6 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 54 +- ...nel-v3.ll => hsa-metadata-enqueue-kernel-v3.ll} | 22 +- .../AMDGPU/hsa-metadata-from-llvm-ir-full-v3.ll | 337 +++-- .../AMDGPU/hsa-metadata-from-llvm-ir-full.ll | 14 +- .../CodeGen/AMDGPU/hsa-metadata-hidden-args-v3.ll | 236 +++- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll | 7 + llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir | 33 + llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 22 +- llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll | 3 +- .../CodeGen/ARM/armv8.2a-fp16-vector-intrinsics.ll | 112 ++ llvm/test/CodeGen/Hexagon/subi-asl.ll | 5 +- llvm/test/CodeGen/Hexagon/swp-carried-1.ll | 2 +- llvm/test/CodeGen/SPARC/reg64.ll | 10 + llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir | 179 +++ llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 92 ++ llvm/test/CodeGen/X86/fdiv-combine-vec.ll | 105 ++ llvm/test/CodeGen/X86/scalarize-fp.ll | 42 +- llvm/test/CodeGen/X86/scheduler-backtracking.ll | 221 +-- llvm/test/CodeGen/X86/signbit-shift.ll | 5 +- llvm/test/CodeGen/X86/split-store.ll | 7 +- llvm/test/CodeGen/X86/vec_setcc-2.ll | 13 +- llvm/test/CodeGen/X86/vector-rotate-256.ll | 10 +- llvm/test/CodeGen/X86/vector-rotate-512.ll | 16 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 16 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 16 +- llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 16 +- llvm/test/Demangle/ms-cxx20.test | 9 + llvm/test/MC/ARM/invalid-addsub.s | 20 + llvm/test/MC/Disassembler/ARM/invalid-thumbv7.txt | 31 + llvm/test/MC/ELF/compression.s | 18 +- llvm/test/MC/RISCV/relocations.s | 32 + llvm/test/MC/RISCV/rv32i-invalid.s | 12 +- llvm/test/Other/opt-O2-pipeline.ll | 1 - llvm/test/Other/opt-O3-pipeline.ll | 1 - llvm/test/Other/opt-Os-pipeline.ll | 1 - .../Transforms/InstCombine/masked_intrinsics.ll | 42 +- llvm/test/Transforms/InstCombine/memcpy.ll | 1 - llvm/test/Transforms/InstCombine/memmove.ll | 1 - llvm/test/Transforms/InstCombine/memset.ll | 1 - llvm/test/Transforms/InstCombine/store.ll | 1 - .../LoopStrengthReduce/gnarly-setupcost.ll | 93 ++ .../LoopStrengthReduce/two-combinations-bug.ll | 2 +- llvm/test/tools/dsymutil/Inputs/swift-interface.ll | 34 + llvm/test/tools/dsymutil/X86/swift-interface.test | 23 + llvm/tools/dsymutil/CompileUnit.cpp | 8 + llvm/tools/dsymutil/CompileUnit.h | 5 + llvm/tools/dsymutil/DwarfLinker.cpp | 143 +- llvm/tools/dsymutil/DwarfLinker.h | 10 +- llvm/tools/dsymutil/LinkUtils.h | 3 + llvm/tools/dsymutil/dsymutil.cpp | 60 +- llvm/unittests/ADT/APSIntTest.cpp | 86 ++ llvm/unittests/Support/Path.cpp | 16 +- llvm/utils/TableGen/AsmMatcherEmitter.cpp | 8 +- llvm/utils/TableGen/CodeGenRegisters.cpp | 3 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 3 +- llvm/utils/TableGen/RISCVCompressInstEmitter.cpp | 18 +- llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + .../clang/lib/StaticAnalyzer/Checkers/BUILD.gn | 1 + .../llvm/lib/ExecutionEngine/JITLink/BUILD.gn | 6 +- .../unittests/ExecutionEngine/JITLink/BUILD.gn | 2 +- .../nvptx/test/parallel/spmd_parallel_regions.cpp | 24 +- openmp/runtime/src/kmp_os.h | 10 +- 394 files changed, 7786 insertions(+), 2632 deletions(-) create mode 100644 clang/lib/Driver/ToolChains/PPCLinux.cpp create mode 100644 clang/lib/Driver/ToolChains/PPCLinux.h create mode 100644 clang/lib/Headers/ppc_wrappers/mmintrin.h create mode 100644 clang/lib/StaticAnalyzer/Checkers/Move.h create mode 100644 clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp create mode 100644 clang/test/Analysis/OSAtomic_mac.c create mode 100644 clang/test/Analysis/redecl.c create mode 100644 clang/test/Analysis/smart-ptr.cpp create mode 100644 clang/test/CXX/module/module.interface/Inputs/header.h create mode 100644 clang/test/CXX/module/module.interface/p2.cpp create mode 100644 clang/test/CXX/module/module.interface/p3.cpp create mode 100644 clang/test/CXX/module/module.interface/p5.cpp create mode 100644 clang/test/CodeGen/ppc-mmintrin.c create mode 100644 clang/test/Headers/ppc-intrinsics.c create mode 100644 clang/test/SemaCXX/constexpr-unsigned-high-bit.cpp rename libcxxabi/test/{uncaught_exception.pass.sh.cpp => uncaught_exception.pass.c [...] delete mode 100644 lld/test/ELF/invalid/Inputs/dynamic-section-sh_size.elf delete mode 100644 lld/test/ELF/invalid/Inputs/file-class.a delete mode 100644 lld/test/ELF/invalid/Inputs/mips-invalid-options-descriptor.elf delete mode 100644 lld/test/ELF/invalid/Inputs/multiple-eh-relocs.elf create mode 100644 lld/test/ELF/invalid/dynamic-section-broken.test delete mode 100644 lld/test/ELF/invalid/dynamic-section-size.s create mode 100644 lld/test/ELF/invalid/invalid-file-class.test delete mode 100644 lld/test/ELF/invalid/mips-invalid-options-descriptor.s create mode 100644 lld/test/ELF/invalid/mips-invalid-options-descriptor.test create mode 100644 lld/test/ELF/invalid/multiple-relocations-sections.test create mode 100644 lld/test/ELF/linkerscript/symbol-only-align.test create mode 100644 lld/test/ELF/ppc64-tls-ld-preemptable.s create mode 100644 lld/test/wasm/pie.ll create mode 100644 lldb/docs/.htaccess create mode 100644 lldb/include/lldb/Symbol/PostfixExpression.h create mode 100644 lldb/lit/Unwind/Inputs/eh-frame-small-fde.s create mode 100644 lldb/lit/Unwind/Inputs/unwind-plan-dwarf-dump.s create mode 100644 lldb/lit/Unwind/eh-frame-small-fde.test create mode 100644 lldb/lit/Unwind/unwind-plan-dwarf-dump.test delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] rename lldb/packages/Python/lldbsuite/test/lang/cpp/global_variables/{TestGlobalVa [...] create mode 100644 llvm/test/CodeGen/AArch64/arm64-mte.ll create mode 100644 llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.ll rename llvm/test/CodeGen/AMDGPU/{hsa-metadata-enqueu-kernel-v3.ll => hsa-metadata- [...] create mode 100644 llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir create mode 100644 llvm/test/CodeGen/SPARC/reg64.ll create mode 100644 llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir create mode 100644 llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll create mode 100644 llvm/test/CodeGen/X86/fdiv-combine-vec.ll create mode 100644 llvm/test/Demangle/ms-cxx20.test create mode 100644 llvm/test/MC/ARM/invalid-addsub.s create mode 100644 llvm/test/Transforms/LoopStrengthReduce/gnarly-setupcost.ll create mode 100644 llvm/test/tools/dsymutil/Inputs/swift-interface.ll create mode 100644 llvm/test/tools/dsymutil/X86/swift-interface.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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