Tcwg-commits April 2019

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (bf55c4e3e39 -> f2baddb0fc4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project. from bf55c4e3e39 [LLD][COFF] Early dependency detection adds 7e062c9b1f9 [X86] Make post-ra scheduling macrofusion-aware. adds d66a47f90a7 [InstCombine] Handle vector gep with scalar argument in eva [...] adds 0276b943566 InstSimplify: Add baseline test for upcoming change adds 3e527cd823a Revert "[InstCombine] Handle vector gep with scalar argumen [...] adds ebf90db0848 X86: Fix override warning adds 150a7ec2dc0 [InstCombine] Handle vector gep with scalar argument in eva [...] adds e106f25f056 [OPENMP] Check that allocated variables are used in private [...] adds 30c2f20e558 Fix builder. adds efe376add6a [AArch64] Add v8.5-a Memory Tagging GMID_EL1 register adds da20f5ca745 [RISCV] Generate address sequences suitable for mcmodel=medium adds 60768cd8967 [ASTImporter] Make ODR error handling configurable adds 9142b8ef1b9 [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions adds 44668ae7c7d [RISCV] Attach VK_RISCV_CALL to symbols upon creation adds 3d233d5d4d8 [AArch64] Add v8.5-a Memory Tagging STZGM instruction adds 22990ba11c2 gn build: Merge r357383 adds d8519f4a7db [lldb] [Process/elf-core] Support aarch64 NetBSD core dumps adds 0a30f33ce21 [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure. adds 95c585e258f [pstl] Indent preprocessor directives as part of the clang- [...] adds 410f32ce7c6 [ASTImporter] Convert ODR diagnostics inside ASTImporter im [...] adds 9ef7708bbbf [Tests] Add tests for a possible loop predication transform [...] adds 7eee62b5d4e [Tests] Autogen all the LoopPredication tests adds dae5ff2b7b8 Attempt to fix failing buildbot (ppc64le) adds d109e2a7c3b [LoopPred] Delete the old condition expressions if unused adds 6c21ccd245b [NVPTX] Fix the codegen for llvm.round. adds 05e3e554b47 [LoopPred] Be uniform about proving generated conditions adds 2a67c910764 Commit accidentally omitted test case. adds efa6d803c62 Fix PR41130 - 'operator/ of std::chrono::duration and custo [...] adds 2b0c7abba35 [libc++] Declare std::tuple_element as struct instead of class adds 84c8baeef71 [OPENMP]Allocate clause allocator in target region. adds ecad92b0680 Fix PR#41323 'Race condition in steady_clock::now for _LIBC [...] adds f6c04ad4860 [SLP] getGatherCost and isFullyVectorizableTinyTree are con [...] adds 58e7642669b [CodeGen] Generate follow-up metadata for loops with more t [...] adds b06935fa8c1 [SLP] getVectorElementSize and isTreeTinyAndNotFullyVectori [...] adds a9e847238e1 ELF: Perform per-section .ARM.exidx processing during combi [...] adds f2baddb0fc4 [llvm-objcopy] Add --keep-symbols option No new revisions were added by this update. Summary of changes: clang/include/clang/AST/ASTStructuralEquivalence.h | 4 + clang/include/clang/Basic/DiagnosticASTKinds.td | 72 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 + clang/lib/AST/ASTImporter.cpp | 28 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 161 ++- clang/lib/CodeGen/CGLoopInfo.cpp | 540 ++++++++-- clang/lib/CodeGen/CGLoopInfo.h | 84 +- clang/lib/Sema/SemaOpenMP.cpp | 366 ++++--- clang/test/CodeGenCXX/pragma-followup_inner.cpp | 42 + clang/test/CodeGenCXX/pragma-followup_outer.cpp | 41 + .../pragma-loop-safety-imperfectly_nested.cpp | 4 +- .../test/CodeGenCXX/pragma-loop-safety-nested.cpp | 4 +- clang/test/CodeGenCXX/pragma-loop-safety-outer.cpp | 2 +- clang/test/CodeGenCXX/pragma-loop-safety.cpp | 10 +- clang/test/CodeGenCXX/pragma-loop.cpp | 59 +- clang/test/CodeGenCXX/pragma-unroll-and-jam.cpp | 2 +- clang/test/OpenMP/allocate_messages.cpp | 2 + clang/test/OpenMP/nvptx_allocate_messages.cpp | 6 + clang/test/OpenMP/simd_metadata.c | 6 +- libcxx/include/__tuple | 17 +- libcxx/include/array | 5 +- libcxx/include/chrono | 38 +- libcxx/include/span | 3 +- libcxx/include/tuple | 4 +- libcxx/include/utility | 10 +- libcxx/src/chrono.cpp | 21 +- libcxx/test/std/utilities/time/rep.h | 36 + .../time.duration.arithmetic/op_divide=.pass.cpp | 10 + .../op_mod=duration.pass.cpp | 10 + .../time.duration.arithmetic/op_mod=rep.pass.cpp | 15 + .../time.duration.arithmetic/op_times=.pass.cpp | 10 + .../time.duration.nonmember/op_divide_rep.pass.cpp | 16 +- .../time.duration.nonmember/op_mod_rep.pass.cpp | 16 +- .../time.duration.nonmember/op_times_rep.pass.cpp | 16 + .../tuple.helper/tuple.include.array.pass.cpp | 3 +- .../tuple.helper/tuple_element.fail.cpp | 3 +- .../tuple.helper/tuple_element.pass.cpp | 3 +- .../tuple_size_structured_bindings.pass.cpp | 3 +- lld/COFF/DebugTypes.cpp | 4 +- lld/ELF/SyntheticSections.cpp | 83 +- lld/ELF/SyntheticSections.h | 8 +- lld/ELF/Writer.cpp | 19 +- .../postmortem/netbsd-core/1lwp_SIGSEGV.aarch64 | Bin 0 -> 9088 bytes .../netbsd-core/1lwp_SIGSEGV.aarch64.core | Bin 0 -> 225728 bytes .../netbsd-core/2lwp_process_SIGSEGV.aarch64 | Bin 0 -> 13192 bytes .../netbsd-core/2lwp_process_SIGSEGV.aarch64.core | Bin 0 -> 246936 bytes .../postmortem/netbsd-core/2lwp_t2_SIGSEGV.aarch64 | Bin 0 -> 11848 bytes .../netbsd-core/2lwp_t2_SIGSEGV.aarch64.core | Bin 0 -> 251904 bytes .../postmortem/netbsd-core/TestNetBSDCore.py | 15 + .../Plugins/Process/elf-core/ProcessElfCore.cpp | 26 + .../Plugins/Process/elf-core/RegisterUtilities.h | 5 + .../Plugins/Process/elf-core/ThreadElfCore.cpp | 3 + llvm/include/llvm/CodeGen/MachineBasicBlock.h | 11 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 5 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 13 +- llvm/lib/Target/AArch64/AArch64SystemOperands.td | 1 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 9 - .../AArch64/Disassembler/AArch64Disassembler.cpp | 27 - llvm/lib/Target/AMDGPU/AMDGPU.h | 6 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 12 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 +- llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp | 417 -------- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 17 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 5 + llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 221 +++++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 4 + llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 21 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 104 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.h | 4 + llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 9 - llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 34 + .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 6 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 45 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 94 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 16 +- llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 9 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 2 + llvm/lib/Target/X86/X86Subtarget.cpp | 6 + llvm/lib/Target/X86/X86Subtarget.h | 3 + .../InstCombine/InstCombineVectorOps.cpp | 9 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 8 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 22 +- .../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 5 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 8 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- .../AMDGPU/atomic_optimizations_raw_buffer.ll | 4 +- .../AMDGPU/atomic_optimizations_struct_buffer.ll | 4 +- llvm/test/CodeGen/AMDGPU/fix-wwm-liveness.mir | 185 ---- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 3 - llvm/test/CodeGen/AMDGPU/wqm.mir | 2 +- llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 188 ++++ llvm/test/CodeGen/NVPTX/f16-instructions.ll | 8 +- llvm/test/CodeGen/NVPTX/f16x2-instructions.ll | 13 +- llvm/test/CodeGen/NVPTX/math-intrins.ll | 12 +- llvm/test/CodeGen/RISCV/codemodel-lowering.ll | 80 ++ llvm/test/CodeGen/X86/testb-je-fusion.ll | 4 +- llvm/test/MC/AArch64/armv8.5a-mte-error.s | 106 +- llvm/test/MC/AArch64/armv8.5a-mte.s | 42 +- .../AArch64/armv8.5a-mte-unpredictable.txt | 7 - llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt | 31 +- llvm/test/ThinLTO/X86/builtin-nostrip.ll | 59 ++ .../Transforms/InstCombine/vec_gep_scalar_arg.ll | 16 + .../Transforms/InstSimplify/round-intrinsics.ll | 120 +++ llvm/test/Transforms/LoopPredication/basic.ll | 1035 +++++++++++++++----- .../basic_widenable_branch_guards.ll | 490 ++++++++- .../Transforms/LoopPredication/invariant_load.ll | 246 +++++ llvm/test/Transforms/LoopPredication/nested.ll | 223 ++++- .../Transforms/LoopPredication/profitability.ll | 89 +- llvm/test/Transforms/LoopPredication/reverse.ll | 229 ++++- llvm/test/Transforms/LoopPredication/visited.ll | 42 +- llvm/test/Transforms/LoopPredication/widened.ll | 142 ++- llvm/test/tools/llvm-objcopy/ELF/keep-symbol.test | 7 + llvm/tools/llvm-objcopy/CopyConfig.cpp | 4 + llvm/tools/llvm-objcopy/ObjcopyOpts.td | 9 + llvm/utils/gn/secondary/lld/COFF/BUILD.gn | 1 + pstl/.clang-format | 3 + pstl/include/pstl/algorithm | 6 +- pstl/include/pstl/execution | 8 +- pstl/include/pstl/internal/algorithm_impl.h | 10 +- pstl/include/pstl/internal/glue_execution_defs.h | 6 +- pstl/include/pstl/internal/numeric_impl.h | 2 +- pstl/include/pstl/internal/parallel_backend.h | 2 +- pstl/include/pstl/internal/parallel_backend_tbb.h | 2 +- pstl/include/pstl/internal/pstl_config.h | 98 +- pstl/include/pstl/memory | 6 +- pstl/include/pstl/numeric | 6 +- 131 files changed, 4777 insertions(+), 1787 deletions(-) create mode 100644 clang/test/CodeGenCXX/pragma-followup_inner.cpp create mode 100644 clang/test/CodeGenCXX/pragma-followup_outer.cpp create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp create mode 100644 llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp delete mode 100644 llvm/test/CodeGen/AMDGPU/fix-wwm-liveness.mir create mode 100644 llvm/test/CodeGen/AMDGPU/wwm-reserved.ll create mode 100644 llvm/test/CodeGen/RISCV/codemodel-lowering.ll delete mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-mte-unpredictable.txt create mode 100644 llvm/test/ThinLTO/X86/builtin-nostrip.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll create mode 100644 llvm/test/Transforms/InstSimplify/round-intrinsics.ll create mode 100644 llvm/test/Transforms/LoopPredication/invariant_load.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (e798779 -> 013bc60)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. from e798779 6: first-bad: llvm-bf55c4e3e390e108decb5023cb785dddd422c78f: -10 new 013bc60 7: good: llvm-f2baddb0fc48708ce1deb1428c89dd3504636f18: -10 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 126 +- 02-build_llvm/console.log | 4719 ++++++++++++++++++++++--------------- 05-check_regression/console.log | 16 +- 06-update_baseline/console.log | 26 +- console.log | 4887 +++++++++++++++++++++++---------------- jenkins/manifest.sh | 10 +- reset-baseline | 0 7 files changed, 5843 insertions(+), 3941 deletions(-) delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (76829d89287 -> bf55c4e3e39)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project. from 76829d89287 gn build: Add build files for most clang-tools-extra unit tests adds b0e79823d69 Make common_type's implementation common adds 7fb58e98f54 Spelling correction for docs for cppcoreguidelines-owning-memory adds 68b9f45feee Replace `typedef A B` with `using B = A`. NFC. adds a77ea59c4d1 Simplify. NFC. adds ca81a56f658 [RISCV] Don't evaluatePCRelLo if a relocation will be force [...] adds 2e1bf89e3a8 [X86] Use ISD::INTRINSIC_VOID in getTgtMemIntrinsic for tru [...] adds 38a82413210 [Linux/x86] Fix writing of non-gpr registers on newer processors adds d83fb24533e [ELF] Rename SyntheticSection::empty to more appropriate is [...] adds 3091884e25d [RISCV] Add seto pattern expansion adds e8c3136994b [X86][SSE] Add fcmp constant folding tests adds 7af32444b9b [X86] Fix a test from r357317 adds d9f6ee1c3cc [X86MacroFusion][NFC] Add more tests. adds 97d1bc44544 [InstCombine] eliminate commuted select-shuffles + binop (PR41304) adds bf55c4e3e39 [LLD][COFF] Early dependency detection No new revisions were added by this update. Summary of changes: .../checks/cppcoreguidelines-owning-memory.rst | 2 +- libcxx/include/type_traits | 131 ++++----- .../meta.trans.other/common_type.pass.cpp | 175 ++++++------ lld/COFF/CMakeLists.txt | 1 + lld/COFF/DebugTypes.cpp | 84 ++++++ lld/COFF/DebugTypes.h | 51 ++++ lld/COFF/Driver.cpp | 2 +- lld/COFF/InputFiles.cpp | 56 ++++ lld/COFF/InputFiles.h | 8 + lld/COFF/MapFile.cpp | 4 +- lld/COFF/PDB.cpp | 97 +++---- lld/ELF/Arch/X86.cpp | 26 +- lld/ELF/CallGraphSort.cpp | 4 +- lld/ELF/InputFiles.h | 36 +-- lld/ELF/InputSection.cpp | 6 +- lld/ELF/LinkerScript.h | 2 +- lld/ELF/MapFile.cpp | 2 +- lld/ELF/OutputSections.cpp | 4 +- lld/ELF/Relocations.cpp | 4 +- lld/ELF/Relocations.h | 2 +- lld/ELF/SyntheticSections.cpp | 42 +-- lld/ELF/SyntheticSections.h | 72 ++--- lld/ELF/Writer.cpp | 18 +- .../Linux/NativeRegisterContextLinux_x86_64.cpp | 119 ++++---- .../Linux/NativeRegisterContextLinux_x86_64.h | 3 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 9 +- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 14 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 4 + llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 4 +- .../InstCombine/InstructionCombining.cpp | 24 ++ llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/double-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/double-select-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/float-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/float-select-fcmp.ll | 8 - llvm/test/CodeGen/X86/fcmp-constant.ll | 278 +++++++++++++++++++ llvm/test/CodeGen/X86/testb-je-fusion.ll | 303 ++++++++++++++------- llvm/test/CodeGen/X86/win64-nosse-error.ll | 2 +- llvm/test/MC/RISCV/linker-relaxation.s | 8 +- llvm/test/MC/RISCV/option-relax.s | 6 + .../Transforms/InstCombine/vec-binop-select.ll | 71 +++-- 44 files changed, 1171 insertions(+), 561 deletions(-) create mode 100644 lld/COFF/DebugTypes.cpp create mode 100644 lld/COFF/DebugTypes.h create mode 100644 llvm/test/CodeGen/X86/fcmp-constant.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (9657d9d -> e798779)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. from 9657d9d 5: good: linux-3a2156c839c75c24691e3c672a6d607b24b0c210: 16049 new e798779 6: first-bad: llvm-bf55c4e3e390e108decb5023cb785dddd422c78f: -10 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 46 +- 02-build_llvm/console.log | 7621 +++++++------------------- 03-build_linux/console.log | 3525 ------------ 05-check_regression/console.log | 16 +- 06-update_baseline/console.log | 25 +- console.log | 11233 +++++++------------------------------- jenkins/manifest.sh | 11 +- reset-baseline | 0 results | 4 - 9 files changed, 3953 insertions(+), 18528 deletions(-) delete mode 100644 03-build_linux/console.log create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os_LTO updated (daeafe1333c -> 3771b76a540)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os_LTO in repository toolchain/ci/gcc. from daeafe1333c 2019-03-31 Harald Anlauf <anlauf(a)gmx.de> adds 3771b76a540 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os_LTO updated (b0f17e3c70 -> 263825a224)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os_LTO in repository toolchain/ci/binutils-gdb. from b0f17e3c70 Automatic date update in version.in adds b26a7d3276 Automatic date update in version.in adds 263825a224 AArch64: Fix disassembler bug with out-of-order sections No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 57 +++++ binutils/objdump.c | 1 + .../testsuite/binutils-all/aarch64/in-order-all.d | 38 ++++ binutils/testsuite/binutils-all/aarch64/in-order.d | 28 +++ .../binutils-all/aarch64/out-of-order-all.d | 38 ++++ .../testsuite/binutils-all/aarch64/out-of-order.T | 14 ++ .../testsuite/binutils-all/aarch64/out-of-order.d | 27 +++ .../testsuite/binutils-all/aarch64/out-of-order.s | 28 +++ binutils/testsuite/binutils-all/arm/in-order-all.d | 48 ++++ binutils/testsuite/binutils-all/arm/in-order.d | 28 +++ binutils/testsuite/binutils-all/arm/objdump.exp | 14 ++ .../testsuite/binutils-all/arm/out-of-order-all.d | 48 ++++ binutils/testsuite/binutils-all/arm/out-of-order.T | 14 ++ binutils/testsuite/binutils-all/arm/out-of-order.d | 27 +++ binutils/testsuite/binutils-all/arm/out-of-order.s | 29 +++ include/ChangeLog | 7 + include/dis-asm.h | 6 + ld/ChangeLog | 5 + ld/testsuite/ld-arm/jump-reloc-veneers-cond-long.d | 2 +- ld/testsuite/ld-arm/jump-reloc-veneers-long.d | 5 +- opcodes/ChangeLog | 33 +++ opcodes/aarch64-dis.c | 52 ++++- opcodes/arm-dis.c | 249 +++++++++------------ 24 files changed, 641 insertions(+), 159 deletions(-) create mode 100644 binutils/testsuite/binutils-all/aarch64/in-order-all.d create mode 100644 binutils/testsuite/binutils-all/aarch64/in-order.d create mode 100644 binutils/testsuite/binutils-all/aarch64/out-of-order-all.d create mode 100644 binutils/testsuite/binutils-all/aarch64/out-of-order.T create mode 100644 binutils/testsuite/binutils-all/aarch64/out-of-order.d create mode 100644 binutils/testsuite/binutils-all/aarch64/out-of-order.s create mode 100644 binutils/testsuite/binutils-all/arm/in-order-all.d create mode 100644 binutils/testsuite/binutils-all/arm/in-order.d create mode 100644 binutils/testsuite/binutils-all/arm/out-of-order-all.d create mode 100644 binutils/testsuite/binutils-all/arm/out-of-order.T create mode 100644 binutils/testsuite/binutils-all/arm/out-of-order.d create mode 100644 binutils/testsuite/binutils-all/arm/out-of-order.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os_LTO updated (c004da3 -> a2cbed2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os_LTO in repository toolchain/ci/base-artifacts. discards c004da3 0: good: binutils-gcc-glibc-llvm: -1 new a2cbed2 0: good: binutils-gcc-glibc-llvm: -1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c004da3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-release-aarch64 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-prepare_abe/console.log | 284 +- 03-build_abe-binutils/console.log | 11224 ++-- 04-build_abe-stage1/console.log | 13643 +++-- 05-build_abe-linux/console.log | 286 +- 06-build_abe-glibc/console.log | 38356 ++++++------ 07-build_abe-stage2/console.log | 40121 ++++++------ 08-build_llvm-true/console.log | 11296 ++-- 09-benchmark/benchmark.log | 14 +- 09-benchmark/console.log | 74 +- 11-update_baseline/console.log | 2 +- console.log | 115402 +++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 13 files changed, 115371 insertions(+), 115411 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[llvm] branch master updated (ad17d850c74 -> 7ebc1626961)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from ad17d850c74 [X86] Classify the AVX512 rounding control operand as X86:: [...] new 7ebc1626961 Not all blocks are reachable from entry. Don't assume they are. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Analysis/CFG.cpp | 15 +++++++++++---- unittests/Analysis/CFGTest.cpp | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (76829d89287 -> 62bcf736834)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/llvm-project. from 76829d89287 gn build: Add build files for most clang-tools-extra unit tests adds b0e79823d69 Make common_type's implementation common adds 7fb58e98f54 Spelling correction for docs for cppcoreguidelines-owning-memory adds 68b9f45feee Replace `typedef A B` with `using B = A`. NFC. adds a77ea59c4d1 Simplify. NFC. adds ca81a56f658 [RISCV] Don't evaluatePCRelLo if a relocation will be force [...] adds 2e1bf89e3a8 [X86] Use ISD::INTRINSIC_VOID in getTgtMemIntrinsic for tru [...] adds 38a82413210 [Linux/x86] Fix writing of non-gpr registers on newer processors adds d83fb24533e [ELF] Rename SyntheticSection::empty to more appropriate is [...] adds 3091884e25d [RISCV] Add seto pattern expansion adds e8c3136994b [X86][SSE] Add fcmp constant folding tests adds 7af32444b9b [X86] Fix a test from r357317 adds d9f6ee1c3cc [X86MacroFusion][NFC] Add more tests. adds 97d1bc44544 [InstCombine] eliminate commuted select-shuffles + binop (PR41304) adds bf55c4e3e39 [LLD][COFF] Early dependency detection adds 7e062c9b1f9 [X86] Make post-ra scheduling macrofusion-aware. adds d66a47f90a7 [InstCombine] Handle vector gep with scalar argument in eva [...] adds 0276b943566 InstSimplify: Add baseline test for upcoming change adds 3e527cd823a Revert "[InstCombine] Handle vector gep with scalar argumen [...] adds ebf90db0848 X86: Fix override warning adds 150a7ec2dc0 [InstCombine] Handle vector gep with scalar argument in eva [...] adds e106f25f056 [OPENMP] Check that allocated variables are used in private [...] adds 30c2f20e558 Fix builder. adds efe376add6a [AArch64] Add v8.5-a Memory Tagging GMID_EL1 register adds da20f5ca745 [RISCV] Generate address sequences suitable for mcmodel=medium adds 60768cd8967 [ASTImporter] Make ODR error handling configurable adds 9142b8ef1b9 [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions adds 44668ae7c7d [RISCV] Attach VK_RISCV_CALL to symbols upon creation adds 3d233d5d4d8 [AArch64] Add v8.5-a Memory Tagging STZGM instruction adds 22990ba11c2 gn build: Merge r357383 adds d8519f4a7db [lldb] [Process/elf-core] Support aarch64 NetBSD core dumps adds 0a30f33ce21 [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure. adds 95c585e258f [pstl] Indent preprocessor directives as part of the clang- [...] adds 410f32ce7c6 [ASTImporter] Convert ODR diagnostics inside ASTImporter im [...] adds 9ef7708bbbf [Tests] Add tests for a possible loop predication transform [...] adds 7eee62b5d4e [Tests] Autogen all the LoopPredication tests adds dae5ff2b7b8 Attempt to fix failing buildbot (ppc64le) adds d109e2a7c3b [LoopPred] Delete the old condition expressions if unused adds 6c21ccd245b [NVPTX] Fix the codegen for llvm.round. adds 05e3e554b47 [LoopPred] Be uniform about proving generated conditions adds 2a67c910764 Commit accidentally omitted test case. adds efa6d803c62 Fix PR41130 - 'operator/ of std::chrono::duration and custo [...] adds 2b0c7abba35 [libc++] Declare std::tuple_element as struct instead of class adds 84c8baeef71 [OPENMP]Allocate clause allocator in target region. adds ecad92b0680 Fix PR#41323 'Race condition in steady_clock::now for _LIBC [...] adds f6c04ad4860 [SLP] getGatherCost and isFullyVectorizableTinyTree are con [...] adds 58e7642669b [CodeGen] Generate follow-up metadata for loops with more t [...] adds b06935fa8c1 [SLP] getVectorElementSize and isTreeTinyAndNotFullyVectori [...] adds a9e847238e1 ELF: Perform per-section .ARM.exidx processing during combi [...] adds f2baddb0fc4 [llvm-objcopy] Add --keep-symbols option new 4307172b841 [X86] Classify the AVX512 rounding control operand as X86:: [...] new 62bcf736834 [Process] Fix WriteMemory return value The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../checks/cppcoreguidelines-owning-memory.rst | 2 +- clang/include/clang/AST/ASTStructuralEquivalence.h | 4 + clang/include/clang/Basic/DiagnosticASTKinds.td | 72 +- clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 + clang/lib/AST/ASTImporter.cpp | 28 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 161 ++- clang/lib/CodeGen/CGLoopInfo.cpp | 540 ++++++++-- clang/lib/CodeGen/CGLoopInfo.h | 84 +- clang/lib/Sema/SemaOpenMP.cpp | 366 ++++--- clang/test/CodeGenCXX/pragma-followup_inner.cpp | 42 + clang/test/CodeGenCXX/pragma-followup_outer.cpp | 41 + .../pragma-loop-safety-imperfectly_nested.cpp | 4 +- .../test/CodeGenCXX/pragma-loop-safety-nested.cpp | 4 +- clang/test/CodeGenCXX/pragma-loop-safety-outer.cpp | 2 +- clang/test/CodeGenCXX/pragma-loop-safety.cpp | 10 +- clang/test/CodeGenCXX/pragma-loop.cpp | 59 +- clang/test/CodeGenCXX/pragma-unroll-and-jam.cpp | 2 +- clang/test/OpenMP/allocate_messages.cpp | 2 + clang/test/OpenMP/nvptx_allocate_messages.cpp | 6 + clang/test/OpenMP/simd_metadata.c | 6 +- libcxx/include/__tuple | 17 +- libcxx/include/array | 5 +- libcxx/include/chrono | 38 +- libcxx/include/span | 3 +- libcxx/include/tuple | 4 +- libcxx/include/type_traits | 131 ++- libcxx/include/utility | 10 +- libcxx/src/chrono.cpp | 21 +- .../meta.trans.other/common_type.pass.cpp | 175 ++-- libcxx/test/std/utilities/time/rep.h | 36 + .../time.duration.arithmetic/op_divide=.pass.cpp | 10 + .../op_mod=duration.pass.cpp | 10 + .../time.duration.arithmetic/op_mod=rep.pass.cpp | 15 + .../time.duration.arithmetic/op_times=.pass.cpp | 10 + .../time.duration.nonmember/op_divide_rep.pass.cpp | 16 +- .../time.duration.nonmember/op_mod_rep.pass.cpp | 16 +- .../time.duration.nonmember/op_times_rep.pass.cpp | 16 + .../tuple.helper/tuple.include.array.pass.cpp | 3 +- .../tuple.helper/tuple_element.fail.cpp | 3 +- .../tuple.helper/tuple_element.pass.cpp | 3 +- .../tuple_size_structured_bindings.pass.cpp | 3 +- lld/COFF/CMakeLists.txt | 1 + lld/COFF/DebugTypes.cpp | 84 ++ lld/COFF/DebugTypes.h | 51 + lld/COFF/Driver.cpp | 2 +- lld/COFF/InputFiles.cpp | 56 ++ lld/COFF/InputFiles.h | 8 + lld/COFF/MapFile.cpp | 4 +- lld/COFF/PDB.cpp | 97 +- lld/ELF/Arch/X86.cpp | 26 +- lld/ELF/CallGraphSort.cpp | 4 +- lld/ELF/InputFiles.h | 36 +- lld/ELF/InputSection.cpp | 6 +- lld/ELF/LinkerScript.h | 2 +- lld/ELF/MapFile.cpp | 2 +- lld/ELF/OutputSections.cpp | 4 +- lld/ELF/Relocations.cpp | 4 +- lld/ELF/Relocations.h | 2 +- lld/ELF/SyntheticSections.cpp | 125 ++- lld/ELF/SyntheticSections.h | 80 +- lld/ELF/Writer.cpp | 37 +- .../gdb_remote_client/TestWriteMemory.py | 29 + .../postmortem/netbsd-core/1lwp_SIGSEGV.aarch64 | Bin 0 -> 9088 bytes .../netbsd-core/1lwp_SIGSEGV.aarch64.core | Bin 0 -> 225728 bytes .../netbsd-core/2lwp_process_SIGSEGV.aarch64 | Bin 0 -> 13192 bytes .../netbsd-core/2lwp_process_SIGSEGV.aarch64.core | Bin 0 -> 246936 bytes .../postmortem/netbsd-core/2lwp_t2_SIGSEGV.aarch64 | Bin 0 -> 11848 bytes .../netbsd-core/2lwp_t2_SIGSEGV.aarch64.core | Bin 0 -> 251904 bytes .../postmortem/netbsd-core/TestNetBSDCore.py | 15 + .../Linux/NativeRegisterContextLinux_x86_64.cpp | 119 ++- .../Linux/NativeRegisterContextLinux_x86_64.h | 3 +- .../Plugins/Process/elf-core/ProcessElfCore.cpp | 26 + .../Plugins/Process/elf-core/RegisterUtilities.h | 5 + .../Plugins/Process/elf-core/ThreadElfCore.cpp | 3 + lldb/source/Target/Process.cpp | 5 +- llvm/include/llvm/CodeGen/MachineBasicBlock.h | 11 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 5 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 13 +- llvm/lib/Target/AArch64/AArch64SystemOperands.td | 1 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 9 - .../AArch64/Disassembler/AArch64Disassembler.cpp | 27 - llvm/lib/Target/AMDGPU/AMDGPU.h | 6 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 12 +- llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 +- llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp | 417 -------- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 17 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 5 + llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 221 +++++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 4 + llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 21 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 104 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.h | 4 + llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 9 - llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 34 + .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 9 +- .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 6 +- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 14 +- llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 45 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 100 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 16 +- llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 4 + llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 4 + llvm/lib/Target/RISCV/RISCVMCInstLower.cpp | 9 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 2 + llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 5 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 +- llvm/lib/Target/X86/X86InstrInfo.td | 3 +- llvm/lib/Target/X86/X86Subtarget.cpp | 6 + llvm/lib/Target/X86/X86Subtarget.h | 3 + .../InstCombine/InstCombineVectorOps.cpp | 9 +- .../InstCombine/InstructionCombining.cpp | 24 + llvm/lib/Transforms/Scalar/LoopPredication.cpp | 8 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 22 +- .../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 5 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 8 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 4 +- .../AMDGPU/atomic_optimizations_raw_buffer.ll | 4 +- .../AMDGPU/atomic_optimizations_struct_buffer.ll | 4 +- llvm/test/CodeGen/AMDGPU/fix-wwm-liveness.mir | 185 ---- .../CodeGen/AMDGPU/indirect-addressing-term.ll | 3 - llvm/test/CodeGen/AMDGPU/wqm.mir | 2 +- llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 188 ++++ llvm/test/CodeGen/NVPTX/f16-instructions.ll | 8 +- llvm/test/CodeGen/NVPTX/f16x2-instructions.ll | 13 +- llvm/test/CodeGen/NVPTX/math-intrins.ll | 12 +- llvm/test/CodeGen/RISCV/codemodel-lowering.ll | 80 ++ llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/double-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/double-select-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/float-fcmp.ll | 8 - llvm/test/CodeGen/RISCV/float-select-fcmp.ll | 8 - llvm/test/CodeGen/X86/fcmp-constant.ll | 278 ++++++ llvm/test/CodeGen/X86/testb-je-fusion.ll | 303 ++++-- llvm/test/CodeGen/X86/win64-nosse-error.ll | 2 +- llvm/test/MC/AArch64/armv8.5a-mte-error.s | 106 +- llvm/test/MC/AArch64/armv8.5a-mte.s | 42 +- .../AArch64/armv8.5a-mte-unpredictable.txt | 7 - llvm/test/MC/Disassembler/AArch64/armv8.5a-mte.txt | 31 +- llvm/test/MC/RISCV/linker-relaxation.s | 8 +- llvm/test/MC/RISCV/option-relax.s | 6 + llvm/test/ThinLTO/X86/builtin-nostrip.ll | 59 ++ .../Transforms/InstCombine/vec-binop-select.ll | 71 +- .../Transforms/InstCombine/vec_gep_scalar_arg.ll | 16 + .../Transforms/InstSimplify/round-intrinsics.ll | 120 +++ llvm/test/Transforms/LoopPredication/basic.ll | 1035 +++++++++++++++----- .../basic_widenable_branch_guards.ll | 490 ++++++++- .../Transforms/LoopPredication/invariant_load.ll | 246 +++++ llvm/test/Transforms/LoopPredication/nested.ll | 223 ++++- .../Transforms/LoopPredication/profitability.ll | 89 +- llvm/test/Transforms/LoopPredication/reverse.ll | 229 ++++- llvm/test/Transforms/LoopPredication/visited.ll | 42 +- llvm/test/Transforms/LoopPredication/widened.ll | 142 ++- llvm/test/tools/llvm-objcopy/ELF/keep-symbol.test | 7 + llvm/tools/llvm-objcopy/CopyConfig.cpp | 4 + llvm/tools/llvm-objcopy/ObjcopyOpts.td | 9 + llvm/utils/gn/secondary/lld/COFF/BUILD.gn | 1 + pstl/.clang-format | 3 + pstl/include/pstl/algorithm | 6 +- pstl/include/pstl/execution | 8 +- pstl/include/pstl/internal/algorithm_impl.h | 10 +- pstl/include/pstl/internal/glue_execution_defs.h | 6 +- pstl/include/pstl/internal/numeric_impl.h | 2 +- pstl/include/pstl/internal/parallel_backend.h | 2 +- pstl/include/pstl/internal/parallel_backend_tbb.h | 2 +- pstl/include/pstl/internal/pstl_config.h | 98 +- pstl/include/pstl/memory | 6 +- pstl/include/pstl/numeric | 6 +- 174 files changed, 5985 insertions(+), 2348 deletions(-) create mode 100644 clang/test/CodeGenCXX/pragma-followup_inner.cpp create mode 100644 clang/test/CodeGenCXX/pragma-followup_outer.cpp create mode 100644 lld/COFF/DebugTypes.cpp create mode 100644 lld/COFF/DebugTypes.h create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100755 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/postmortem/ [...] delete mode 100644 llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp create mode 100644 llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp delete mode 100644 llvm/test/CodeGen/AMDGPU/fix-wwm-liveness.mir create mode 100644 llvm/test/CodeGen/AMDGPU/wwm-reserved.ll create mode 100644 llvm/test/CodeGen/RISCV/codemodel-lowering.ll create mode 100644 llvm/test/CodeGen/X86/fcmp-constant.ll delete mode 100644 llvm/test/MC/Disassembler/AArch64/armv8.5a-mte-unpredictable.txt create mode 100644 llvm/test/ThinLTO/X86/builtin-nostrip.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll create mode 100644 llvm/test/Transforms/InstSimplify/round-intrinsics.ll create mode 100644 llvm/test/Transforms/LoopPredication/invariant_load.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (656dd306d4 -> e0e4c321c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/glibc. from 656dd306d4 RISC-V: Fix `test' operand error with soft-float ABI being c [...] adds d5ecee822e alpha: Do not redefine __NR_shmat or __NR_osf_shmat adds 993e3107af alpha: Improve sysdeps/alpha/divqu.S and sysdeps/alpha/remqu.S new e0e4c321c3 Fix strptime era handling, add more strftime tests [BZ #24394] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 23 ++ sysdeps/alpha/divqu.S | 7 +- sysdeps/alpha/remqu.S | 12 +- sysdeps/unix/sysv/linux/alpha/kernel-features.h | 6 +- sysdeps/unix/sysv/linux/alpha/sysdep.h | 4 +- time/Makefile | 2 +- time/strptime_l.c | 11 +- time/tst-strftime3.c | 456 ++++++++++++++++++++++++ 8 files changed, 507 insertions(+), 14 deletions(-) create mode 100644 time/tst-strftime3.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

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