Tcwg-commits March 2019

tcwg-commits@lists.linaro.org

6 participants
14809 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (bd669627 -> c5a68eaa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards bd669627 0: good: binutils-gcc-linux: all new c5a68eaa 0: good: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bd669627) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 14 +- 3-build_abe-binutils/console.log | 3707 +++++++++-------- 4-build_abe-stage1/console.log | 3839 +++++++++--------- 5-build_linux/console.log | 491 ++- 6-boot_linux/console.log | 2 +- console.log | 8089 +++++++++++++++++++++----------------- jenkins/manifest.sh | 16 +- 7 files changed, 9078 insertions(+), 7080 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[llvm] branch master updated (ca5bbb310e6 -> b392b2cef2e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from ca5bbb310e6 [WebAssembly] Don't override default implementation of isOf [...] new b392b2cef2e [GlobalISel] Include missing change from r356396 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[llvm] branch master updated (f2c750b0e65 -> ca5bbb310e6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from f2c750b0e65 [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri pa [...] new 89d0f2ff489 [InstSimplify] Add additional icmp of min/max tests; NFC new 44d05035050 [ValueTracking][InstSimplify] Move abs handling into comput [...] new ca5bbb310e6 [WebAssembly] Don't override default implementation of isOf [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Analysis/InstructionSimplify.cpp | 41 ------ lib/Analysis/ValueTracking.cpp | 32 +++++ lib/Target/TargetMachine.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 6 - lib/Target/WebAssembly/WebAssemblyISelLowering.h | 1 - test/Transforms/InstSimplify/cmp_of_min_max.ll | 150 +++++++++++++++++++++ 6 files changed, 183 insertions(+), 49 deletions(-) create mode 100644 test/Transforms/InstSimplify/cmp_of_min_max.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig updated (80b98e92ebcb -> 9e98c678c2d6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig in repository toolchain/ci/linux. from 80b98e92ebcb Merge branch 'x86-asm-for-linus' of git://git.kernel.org/p [...] adds e3a22850664f deb-pkg: generate correct build dependencies adds 13d3bc7152d0 libfdt: prefix header search paths with $(srctree)/ adds 393492b567fd ia64: prefix header search path with $(srctree)/ adds 46c7dd56d541 modpost: always show verbose warning for section mismatch adds 898f5a009f22 kbuild: move archive command to scripts/Makefile.lib adds fc2b47b55f17 h8300: use cc-cross-prefix instead of hardcoding h8300-unk [...] adds c649bd59b6d4 unicore32: simplify linker script generation for decompressor adds 94cf8acc38e5 kbuild: source include/config/auto.conf instead of ${KCONF [...] adds 2b50f7ab6368 kbuild: add workaround for Debian make-kpkg adds 7e548e9a54bf kbuild: deb-pkg: add CONFIG_ prefix to kernel config options adds 515f4c633dae kbuild: deb-pkg: introduce is_enabled and if_enabled_echo [...] adds 6fb7ef5a343d kbuild: pkg: grep include/config/auto.conf instead of $KCO [...] adds da9cfb87a44d coccinelle: semantic code search for missing put_device() adds f6d9db635522 kbuild: deb-pkg: avoid implicit effects adds 0c22be0712b8 kbuild: Make NOSTDINC_FLAGS a simply expanded variable adds f84dde10d893 Revert "modsign: Abort modules_install when signing fails" adds 7cbbbb8bc297 kbuild: warn redundant generic-y adds 037fc3368be4 kbuild: force all architectures except um to include mandatory-y adds c71bb9f86666 kconfig: remove stale lxdialog/.gitignore adds 28d747f266fb Merge tag 'kbuild-v5.1-2' of git://git.kernel.org/pub/scm/ [...] adds 9e98c678c2d6 Linux 5.1-rc1 No new revisions were added by this update. Summary of changes: Documentation/kbuild/makefiles.txt | 2 +- Makefile | 22 +++++++-- arch/alpha/include/uapi/asm/Kbuild | 2 - arch/arc/include/uapi/asm/Kbuild | 2 - arch/arm/include/asm/Kbuild | 1 - arch/arm/include/uapi/asm/Kbuild | 1 - arch/arm64/include/uapi/asm/Kbuild | 1 - arch/c6x/include/uapi/asm/Kbuild | 2 - arch/csky/include/uapi/asm/Kbuild | 2 - arch/h8300/Makefile | 2 +- arch/h8300/include/asm/Kbuild | 1 - arch/h8300/include/uapi/asm/Kbuild | 2 - arch/hexagon/include/uapi/asm/Kbuild | 2 - arch/ia64/include/uapi/asm/Kbuild | 3 -- arch/ia64/sn/kernel/Makefile | 2 +- arch/ia64/sn/kernel/sn2/Makefile | 2 - arch/ia64/sn/pci/Makefile | 2 - arch/ia64/sn/pci/pcibr/Makefile | 2 +- arch/m68k/include/uapi/asm/Kbuild | 2 - arch/microblaze/include/uapi/asm/Kbuild | 2 - arch/mips/include/uapi/asm/Kbuild | 2 - arch/nds32/include/uapi/asm/Kbuild | 2 - arch/nios2/include/uapi/asm/Kbuild | 2 - arch/openrisc/include/asm/Kbuild | 2 - arch/openrisc/include/uapi/asm/Kbuild | 2 - arch/parisc/include/asm/Kbuild | 2 - arch/parisc/include/uapi/asm/Kbuild | 2 - arch/powerpc/include/asm/Kbuild | 1 - arch/powerpc/include/uapi/asm/Kbuild | 2 - arch/riscv/include/uapi/asm/Kbuild | 1 - arch/s390/boot/Makefile | 3 -- arch/s390/include/asm/Kbuild | 1 - arch/s390/include/uapi/asm/Kbuild | 2 - arch/sh/include/uapi/asm/Kbuild | 1 - arch/sparc/include/uapi/asm/Kbuild | 2 - arch/unicore32/boot/compressed/Makefile | 5 +- .../compressed/{vmlinux.lds.in => vmlinux.lds.S} | 0 arch/unicore32/include/uapi/asm/Kbuild | 2 - arch/x86/include/uapi/asm/Kbuild | 3 -- arch/xtensa/include/asm/Kbuild | 1 - arch/xtensa/include/uapi/asm/Kbuild | 3 -- include/asm-generic/Kbuild | 5 ++ include/uapi/asm-generic/{Kbuild.asm => Kbuild} | 4 +- lib/Makefile | 2 +- scripts/Makefile.asm-generic | 11 +++++ scripts/Makefile.build | 6 +-- scripts/Makefile.lib | 6 +++ scripts/Makefile.modinst | 2 +- scripts/Makefile.modpost | 1 - scripts/adjust_autoksyms.sh | 9 +--- scripts/coccinelle/free/put_device.cocci | 56 ++++++++++++++++++++++ scripts/kconfig/lxdialog/.gitignore | 4 -- scripts/link-vmlinux.sh | 9 +--- scripts/mod/modpost.c | 27 ++--------- scripts/package/builddeb | 32 ++++++++----- scripts/package/buildtar | 2 +- scripts/package/mkdebian | 39 ++++++++------- 57 files changed, 155 insertions(+), 158 deletions(-) rename arch/unicore32/boot/compressed/{vmlinux.lds.in => vmlinux.lds.S} (100%) create mode 100644 include/asm-generic/Kbuild rename include/uapi/asm-generic/{Kbuild.asm => Kbuild} (87%) create mode 100644 scripts/coccinelle/free/put_device.cocci delete mode 100644 scripts/kconfig/lxdialog/.gitignore -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig updated (1723810805f -> a74fa2b1a77)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig in repository toolchain/ci/gcc. from 1723810805f 2019-03-17 Thomas Koenig <tkoenig(a)gcc.gnu.org> adds 5d34f779cb1 Daily bump. adds 2f978d6d097 Add forgotten requeing in propagate_subaccesses_across_link adds a74fa2b1a77 Backport from mainline: No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 15 +++++ gcc/DATESTAMP | 2 +- gcc/gimple-ssa-warn-restrict.c | 6 +- gcc/testsuite/ChangeLog | 13 +++++ gcc/testsuite/gcc.dg/Warray-bounds-38.c | 30 ++++++++++ gcc/testsuite/gcc.dg/tree-ssa/pr89546.c | 100 ++++++++++++++++++++++++++++++++ gcc/tree-sra.c | 8 ++- 7 files changed, 166 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/Warray-bounds-38.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89546.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig updated (b74c7b85b6 -> 7efcedf2b5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig in repository toolchain/ci/binutils-gdb. from b74c7b85b6 Automatic date update in version.in adds 1f9e71ff8c Automatic date update in version.in adds 7efcedf2b5 PR24355, segmentation fault in function called from ppc_fini [...] No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 +++++++ bfd/elf32-ppc.c | 8 ++------ bfd/version.h | 2 +- 3 files changed, 10 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig updated (9050c1ff -> 2662b7ac)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 9050c1ff 0: good: binutils-gcc-linux: all new 2662b7ac 0: good: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9050c1ff) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 14 +- 3-build_abe-binutils/console.log | 3469 ++++++++---------- 4-build_abe-stage1/console.log | 3445 ++++++++---------- 5-build_linux/console.log | 444 +-- 6-boot_linux/console.log | 2 +- console.log | 7406 +++++++++++++++++--------------------- jenkins/manifest.sh | 16 +- 7 files changed, 6462 insertions(+), 8334 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (ef2d9799435 -> c1d4fc8a625)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from ef2d9799435 [ConstantRange] Add fromKnownBits() method adds 10ba65cc48f [AMDGPU] Regenerate some f16/i16 tests. adds d1477e989ce [ARM] Fixed an assumption of power-of-2 vector MVT adds e30aa6a1362 [AMDGPU] Prepare for introduction of v3 and v5 MVTs adds 12509d87f3a [X86] Remove the _alt forms of XOP VPCOM instructions. Use [...] adds affead9ad0a [X86] Remove the _alt forms of AVX512 VPCMP instructions. U [...] adds 322e2dbee12 [ValueTracking] Use ConstantRange overflow check for signed [...] adds 5e7b62de056 [ConstantRange] Add assertion for KnownBits validity; NFC adds e0c1f9e76d5 AMDGPU: Partially fix default device for HSA adds 884a18d7925 RegAllocFast: Add hint to debug printing adds baa94ef03bc [ARM] Check that CPSR does not have other uses adds c302b9b5fe0 [CodeGen] Prepare for introduction of v3 and v5 MVTs adds c4e128e2219 [CodeGen] Defined MVTs v3i32, v3f32, v5i32, v5f32 adds 04cc28fe133 [X86] Merge printf32mem/printi32mem into a single printdwor [...] adds 4873056ced0 Remove immarg from llvm.expect adds 541bccf4d91 Add testcase from bug 41079 adds 860a27208ec [X86] Add tab character to the custom printing of VPCMP and [...] adds b4c49255aa8 [X86] Make ADD*_DB post-RA pseudos and expand them in expan [...] adds d94db9364da [X86] Add ADD8ri_DB and ADD8rr_DB to the autogenerated load [...] adds 60444ad16fe [RISCV] Add ImmArg to intrinsics adds ba898da132d [X86] Hopefully fix a tautological compare warning in print [...] adds 8cfd91dcc72 [AArch64] Fix bug 35094 atomicrmw on Armv8.1-A+lse adds dec963921b6 Reinitialize UnwindTable when the SymbolFile changes adds f92ddfed5a3 Fix "type qualifiers ignored on cast result type" warnings adds 8a2e4af7e75 [DebugInfo] Ignore bitcasts when lowering stack arg dbg.values adds 23629385f10 [llvm-exegesis] Separate tool options into three categories. adds 560a45a3c4f [pp-trace] Delete -ignore and add a new option -callbacks adds d7f15393224 [InstCombine] add funnel shift tests with arbitrary constants; NFC adds f9ab4f5f4e9 [SystemZ] Remove icmp undef from reduced tests adds 84de8a30a05 [InstCombine] extend rotate-left-by-constant canonicalizati [...] adds 58e9ef139dd Fix TestCommandScriptImmediateOutput for python3 adds faf308b11a9 [llvm-objcopy] - Calculate the string table section sizes c [...] adds 6063393536c [InstCombine] allow general vector constants for funnel shi [...] adds 523dab07887 [AMDGPU] Add an experimental buffer fat pointer address space. adds 1915e2be937 [ELF] Emit weak-undef symbols in .dynsym of a PIE binary on [...] adds 2bde5303c70 [libc++] Add a test for PR40977 adds 22457e66c51 Fix libstdc++ data formatters for python3 adds 370e5dbacdc Fix some "variable 'foo' set but not used" warnings adds 0e5012eac35 Skip TestVSCode_setFunctionBreakpoints on linux adds 2b1dca79f20 lld-link: Run conflict-mangled.test on all systems adds c131e0e2ae5 [MVT] Fix typos in comment. NFC. adds 55c921f4bf3 [DAG] Cleanup unused node in SimplifySelectCC. adds 08b5e68ef67 [InstCombine] add/adjust test for NaN checks; NFC adds c2b35ebc1da [X86] Remove the _alt forms of (V)CMP instructions. Use a c [...] adds 3c2aadbe670 [AMDGPU] Add the missing clang change of the experimental b [...] adds 0c962cb5c84 [libc++][NFC] Promote CMake comment to an actual option des [...] adds 8a595b1d2ed [AArch64] Refactor floating point materialization. NFC adds f6a53d63a10 [OPENMP] Set scheduling for doacross loops as schedule, 1. adds 664c1ef5284 [TargetLowering] Add code size information on isFPImmLegal. NFC adds a3cefa5d649 [AArch64] Optimize floating point materialization adds 270249de2bb [AArch64] Small fix for getIntImmCost adds ad7d0ded2e4 [SCEV] Guard movement of insertion point for loop-invariants adds f07062a7984 [X86] Rename imm8_su/imm16_su/imm32_su to relocImm8_su/relo [...] adds 8723a565517 [MsgPack][AMDGPU] Fix unflushed raw_string_ostream bugs on [...] new 4aeea4cc423 [DebugInfo][PDB] Don't write empty debug streams new 8627178d468 Revert r356304: remove subreg parameter from MachineIRBuild [...] new b6e16ea006a [Sema] Add some compile time _FORTIFY_SOURCE diagnostics new 2e94f6e584d [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source m [...] new cfdfba996b0 [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmetic new 9af9f500d19 Fix flat-error-unsupported-gpu-hsa test new 65dc65216e9 [API] Remove unneded LLDB_DISABLE_PYTHON markers. new 1d716acf76d Restore comment regarding why Reloc::PIC_ can't be PIC new c1d4fc8a625 [InstCombine] Improve with.overflow intrinsic tests; NFC The 9 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/pp-trace.rst | 10 +- clang-tools-extra/pp-trace/PPCallbacksTracker.cpp | 13 +- clang-tools-extra/pp-trace/PPCallbacksTracker.h | 15 +- clang-tools-extra/pp-trace/PPTrace.cpp | 80 +- .../test/pp-trace/pp-trace-conditional.cpp | 2 +- .../test/pp-trace/pp-trace-filter.cpp | 17 + clang-tools-extra/test/pp-trace/pp-trace-ident.cpp | 2 +- clang-tools-extra/test/pp-trace/pp-trace-macro.cpp | 2 +- .../test/pp-trace/pp-trace-modules.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-general.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-ms.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-opencl.cpp | 2 +- clang/include/clang/AST/Decl.h | 2 +- clang/include/clang/Basic/DiagnosticGroups.td | 2 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 +- clang/include/clang/Sema/Sema.h | 1 + clang/lib/AST/Decl.cpp | 26 +- clang/lib/Basic/Targets/AMDGPU.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 18 + clang/lib/CodeGen/CGOpenMPRuntime.h | 2 +- clang/lib/Sema/SemaChecking.cpp | 215 +++-- clang/lib/Sema/SemaExpr.cpp | 2 + clang/test/Analysis/bstring.c | 13 +- clang/test/Analysis/null-deref-ps-region.c | 2 +- clang/test/Analysis/pr22954.c | 4 +- clang/test/Analysis/string.c | 10 +- clang/test/CodeGen/builtin-expect.c | 17 + clang/test/CodeGen/target-data.c | 4 +- clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl | 2 +- clang/test/OpenMP/ordered_doacross_codegen.c | 2 +- clang/test/OpenMP/ordered_doacross_codegen.cpp | 4 +- clang/test/Sema/builtin-object-size.c | 4 +- clang/test/Sema/builtins.c | 10 +- clang/test/Sema/transpose-memset.c | 2 +- clang/test/Sema/warn-fortify-source.c | 83 ++ clang/test/Sema/warn-strncat-size.c | 2 +- libcxx/CMakeLists.txt | 6 +- .../memory_order.underlying_type.pass.cpp | 34 + lld/COFF/PDB.cpp | 19 +- lld/ELF/Symbols.cpp | 4 + lld/test/COFF/conflict-mangled.test | 1 - lld/test/COFF/pdb-global-gc.yaml | 1 + lld/test/COFF/pdb-lib.s | 6 +- lld/test/COFF/pdb.test | 2 +- .../ELF/Inputs/{start-lib2.s => dummy-shared.s} | 0 lld/test/ELF/pie-weak.s | 6 +- lld/test/ELF/relocation-relative-weak.s | 4 +- lld/test/ELF/weak-undef-no-shared-libs.s | 28 + lld/test/ELF/weak-undef.s | 4 +- lldb/examples/synthetic/gnu_libstdcpp.py | 5 +- lldb/include/lldb/API/SBDebugger.h | 4 - lldb/include/lldb/API/SBTypeCategory.h | 18 - lldb/include/lldb/API/SBTypeSynthetic.h | 4 - lldb/include/lldb/API/SBValue.h | 2 - lldb/include/lldb/Core/Module.h | 7 +- .../SymbolFile/Inputs/target-symbols-add-unwind.c | 1 + lldb/lit/SymbolFile/target-symbols-add-unwind.test | 26 + .../TestCommandScriptImmediateOutput.py | 6 +- .../TestVSCode_setFunctionBreakpoints.py | 1 + lldb/source/API/SBDebugger.cpp | 4 - lldb/source/API/SBFrame.cpp | 8 +- lldb/source/API/SBReproducer.cpp | 8 - lldb/source/API/SBTarget.cpp | 9 +- lldb/source/API/SBTypeCategory.cpp | 18 - lldb/source/API/SBTypeSynthetic.cpp | 4 - lldb/source/API/SBValue.cpp | 2 - lldb/source/Core/Module.cpp | 10 + .../Plugins/Process/minidump/MinidumpParser.cpp | 11 +- .../Plugins/Process/minidump/MinidumpTypes.cpp | 12 +- lldb/source/Symbol/UnwindTable.cpp | 2 +- llvm/docs/AMDGPUUsage.rst | 14 +- llvm/docs/LangRef.rst | 3 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 3 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 3 + llvm/include/llvm/CodeGen/TargetLowering.h | 6 +- llvm/include/llvm/CodeGen/ValueTypes.td | 166 ++-- .../llvm/DebugInfo/PDB/Native/ModuleDebugStream.h | 2 + llvm/include/llvm/IR/Intrinsics.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 12 +- llvm/include/llvm/Support/CodeGen.h | 5 +- llvm/include/llvm/Support/MachineValueType.h | 178 ++-- .../llvm/Support/X86DisassemblerDecoderCommon.h | 3 - llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 88 +- llvm/lib/Analysis/ValueTracking.cpp | 56 +- llvm/lib/BinaryFormat/MsgPackDocumentYAML.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 10 +- llvm/lib/CodeGen/RegAllocFast.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 114 +-- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 1 + .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 30 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 9 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/ValueTypes.cpp | 8 + .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 6 +- .../lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | 16 +- llvm/lib/IR/ConstantRange.cpp | 2 + llvm/lib/Support/TargetParser.cpp | 10 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 47 +- llvm/lib/Target/AArch64/AArch64ExpandImm.cpp | 408 +++++++++ llvm/lib/Target/AArch64/AArch64ExpandImm.h | 35 + .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 504 +----------- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 19 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 19 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 6 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPU.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 8 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/GCNProcessors.td | 4 + llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 67 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 45 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 12 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 2 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 6 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 4 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 9 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 50 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 1 + llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 6 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 15 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 3 +- llvm/lib/Target/Mips/MipsISelLowering.cpp | 3 +- llvm/lib/Target/Mips/MipsISelLowering.h | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 3 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 3 +- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 95 ++- .../Target/X86/Disassembler/X86Disassembler.cpp | 205 ----- .../Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 277 ++++++- .../lib/Target/X86/InstPrinter/X86ATTInstPrinter.h | 32 +- .../X86/InstPrinter/X86InstPrinterCommon.cpp | 186 ++++- .../Target/X86/InstPrinter/X86InstPrinterCommon.h | 4 +- .../Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 273 +++++- .../Target/X86/InstPrinter/X86IntelInstPrinter.h | 37 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrAVX512.td | 214 ++--- llvm/lib/Target/X86/X86InstrArithmetic.td | 6 +- llvm/lib/Target/X86/X86InstrCompiler.td | 2 +- llvm/lib/Target/X86/X86InstrFoldTables.cpp | 30 +- llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 4 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 11 + llvm/lib/Target/X86/X86InstrInfo.td | 94 +-- llvm/lib/Target/X86/X86InstrSSE.td | 91 +- llvm/lib/Target/X86/X86InstrXOP.td | 26 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 16 - .../Transforms/InstCombine/InstCombineCalls.cpp | 52 +- llvm/test/Analysis/CostModel/AMDGPU/add-sub.ll | 15 +- .../Analysis/CostModel/AMDGPU/extractelement.ll | 9 + llvm/test/Analysis/CostModel/AMDGPU/fabs.ll | 10 + llvm/test/Analysis/CostModel/AMDGPU/fadd.ll | 15 +- llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll | 22 +- llvm/test/Analysis/CostModel/AMDGPU/fmul.ll | 15 +- llvm/test/Analysis/CostModel/AMDGPU/fsub.ll | 15 +- llvm/test/Analysis/CostModel/AMDGPU/mul.ll | 15 +- llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll | 40 + llvm/test/CodeGen/AArch64/arm64-fp-imm.ll | 7 +- llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 72 +- llvm/test/CodeGen/AArch64/fpimm.ll | 12 +- llvm/test/CodeGen/AArch64/immcost.ll | 106 +++ llvm/test/CodeGen/AArch64/literal_pools_float.ll | 11 +- llvm/test/CodeGen/AArch64/misched-fusion-lit.ll | 15 + llvm/test/CodeGen/AArch64/win_cst_pool.ll | 16 +- llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll | 40 + llvm/test/CodeGen/AMDGPU/call-argument-types.ll | 173 +++- llvm/test/CodeGen/AMDGPU/call-return-types.ll | 42 +- llvm/test/CodeGen/AMDGPU/calling-conventions.ll | 90 ++ .../AMDGPU/coalescer-extend-pruned-subrange.mir | 6 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../coalescer-with-subregs-bad-identical.mir | 2 +- llvm/test/CodeGen/AMDGPU/endpgm-dce.mir | 2 +- .../AMDGPU/flat-error-unsupported-gpu-hsa.ll | 15 + llvm/test/CodeGen/AMDGPU/fold-cndmask.mir | 8 +- .../fold-immediate-operand-shrink-with-carry.mir | 18 +- .../AMDGPU/fold-immediate-operand-shrink.mir | 50 +- .../CodeGen/AMDGPU/global-load-store-atomics.mir | 4 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- llvm/test/CodeGen/AMDGPU/kernel-args.ll | 116 +++ llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 64 +- llvm/test/CodeGen/AMDGPU/max.i16.ll | 412 +++++++++- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 6 +- .../AMDGPU/optimize-negated-cond-exec-masking.mir | 58 +- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 68 +- .../CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll | 5 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 2 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 20 +- llvm/test/CodeGen/AMDGPU/sdwa-ops.mir | 60 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 912 +++++++++++++++++---- llvm/test/CodeGen/AMDGPU/shrink-carry.mir | 8 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 44 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 2 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 131 ++- .../CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll | 17 + .../test/CodeGen/AMDGPU/vop-shrink-frame-index.mir | 12 +- llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 4 +- .../test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir | 2 +- llvm/test/CodeGen/SystemZ/buildvector-00.ll | 8 +- llvm/test/CodeGen/SystemZ/dag-combine-03.ll | 16 +- llvm/test/CodeGen/Thumb2/constant-islands-cbz.mir | 41 + llvm/test/CodeGen/X86/xor.ll | 5 +- llvm/test/DebugInfo/ARM/float-stack-arg.ll | 53 ++ llvm/test/MC/AMDGPU/vop3-gfx9.s | 37 + llvm/test/MC/AMDGPU/vop3.s | 38 +- llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt | 28 + llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt | 28 + llvm/test/MC/X86/avx512-encodings.s | 4 +- llvm/test/MC/X86/x86-32-avx.s | 12 +- llvm/test/MC/X86/x86-32.s | 16 +- llvm/test/MC/X86/x86_64-avx-encoding.s | 12 +- llvm/test/TableGen/intrinsic-varargs.td | 2 +- llvm/test/Transforms/InstCombine/and-fcmp.ll | 54 +- llvm/test/Transforms/InstCombine/fsh.ll | 58 +- llvm/test/Transforms/InstCombine/or-fcmp.ll | 52 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 127 +-- llvm/test/Transforms/InstCombine/with_overflow.ll | 54 ++ .../Transforms/LoopVectorize/pr30806-phi-scev.ll | 66 ++ llvm/test/Transforms/LoopVectorize/pr30806.ll | 65 ++ .../Transforms/LowerExpectIntrinsic/PR33346.ll | 4 +- llvm/test/Verifier/intrinsic-immarg.ll | 9 - llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 16 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/BdVer2/resources-sse2.s | 16 +- .../test/tools/llvm-mca/X86/BdVer2/resources-xop.s | 64 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Broadwell/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/BtVer2/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-xop.s | 64 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Haswell/resources-sse2.s | 16 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 16 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 48 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-sse2.s | 16 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 48 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 16 +- .../llvm-mca/X86/SkylakeClient/resources-sse2.s | 16 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 48 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 16 +- .../llvm-mca/X86/SkylakeServer/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Znver1/resources-sse2.s | 16 +- .../tools/llvm-objcopy/ELF/basic-archive-copy.test | 2 +- .../ELF/cross-arch-sections-symbols.test | 2 +- .../tools/llvm-objcopy/ELF/shstrtab-optimize.test | 28 + .../tools/llvm-objcopy/ELF/strtab-optimize.test | 21 + llvm/tools/llvm-exegesis/llvm-exegesis.cpp | 47 +- llvm/tools/llvm-objcopy/ELF/Object.cpp | 22 +- llvm/tools/llvm-objcopy/ELF/Object.h | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 + llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 3 + llvm/utils/TableGen/X86RecognizableInstr.cpp | 8 - 278 files changed, 6296 insertions(+), 3078 deletions(-) create mode 100644 clang-tools-extra/test/pp-trace/pp-trace-filter.cpp create mode 100644 clang/test/Sema/warn-fortify-source.c create mode 100644 libcxx/test/libcxx/atomics/atomics.order/memory_order.underlyin [...] copy lld/test/ELF/Inputs/{start-lib2.s => dummy-shared.s} (100%) create mode 100644 lld/test/ELF/weak-undef-no-shared-libs.s create mode 100644 lldb/lit/SymbolFile/Inputs/target-symbols-add-unwind.c create mode 100644 lldb/lit/SymbolFile/target-symbols-add-unwind.test create mode 100644 llvm/lib/Target/AArch64/AArch64ExpandImm.cpp create mode 100644 llvm/lib/Target/AArch64/AArch64ExpandImm.h create mode 100644 llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll create mode 100644 llvm/test/CodeGen/AArch64/immcost.ll create mode 100644 llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll create mode 100644 llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll create mode 100644 llvm/test/DebugInfo/ARM/float-stack-arg.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr30806-phi-scev.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr30806.ll create mode 100644 llvm/test/tools/llvm-objcopy/ELF/shstrtab-optimize.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/strtab-optimize.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (56cac160 -> 6f56c584)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 56cac160 1: good: llvm-linux: 16548 new 6f56c584 1: good: llvm-linux: 16548 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (56cac160) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 14 +- 2-build_llvm/console.log | 9744 +++++++++++++++++----------------- 3-build_linux/console.log | 1564 +++--- console.log | 11412 ++++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 5 files changed, 11347 insertions(+), 11395 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[llvm] branch master updated (671c6db1952 -> f2c750b0e65)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 671c6db1952 [AMDGPU] Enable code selection using `s_mul_hi_u32`/`s_mul_ [...] new ecb803edc2c [X86] Replace uses of i64immSExt32_su with i64relocImmSExt32_su. new f2c750b0e65 [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri pa [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/X86/X86InstrArithmetic.td | 2 +- lib/Target/X86/X86InstrCompiler.td | 2 -- lib/Target/X86/X86InstrInfo.td | 5 +---- lib/Target/X86/X86InstrShiftRotate.td | 10 ++++++---- test/CodeGen/X86/absolute-rotate.ll | 16 ++++++++++++++++ 5 files changed, 24 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits March 2019