Tcwg-commits March 2019

tcwg-commits@lists.linaro.org

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14809 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig updated (50110198 -> ec3deada)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 50110198 0: good: binutils-gcc-linux: boot new ec3deada 0: good: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (50110198) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 14 +- 2-prepare_abe/console.log | 4 +- 3-build_abe-binutils/console.log | 3018 ++++++++--------- 4-build_abe-stage1/console.log | 3292 ++++++++++--------- 5-build_linux/console.log | 28 +- 6-boot_linux/console.log | 344 +- console.log | 6682 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 8 files changed, 6703 insertions(+), 6691 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (1723810805f -> a74fa2b1a77)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/gcc. from 1723810805f 2019-03-17 Thomas Koenig <tkoenig(a)gcc.gnu.org> adds 5d34f779cb1 Daily bump. adds 2f978d6d097 Add forgotten requeing in propagate_subaccesses_across_link adds a74fa2b1a77 Backport from mainline: No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 15 +++++ gcc/DATESTAMP | 2 +- gcc/gimple-ssa-warn-restrict.c | 6 +- gcc/testsuite/ChangeLog | 13 +++++ gcc/testsuite/gcc.dg/Warray-bounds-38.c | 30 ++++++++++ gcc/testsuite/gcc.dg/tree-ssa/pr89546.c | 100 ++++++++++++++++++++++++++++++++ gcc/tree-sra.c | 8 ++- 7 files changed, 166 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/Warray-bounds-38.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89546.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (b74c7b85b6 -> 7efcedf2b5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from b74c7b85b6 Automatic date update in version.in adds 1f9e71ff8c Automatic date update in version.in adds 7efcedf2b5 PR24355, segmentation fault in function called from ppc_fini [...] No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 +++++++ bfd/elf32-ppc.c | 8 ++------ bfd/version.h | 2 +- 3 files changed, 10 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig updated (112db1be -> ca574d74)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 112db1be 0: good: binutils-gcc-linux: all new ca574d74 0: good: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (112db1be) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 16 +- 2-prepare_abe/console.log | 4 +- 3-build_abe-binutils/console.log | 3584 ++++++++++--------- 4-build_abe-stage1/console.log | 3590 ++++++++++--------- 5-build_linux/console.log | 26 +- 6-boot_linux/console.log | 2 +- console.log | 7150 +++++++++++++++++++++----------------- jenkins/manifest.sh | 12 +- 8 files changed, 7800 insertions(+), 6584 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[clang] branch master updated (1752683c93 -> ae6410c918)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 1752683c93 [MS] Skip vbase construction in abstract class ctors new ae6410c918 Thread safety analysis: Add note for unlock kind mismatch The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/clang/Analysis/Analyses/ThreadSafety.h | 2 ++ lib/Analysis/ThreadSafety.cpp | 4 ++-- lib/Sema/AnalysisBasedWarnings.cpp | 28 +++++++++++++------------- test/Sema/warn-thread-safety-analysis.c | 4 ++-- test/SemaCXX/warn-thread-safety-analysis.cpp | 8 ++++---- 5 files changed, 24 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (c302b9b5fe0 -> 3e9770d2dc2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project. from c302b9b5fe0 [CodeGen] Prepare for introduction of v3 and v5 MVTs adds c4e128e2219 [CodeGen] Defined MVTs v3i32, v3f32, v5i32, v5f32 adds 04cc28fe133 [X86] Merge printf32mem/printi32mem into a single printdwor [...] adds 4873056ced0 Remove immarg from llvm.expect adds 541bccf4d91 Add testcase from bug 41079 adds 860a27208ec [X86] Add tab character to the custom printing of VPCMP and [...] adds b4c49255aa8 [X86] Make ADD*_DB post-RA pseudos and expand them in expan [...] adds d94db9364da [X86] Add ADD8ri_DB and ADD8rr_DB to the autogenerated load [...] adds 60444ad16fe [RISCV] Add ImmArg to intrinsics adds ba898da132d [X86] Hopefully fix a tautological compare warning in print [...] adds 8cfd91dcc72 [AArch64] Fix bug 35094 atomicrmw on Armv8.1-A+lse adds dec963921b6 Reinitialize UnwindTable when the SymbolFile changes adds f92ddfed5a3 Fix "type qualifiers ignored on cast result type" warnings adds 8a2e4af7e75 [DebugInfo] Ignore bitcasts when lowering stack arg dbg.values adds 23629385f10 [llvm-exegesis] Separate tool options into three categories. adds 560a45a3c4f [pp-trace] Delete -ignore and add a new option -callbacks adds d7f15393224 [InstCombine] add funnel shift tests with arbitrary constants; NFC adds f9ab4f5f4e9 [SystemZ] Remove icmp undef from reduced tests adds 84de8a30a05 [InstCombine] extend rotate-left-by-constant canonicalizati [...] adds 58e9ef139dd Fix TestCommandScriptImmediateOutput for python3 adds faf308b11a9 [llvm-objcopy] - Calculate the string table section sizes c [...] adds 6063393536c [InstCombine] allow general vector constants for funnel shi [...] adds 523dab07887 [AMDGPU] Add an experimental buffer fat pointer address space. adds 1915e2be937 [ELF] Emit weak-undef symbols in .dynsym of a PIE binary on [...] adds 2bde5303c70 [libc++] Add a test for PR40977 adds 22457e66c51 Fix libstdc++ data formatters for python3 adds 370e5dbacdc Fix some "variable 'foo' set but not used" warnings adds 0e5012eac35 Skip TestVSCode_setFunctionBreakpoints on linux adds 2b1dca79f20 lld-link: Run conflict-mangled.test on all systems adds c131e0e2ae5 [MVT] Fix typos in comment. NFC. adds 55c921f4bf3 [DAG] Cleanup unused node in SimplifySelectCC. adds 08b5e68ef67 [InstCombine] add/adjust test for NaN checks; NFC adds c2b35ebc1da [X86] Remove the _alt forms of (V)CMP instructions. Use a c [...] adds 3c2aadbe670 [AMDGPU] Add the missing clang change of the experimental b [...] adds 0c962cb5c84 [libc++][NFC] Promote CMake comment to an actual option des [...] adds 8a595b1d2ed [AArch64] Refactor floating point materialization. NFC adds f6a53d63a10 [OPENMP] Set scheduling for doacross loops as schedule, 1. adds 664c1ef5284 [TargetLowering] Add code size information on isFPImmLegal. NFC adds a3cefa5d649 [AArch64] Optimize floating point materialization adds 270249de2bb [AArch64] Small fix for getIntImmCost adds ad7d0ded2e4 [SCEV] Guard movement of insertion point for loop-invariants adds f07062a7984 [X86] Rename imm8_su/imm16_su/imm32_su to relocImm8_su/relo [...] adds 8723a565517 [MsgPack][AMDGPU] Fix unflushed raw_string_ostream bugs on [...] adds 4aeea4cc423 [DebugInfo][PDB] Don't write empty debug streams adds 8627178d468 Revert r356304: remove subreg parameter from MachineIRBuild [...] adds b6e16ea006a [Sema] Add some compile time _FORTIFY_SOURCE diagnostics adds 2e94f6e584d [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source m [...] adds cfdfba996b0 [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmetic adds 9af9f500d19 Fix flat-error-unsupported-gpu-hsa test adds 65dc65216e9 [API] Remove unneded LLDB_DISABLE_PYTHON markers. adds 1d716acf76d Restore comment regarding why Reloc::PIC_ can't be PIC adds c1d4fc8a625 [InstCombine] Improve with.overflow intrinsic tests; NFC adds 5049c3422d2 [llvm-objcopy] Make .build-id linking atomic adds efb4f9e568b [AMDGPU] Enable code selection using `s_mul_hi_u32`/`s_mul_ [...] adds 0b9c640fe07 [X86] Replace uses of i64immSExt32_su with i64relocImmSExt32_su. adds f086e562f94 [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri pa [...] adds 05baa9ee1ae [InstSimplify] Add additional icmp of min/max tests; NFC adds f89343bc47d [ValueTracking][InstSimplify] Move abs handling into comput [...] adds b7708ec87fc [WebAssembly] Don't override default implementation of isOf [...] adds a140276a1e0 [GlobalISel] Include missing change from r356396 adds b4a3b29d16e [CMake] Set LLVM_DEFAULT_EXTERNAL_LIT in standalone build c [...] adds e732bc6bead [X86] Allow any 8-bit immediate to be used with BT/BTC/BTR/ [...] adds 930341ba306 [InstCombine] Add tests for add nuw + uaddo; NFC adds 106f0cdefb0 [ValueTracking][InstSimplify] Support min/max selects in co [...] adds 2d5e7adf26f A target definition file that may work for Aarch32 Cortex-M [...] adds 61b302f94fd Remove exception throwing debug mode handler support. adds 18143556559 [NFC][TSan][libdispatch] Fix test for dispatch_apply[_f] adds b24bdf626ab [X86] Disable CQTO and CLTQ instructions in the assembly pa [...] adds 1dd518da7d2 [X86] Add coverage for 16-bit and 64-bit versions of bsf/bs [...] adds cc703de62fd Fix test failures after debug mode changes adds 9aac4c1be3c [libFuzzer] document -len_control adds 8b653d0308c [X86] Add gcc rotate intrinsics to ia32intrin.h adds 3e9770d2dc2 Revert "[ValueTracking][InstSimplify] Support min/max selec [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/pp-trace.rst | 10 +- clang-tools-extra/pp-trace/PPCallbacksTracker.cpp | 13 +- clang-tools-extra/pp-trace/PPCallbacksTracker.h | 15 +- clang-tools-extra/pp-trace/PPTrace.cpp | 80 ++-- .../test/pp-trace/pp-trace-conditional.cpp | 2 +- .../test/pp-trace/pp-trace-filter.cpp | 17 + clang-tools-extra/test/pp-trace/pp-trace-ident.cpp | 2 +- clang-tools-extra/test/pp-trace/pp-trace-macro.cpp | 2 +- .../test/pp-trace/pp-trace-modules.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-general.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-ms.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-opencl.cpp | 2 +- clang/include/clang/AST/Decl.h | 2 +- clang/include/clang/Basic/DiagnosticGroups.td | 2 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 +- clang/include/clang/Sema/Sema.h | 1 + clang/lib/AST/Decl.cpp | 26 +- clang/lib/Basic/Targets/AMDGPU.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 18 + clang/lib/CodeGen/CGOpenMPRuntime.h | 2 +- clang/lib/Headers/ia32intrin.h | 60 +++ clang/lib/Sema/SemaChecking.cpp | 215 ++++++--- clang/lib/Sema/SemaExpr.cpp | 2 + clang/test/Analysis/bstring.c | 13 +- clang/test/Analysis/null-deref-ps-region.c | 2 +- clang/test/Analysis/pr22954.c | 4 +- clang/test/Analysis/string.c | 10 +- clang/test/CodeGen/builtin-expect.c | 17 + clang/test/CodeGen/rot-intrinsics.c | 120 +++++ clang/test/CodeGen/target-data.c | 4 +- clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl | 2 +- clang/test/OpenMP/ordered_doacross_codegen.c | 2 +- clang/test/OpenMP/ordered_doacross_codegen.cpp | 4 +- clang/test/Sema/builtin-object-size.c | 4 +- clang/test/Sema/builtins.c | 10 +- clang/test/Sema/transpose-memset.c | 2 +- clang/test/Sema/warn-fortify-source.c | 83 ++++ clang/test/Sema/warn-strncat-size.c | 2 +- compiler-rt/test/tsan/libdispatch/apply.c | 30 +- libcxx/CMakeLists.txt | 6 +- libcxx/include/__config | 16 - libcxx/include/__debug | 36 +- libcxx/include/__hash_table | 8 +- libcxx/include/iterator | 92 ++-- libcxx/include/list | 12 +- libcxx/include/string | 8 +- libcxx/include/vector | 8 +- libcxx/lib/abi/CHANGELOG.TXT | 41 ++ libcxx/lib/abi/x86_64-apple-darwin.v1.abilist | 14 +- libcxx/lib/abi/x86_64-apple-darwin.v2.abilist | 15 +- libcxx/lib/abi/x86_64-unknown-linux-gnu.v1.abilist | 15 +- libcxx/src/debug.cpp | 59 +-- .../memory_order.underlying_type.pass.cpp | 34 ++ .../sequences/array/array.zero/db_back.pass.cpp | 25 +- .../sequences/array/array.zero/db_front.pass.cpp | 25 +- .../array/array.zero/db_indexing.pass.cpp | 35 +- .../db_associative_container_tests.pass.cpp | 10 +- .../db_sequence_container_iterators.pass.cpp | 108 ++--- .../libcxx/debug/containers/db_string.pass.cpp | 32 +- .../containers/db_unord_container_tests.pass.cpp | 10 +- .../test/libcxx/debug/debug_helper_test.pass.cpp | 70 +++ ...w_register.pass.cpp => debug_register.pass.cpp} | 22 +- libcxx/test/libcxx/debug/debug_throw.pass.cpp | 42 -- .../class.path/path.itr/iterator_db.pass.cpp | 34 +- .../futures/futures.promise/set_exception.pass.cpp | 21 +- .../set_exception_at_thread_exit.pass.cpp | 19 +- ...bug_mode_helper.h => container_debug_tests.hpp} | 122 +++-- libcxx/test/support/debug_mode_helper.h | 533 +++++++++------------ lld/COFF/PDB.cpp | 19 +- lld/ELF/Symbols.cpp | 4 + lld/test/COFF/conflict-mangled.test | 1 - lld/test/COFF/pdb-global-gc.yaml | 1 + lld/test/COFF/pdb-lib.s | 6 +- lld/test/COFF/pdb.test | 2 +- .../ELF/Inputs/{start-lib2.s => dummy-shared.s} | 0 lld/test/ELF/pie-weak.s | 6 +- lld/test/ELF/relocation-relative-weak.s | 4 +- lld/test/ELF/weak-undef-no-shared-libs.s | 28 ++ lld/test/ELF/weak-undef.s | 4 +- lldb/cmake/modules/LLDBStandalone.cmake | 7 +- .../python/armv7_cortex_m_target_defintion.py | 140 ++++++ lldb/examples/synthetic/gnu_libstdcpp.py | 5 +- lldb/include/lldb/API/SBDebugger.h | 4 - lldb/include/lldb/API/SBTypeCategory.h | 18 - lldb/include/lldb/API/SBTypeSynthetic.h | 4 - lldb/include/lldb/API/SBValue.h | 2 - lldb/include/lldb/Core/Module.h | 7 +- .../SymbolFile/Inputs/target-symbols-add-unwind.c | 1 + lldb/lit/SymbolFile/target-symbols-add-unwind.test | 26 + .../TestCommandScriptImmediateOutput.py | 6 +- .../TestVSCode_setFunctionBreakpoints.py | 1 + lldb/source/API/SBDebugger.cpp | 4 - lldb/source/API/SBFrame.cpp | 8 +- lldb/source/API/SBReproducer.cpp | 8 - lldb/source/API/SBTarget.cpp | 9 +- lldb/source/API/SBTypeCategory.cpp | 18 - lldb/source/API/SBTypeSynthetic.cpp | 4 - lldb/source/API/SBValue.cpp | 2 - lldb/source/Core/Module.cpp | 10 + .../Plugins/Process/minidump/MinidumpParser.cpp | 11 +- .../Plugins/Process/minidump/MinidumpTypes.cpp | 12 +- lldb/source/Symbol/UnwindTable.cpp | 2 +- llvm/docs/AMDGPUUsage.rst | 14 +- llvm/docs/LangRef.rst | 3 +- llvm/docs/LibFuzzer.rst | 4 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 3 +- llvm/include/llvm/CodeGen/TargetLowering.h | 3 +- llvm/include/llvm/CodeGen/ValueTypes.td | 166 +++---- .../llvm/DebugInfo/PDB/Native/ModuleDebugStream.h | 2 + llvm/include/llvm/IR/Intrinsics.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 12 +- llvm/include/llvm/Support/CodeGen.h | 5 +- llvm/include/llvm/Support/FileSystem.h | 25 +- llvm/include/llvm/Support/MachineValueType.h | 178 ++++--- .../llvm/Support/X86DisassemblerDecoderCommon.h | 2 - llvm/lib/Analysis/InstructionSimplify.cpp | 41 -- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 88 ++-- llvm/lib/Analysis/ValueTracking.cpp | 32 ++ llvm/lib/BinaryFormat/MsgPackDocumentYAML.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 114 +++-- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 3 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/ValueTypes.cpp | 8 + .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 6 +- .../lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | 16 +- llvm/lib/Support/Path.cpp | 53 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 47 +- llvm/lib/Target/AArch64/AArch64ExpandImm.cpp | 408 ++++++++++++++++ llvm/lib/Target/AArch64/AArch64ExpandImm.h | 35 ++ .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 504 ++----------------- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 19 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 19 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 6 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPU.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 5 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 34 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 67 ++- llvm/lib/Target/AMDGPU/SIInstructions.td | 45 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 12 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 2 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 6 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 4 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 9 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 50 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 3 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 3 +- llvm/lib/Target/Mips/MipsISelLowering.cpp | 3 +- llvm/lib/Target/Mips/MipsISelLowering.h | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 3 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 3 +- llvm/lib/Target/TargetMachine.cpp | 2 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 6 - .../Target/WebAssembly/WebAssemblyISelLowering.h | 1 - llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 27 +- .../Target/X86/Disassembler/X86Disassembler.cpp | 60 --- .../Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 137 +++++- .../lib/Target/X86/InstPrinter/X86ATTInstPrinter.h | 31 +- .../X86/InstPrinter/X86InstPrinterCommon.cpp | 61 +++ .../Target/X86/InstPrinter/X86InstPrinterCommon.h | 1 + .../Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 136 +++++- .../Target/X86/InstPrinter/X86IntelInstPrinter.h | 36 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrAVX512.td | 119 ++--- llvm/lib/Target/X86/X86InstrArithmetic.td | 8 +- llvm/lib/Target/X86/X86InstrCompiler.td | 4 +- llvm/lib/Target/X86/X86InstrExtension.td | 4 +- llvm/lib/Target/X86/X86InstrFoldTables.cpp | 30 +- llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 4 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 11 + llvm/lib/Target/X86/X86InstrInfo.td | 165 +++---- llvm/lib/Target/X86/X86InstrSSE.td | 91 ++-- llvm/lib/Target/X86/X86InstrShiftRotate.td | 10 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 16 - .../Transforms/InstCombine/InstCombineCalls.cpp | 52 +- llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll | 40 ++ llvm/test/CodeGen/AArch64/arm64-fp-imm.ll | 7 +- llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 72 +-- llvm/test/CodeGen/AArch64/fpimm.ll | 12 +- llvm/test/CodeGen/AArch64/immcost.ll | 106 ++++ llvm/test/CodeGen/AArch64/literal_pools_float.ll | 11 +- llvm/test/CodeGen/AArch64/misched-fusion-lit.ll | 15 + llvm/test/CodeGen/AArch64/win_cst_pool.ll | 16 +- llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll | 40 ++ .../AMDGPU/coalescer-extend-pruned-subrange.mir | 6 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../coalescer-with-subregs-bad-identical.mir | 2 +- llvm/test/CodeGen/AMDGPU/endpgm-dce.mir | 2 +- .../AMDGPU/flat-error-unsupported-gpu-hsa.ll | 2 +- llvm/test/CodeGen/AMDGPU/fold-cndmask.mir | 8 +- .../fold-immediate-operand-shrink-with-carry.mir | 18 +- .../AMDGPU/fold-immediate-operand-shrink.mir | 50 +- .../CodeGen/AMDGPU/global-load-store-atomics.mir | 4 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 64 +-- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 6 +- llvm/test/CodeGen/AMDGPU/mul.ll | 6 + .../AMDGPU/optimize-negated-cond-exec-masking.mir | 58 +-- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 68 +-- .../CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll | 5 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 2 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 20 +- llvm/test/CodeGen/AMDGPU/sdwa-ops.mir | 60 +-- llvm/test/CodeGen/AMDGPU/shrink-carry.mir | 8 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 44 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 2 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- .../CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll | 17 + .../test/CodeGen/AMDGPU/vop-shrink-frame-index.mir | 12 +- llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 4 +- .../test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir | 2 +- llvm/test/CodeGen/SystemZ/buildvector-00.ll | 8 +- llvm/test/CodeGen/SystemZ/dag-combine-03.ll | 16 +- llvm/test/CodeGen/X86/absolute-rotate.ll | 16 + llvm/test/CodeGen/X86/xor.ll | 5 +- llvm/test/DebugInfo/ARM/float-stack-arg.ll | 53 ++ llvm/test/MC/AMDGPU/vop3-gfx9.s | 37 ++ llvm/test/MC/AMDGPU/vop3.s | 38 +- llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt | 28 ++ llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt | 28 ++ llvm/test/MC/X86/I386-32.s | 116 ++++- llvm/test/MC/X86/I386-64.s | 187 +++++++- llvm/test/MC/X86/I86-32.s | 8 + llvm/test/MC/X86/I86-64.s | 16 + llvm/test/MC/X86/x86-32-avx.s | 12 +- llvm/test/MC/X86/x86-32.s | 16 +- llvm/test/MC/X86/x86_64-avx-encoding.s | 12 +- llvm/test/MC/X86/x86_errors.s | 6 + llvm/test/TableGen/intrinsic-varargs.td | 2 +- llvm/test/Transforms/InstCombine/and-fcmp.ll | 54 ++- llvm/test/Transforms/InstCombine/fsh.ll | 58 ++- llvm/test/Transforms/InstCombine/or-fcmp.ll | 52 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 127 ++--- .../Transforms/InstCombine/uadd-with-overflow.ll | 131 +++++ llvm/test/Transforms/InstCombine/with_overflow.ll | 54 +++ .../test/Transforms/InstSimplify/cmp_of_min_max.ll | 150 ++++++ .../Transforms/LoopVectorize/pr30806-phi-scev.ll | 66 +++ llvm/test/Transforms/LoopVectorize/pr30806.ll | 65 +++ .../Transforms/LowerExpectIntrinsic/PR33346.ll | 4 +- llvm/test/Verifier/intrinsic-immarg.ll | 9 - llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 16 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/BdVer2/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Broadwell/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/BtVer2/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Haswell/resources-sse2.s | 16 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 16 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 48 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-sse2.s | 16 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 48 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 16 +- .../llvm-mca/X86/SkylakeClient/resources-sse2.s | 16 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 48 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 16 +- .../llvm-mca/X86/SkylakeServer/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Znver1/resources-sse2.s | 16 +- .../tools/llvm-objcopy/ELF/basic-archive-copy.test | 2 +- .../ELF/cross-arch-sections-symbols.test | 2 +- .../tools/llvm-objcopy/ELF/shstrtab-optimize.test | 28 ++ .../tools/llvm-objcopy/ELF/strtab-optimize.test | 21 + llvm/tools/llvm-exegesis/llvm-exegesis.cpp | 47 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 52 +- llvm/tools/llvm-objcopy/ELF/Object.cpp | 22 +- llvm/tools/llvm-objcopy/ELF/Object.h | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 + llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 3 + llvm/utils/TableGen/X86RecognizableInstr.cpp | 10 +- 299 files changed, 5612 insertions(+), 3428 deletions(-) create mode 100644 clang-tools-extra/test/pp-trace/pp-trace-filter.cpp create mode 100644 clang/test/CodeGen/rot-intrinsics.c create mode 100644 clang/test/Sema/warn-fortify-source.c create mode 100644 libcxx/test/libcxx/atomics/atomics.order/memory_order.underlyin [...] create mode 100644 libcxx/test/libcxx/debug/debug_helper_test.pass.cpp rename libcxx/test/libcxx/debug/{debug_throw_register.pass.cpp => debug_register.p [...] delete mode 100644 libcxx/test/libcxx/debug/debug_throw.pass.cpp copy libcxx/test/support/{debug_mode_helper.h => container_debug_tests.hpp} (77%) copy lld/test/ELF/Inputs/{start-lib2.s => dummy-shared.s} (100%) create mode 100644 lld/test/ELF/weak-undef-no-shared-libs.s create mode 100755 lldb/examples/python/armv7_cortex_m_target_defintion.py create mode 100644 lldb/lit/SymbolFile/Inputs/target-symbols-add-unwind.c create mode 100644 lldb/lit/SymbolFile/target-symbols-add-unwind.test create mode 100644 llvm/lib/Target/AArch64/AArch64ExpandImm.cpp create mode 100644 llvm/lib/Target/AArch64/AArch64ExpandImm.h create mode 100644 llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll create mode 100644 llvm/test/CodeGen/AArch64/immcost.ll create mode 100644 llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll create mode 100644 llvm/test/DebugInfo/ARM/float-stack-arg.ll create mode 100644 llvm/test/Transforms/InstCombine/uadd-with-overflow.ll create mode 100644 llvm/test/Transforms/InstSimplify/cmp_of_min_max.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr30806-phi-scev.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr30806.ll create mode 100644 llvm/test/tools/llvm-objcopy/ELF/shstrtab-optimize.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/strtab-optimize.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig updated (d9e0579a -> 350a1b1b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards d9e0579a 4: good: llvm-linux: 17558 new 350a1b1b 4: good: llvm-linux: 17558 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d9e0579a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 14 +- 2-build_llvm/console.log | 9603 ++++++++++++++++---------------- 3-build_linux/console.log | 2338 ++++---- console.log | 11949 ++++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 5 files changed, 11999 insertions(+), 11913 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[compiler-rt] branch master updated (949be677f -> dad832e67)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from 949be677f [NFC][TSan][libdispatch] Fix test for dispatch_apply[_f] new dad832e67 [asan] Disable -Wfortify-source in intentional OOB tests The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/asan/TestCases/Windows/dll_intercept_memcpy.cc | 4 ++-- test/asan/TestCases/Windows/dll_intercept_memset.cc | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (c302b9b5fe0 -> 3e9770d2dc2)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project. from c302b9b5fe0 [CodeGen] Prepare for introduction of v3 and v5 MVTs adds c4e128e2219 [CodeGen] Defined MVTs v3i32, v3f32, v5i32, v5f32 adds 04cc28fe133 [X86] Merge printf32mem/printi32mem into a single printdwor [...] adds 4873056ced0 Remove immarg from llvm.expect adds 541bccf4d91 Add testcase from bug 41079 adds 860a27208ec [X86] Add tab character to the custom printing of VPCMP and [...] adds b4c49255aa8 [X86] Make ADD*_DB post-RA pseudos and expand them in expan [...] adds d94db9364da [X86] Add ADD8ri_DB and ADD8rr_DB to the autogenerated load [...] adds 60444ad16fe [RISCV] Add ImmArg to intrinsics adds ba898da132d [X86] Hopefully fix a tautological compare warning in print [...] adds 8cfd91dcc72 [AArch64] Fix bug 35094 atomicrmw on Armv8.1-A+lse adds dec963921b6 Reinitialize UnwindTable when the SymbolFile changes adds f92ddfed5a3 Fix "type qualifiers ignored on cast result type" warnings adds 8a2e4af7e75 [DebugInfo] Ignore bitcasts when lowering stack arg dbg.values adds 23629385f10 [llvm-exegesis] Separate tool options into three categories. adds 560a45a3c4f [pp-trace] Delete -ignore and add a new option -callbacks adds d7f15393224 [InstCombine] add funnel shift tests with arbitrary constants; NFC adds f9ab4f5f4e9 [SystemZ] Remove icmp undef from reduced tests adds 84de8a30a05 [InstCombine] extend rotate-left-by-constant canonicalizati [...] adds 58e9ef139dd Fix TestCommandScriptImmediateOutput for python3 adds faf308b11a9 [llvm-objcopy] - Calculate the string table section sizes c [...] adds 6063393536c [InstCombine] allow general vector constants for funnel shi [...] adds 523dab07887 [AMDGPU] Add an experimental buffer fat pointer address space. adds 1915e2be937 [ELF] Emit weak-undef symbols in .dynsym of a PIE binary on [...] adds 2bde5303c70 [libc++] Add a test for PR40977 adds 22457e66c51 Fix libstdc++ data formatters for python3 adds 370e5dbacdc Fix some "variable 'foo' set but not used" warnings adds 0e5012eac35 Skip TestVSCode_setFunctionBreakpoints on linux adds 2b1dca79f20 lld-link: Run conflict-mangled.test on all systems adds c131e0e2ae5 [MVT] Fix typos in comment. NFC. adds 55c921f4bf3 [DAG] Cleanup unused node in SimplifySelectCC. adds 08b5e68ef67 [InstCombine] add/adjust test for NaN checks; NFC adds c2b35ebc1da [X86] Remove the _alt forms of (V)CMP instructions. Use a c [...] adds 3c2aadbe670 [AMDGPU] Add the missing clang change of the experimental b [...] adds 0c962cb5c84 [libc++][NFC] Promote CMake comment to an actual option des [...] adds 8a595b1d2ed [AArch64] Refactor floating point materialization. NFC adds f6a53d63a10 [OPENMP] Set scheduling for doacross loops as schedule, 1. adds 664c1ef5284 [TargetLowering] Add code size information on isFPImmLegal. NFC adds a3cefa5d649 [AArch64] Optimize floating point materialization adds 270249de2bb [AArch64] Small fix for getIntImmCost adds ad7d0ded2e4 [SCEV] Guard movement of insertion point for loop-invariants adds f07062a7984 [X86] Rename imm8_su/imm16_su/imm32_su to relocImm8_su/relo [...] adds 8723a565517 [MsgPack][AMDGPU] Fix unflushed raw_string_ostream bugs on [...] adds 4aeea4cc423 [DebugInfo][PDB] Don't write empty debug streams adds 8627178d468 Revert r356304: remove subreg parameter from MachineIRBuild [...] adds b6e16ea006a [Sema] Add some compile time _FORTIFY_SOURCE diagnostics adds 2e94f6e584d [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source m [...] adds cfdfba996b0 [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmetic adds 9af9f500d19 Fix flat-error-unsupported-gpu-hsa test adds 65dc65216e9 [API] Remove unneded LLDB_DISABLE_PYTHON markers. adds 1d716acf76d Restore comment regarding why Reloc::PIC_ can't be PIC adds c1d4fc8a625 [InstCombine] Improve with.overflow intrinsic tests; NFC adds 5049c3422d2 [llvm-objcopy] Make .build-id linking atomic adds efb4f9e568b [AMDGPU] Enable code selection using `s_mul_hi_u32`/`s_mul_ [...] adds 0b9c640fe07 [X86] Replace uses of i64immSExt32_su with i64relocImmSExt32_su. adds f086e562f94 [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri pa [...] new 05baa9ee1ae [InstSimplify] Add additional icmp of min/max tests; NFC new f89343bc47d [ValueTracking][InstSimplify] Move abs handling into comput [...] new b7708ec87fc [WebAssembly] Don't override default implementation of isOf [...] new a140276a1e0 [GlobalISel] Include missing change from r356396 new b4a3b29d16e [CMake] Set LLVM_DEFAULT_EXTERNAL_LIT in standalone build c [...] new e732bc6bead [X86] Allow any 8-bit immediate to be used with BT/BTC/BTR/ [...] new 930341ba306 [InstCombine] Add tests for add nuw + uaddo; NFC new 106f0cdefb0 [ValueTracking][InstSimplify] Support min/max selects in co [...] new 2d5e7adf26f A target definition file that may work for Aarch32 Cortex-M [...] new 61b302f94fd Remove exception throwing debug mode handler support. new 18143556559 [NFC][TSan][libdispatch] Fix test for dispatch_apply[_f] new b24bdf626ab [X86] Disable CQTO and CLTQ instructions in the assembly pa [...] new 1dd518da7d2 [X86] Add coverage for 16-bit and 64-bit versions of bsf/bs [...] new cc703de62fd Fix test failures after debug mode changes new 9aac4c1be3c [libFuzzer] document -len_control new 8b653d0308c [X86] Add gcc rotate intrinsics to ia32intrin.h new 3e9770d2dc2 Revert "[ValueTracking][InstSimplify] Support min/max selec [...] The 17 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/pp-trace.rst | 10 +- clang-tools-extra/pp-trace/PPCallbacksTracker.cpp | 13 +- clang-tools-extra/pp-trace/PPCallbacksTracker.h | 15 +- clang-tools-extra/pp-trace/PPTrace.cpp | 80 ++-- .../test/pp-trace/pp-trace-conditional.cpp | 2 +- .../test/pp-trace/pp-trace-filter.cpp | 17 + clang-tools-extra/test/pp-trace/pp-trace-ident.cpp | 2 +- clang-tools-extra/test/pp-trace/pp-trace-macro.cpp | 2 +- .../test/pp-trace/pp-trace-modules.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-general.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-ms.cpp | 2 +- .../test/pp-trace/pp-trace-pragma-opencl.cpp | 2 +- clang/include/clang/AST/Decl.h | 2 +- clang/include/clang/Basic/DiagnosticGroups.td | 2 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 +- clang/include/clang/Sema/Sema.h | 1 + clang/lib/AST/Decl.cpp | 26 +- clang/lib/Basic/Targets/AMDGPU.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 18 + clang/lib/CodeGen/CGOpenMPRuntime.h | 2 +- clang/lib/Headers/ia32intrin.h | 60 +++ clang/lib/Sema/SemaChecking.cpp | 215 ++++++--- clang/lib/Sema/SemaExpr.cpp | 2 + clang/test/Analysis/bstring.c | 13 +- clang/test/Analysis/null-deref-ps-region.c | 2 +- clang/test/Analysis/pr22954.c | 4 +- clang/test/Analysis/string.c | 10 +- clang/test/CodeGen/builtin-expect.c | 17 + clang/test/CodeGen/rot-intrinsics.c | 120 +++++ clang/test/CodeGen/target-data.c | 4 +- clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl | 2 +- clang/test/OpenMP/ordered_doacross_codegen.c | 2 +- clang/test/OpenMP/ordered_doacross_codegen.cpp | 4 +- clang/test/Sema/builtin-object-size.c | 4 +- clang/test/Sema/builtins.c | 10 +- clang/test/Sema/transpose-memset.c | 2 +- clang/test/Sema/warn-fortify-source.c | 83 ++++ clang/test/Sema/warn-strncat-size.c | 2 +- compiler-rt/test/tsan/libdispatch/apply.c | 30 +- libcxx/CMakeLists.txt | 6 +- libcxx/include/__config | 16 - libcxx/include/__debug | 36 +- libcxx/include/__hash_table | 8 +- libcxx/include/iterator | 92 ++-- libcxx/include/list | 12 +- libcxx/include/string | 8 +- libcxx/include/vector | 8 +- libcxx/lib/abi/CHANGELOG.TXT | 41 ++ libcxx/lib/abi/x86_64-apple-darwin.v1.abilist | 14 +- libcxx/lib/abi/x86_64-apple-darwin.v2.abilist | 15 +- libcxx/lib/abi/x86_64-unknown-linux-gnu.v1.abilist | 15 +- libcxx/src/debug.cpp | 59 +-- .../memory_order.underlying_type.pass.cpp | 34 ++ .../sequences/array/array.zero/db_back.pass.cpp | 25 +- .../sequences/array/array.zero/db_front.pass.cpp | 25 +- .../array/array.zero/db_indexing.pass.cpp | 35 +- .../db_associative_container_tests.pass.cpp | 10 +- .../db_sequence_container_iterators.pass.cpp | 108 ++--- .../libcxx/debug/containers/db_string.pass.cpp | 32 +- .../containers/db_unord_container_tests.pass.cpp | 10 +- .../test/libcxx/debug/debug_helper_test.pass.cpp | 70 +++ ...w_register.pass.cpp => debug_register.pass.cpp} | 22 +- libcxx/test/libcxx/debug/debug_throw.pass.cpp | 42 -- .../class.path/path.itr/iterator_db.pass.cpp | 34 +- .../futures/futures.promise/set_exception.pass.cpp | 21 +- .../set_exception_at_thread_exit.pass.cpp | 19 +- ...bug_mode_helper.h => container_debug_tests.hpp} | 122 +++-- libcxx/test/support/debug_mode_helper.h | 533 +++++++++------------ lld/COFF/PDB.cpp | 19 +- lld/ELF/Symbols.cpp | 4 + lld/test/COFF/conflict-mangled.test | 1 - lld/test/COFF/pdb-global-gc.yaml | 1 + lld/test/COFF/pdb-lib.s | 6 +- lld/test/COFF/pdb.test | 2 +- .../ELF/Inputs/{start-lib2.s => dummy-shared.s} | 0 lld/test/ELF/pie-weak.s | 6 +- lld/test/ELF/relocation-relative-weak.s | 4 +- lld/test/ELF/weak-undef-no-shared-libs.s | 28 ++ lld/test/ELF/weak-undef.s | 4 +- lldb/cmake/modules/LLDBStandalone.cmake | 7 +- .../python/armv7_cortex_m_target_defintion.py | 140 ++++++ lldb/examples/synthetic/gnu_libstdcpp.py | 5 +- lldb/include/lldb/API/SBDebugger.h | 4 - lldb/include/lldb/API/SBTypeCategory.h | 18 - lldb/include/lldb/API/SBTypeSynthetic.h | 4 - lldb/include/lldb/API/SBValue.h | 2 - lldb/include/lldb/Core/Module.h | 7 +- .../SymbolFile/Inputs/target-symbols-add-unwind.c | 1 + lldb/lit/SymbolFile/target-symbols-add-unwind.test | 26 + .../TestCommandScriptImmediateOutput.py | 6 +- .../TestVSCode_setFunctionBreakpoints.py | 1 + lldb/source/API/SBDebugger.cpp | 4 - lldb/source/API/SBFrame.cpp | 8 +- lldb/source/API/SBReproducer.cpp | 8 - lldb/source/API/SBTarget.cpp | 9 +- lldb/source/API/SBTypeCategory.cpp | 18 - lldb/source/API/SBTypeSynthetic.cpp | 4 - lldb/source/API/SBValue.cpp | 2 - lldb/source/Core/Module.cpp | 10 + .../Plugins/Process/minidump/MinidumpParser.cpp | 11 +- .../Plugins/Process/minidump/MinidumpTypes.cpp | 12 +- lldb/source/Symbol/UnwindTable.cpp | 2 +- llvm/docs/AMDGPUUsage.rst | 14 +- llvm/docs/LangRef.rst | 3 +- llvm/docs/LibFuzzer.rst | 4 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 3 +- llvm/include/llvm/CodeGen/TargetLowering.h | 3 +- llvm/include/llvm/CodeGen/ValueTypes.td | 166 +++---- .../llvm/DebugInfo/PDB/Native/ModuleDebugStream.h | 2 + llvm/include/llvm/IR/Intrinsics.td | 4 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 12 +- llvm/include/llvm/Support/CodeGen.h | 5 +- llvm/include/llvm/Support/FileSystem.h | 25 +- llvm/include/llvm/Support/MachineValueType.h | 178 ++++--- .../llvm/Support/X86DisassemblerDecoderCommon.h | 2 - llvm/lib/Analysis/InstructionSimplify.cpp | 41 -- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 88 ++-- llvm/lib/Analysis/ValueTracking.cpp | 32 ++ llvm/lib/BinaryFormat/MsgPackDocumentYAML.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 114 +++-- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 3 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/ValueTypes.cpp | 8 + .../PDB/Native/DbiModuleDescriptorBuilder.cpp | 6 +- .../lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | 16 +- llvm/lib/Support/Path.cpp | 53 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 47 +- llvm/lib/Target/AArch64/AArch64ExpandImm.cpp | 408 ++++++++++++++++ llvm/lib/Target/AArch64/AArch64ExpandImm.h | 35 ++ .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 504 ++----------------- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 19 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 19 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 6 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPU.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 5 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 34 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 67 ++- llvm/lib/Target/AMDGPU/SIInstructions.td | 45 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 12 +- llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 2 + llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 6 +- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 4 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 9 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 50 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 3 +- llvm/lib/Target/ARM/ARMISelLowering.h | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 3 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 3 +- llvm/lib/Target/Mips/MipsISelLowering.cpp | 3 +- llvm/lib/Target/Mips/MipsISelLowering.h | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 3 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 3 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 3 +- llvm/lib/Target/TargetMachine.cpp | 2 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 6 - .../Target/WebAssembly/WebAssemblyISelLowering.h | 1 - llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 27 +- .../Target/X86/Disassembler/X86Disassembler.cpp | 60 --- .../Target/X86/InstPrinter/X86ATTInstPrinter.cpp | 137 +++++- .../lib/Target/X86/InstPrinter/X86ATTInstPrinter.h | 31 +- .../X86/InstPrinter/X86InstPrinterCommon.cpp | 61 +++ .../Target/X86/InstPrinter/X86InstPrinterCommon.h | 1 + .../Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 136 +++++- .../Target/X86/InstPrinter/X86IntelInstPrinter.h | 36 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- llvm/lib/Target/X86/X86InstrAVX512.td | 119 ++--- llvm/lib/Target/X86/X86InstrArithmetic.td | 8 +- llvm/lib/Target/X86/X86InstrCompiler.td | 4 +- llvm/lib/Target/X86/X86InstrExtension.td | 4 +- llvm/lib/Target/X86/X86InstrFoldTables.cpp | 30 +- llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 4 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 11 + llvm/lib/Target/X86/X86InstrInfo.td | 165 +++---- llvm/lib/Target/X86/X86InstrSSE.td | 91 ++-- llvm/lib/Target/X86/X86InstrShiftRotate.td | 10 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 16 - .../Transforms/InstCombine/InstCombineCalls.cpp | 52 +- llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll | 40 ++ llvm/test/CodeGen/AArch64/arm64-fp-imm.ll | 7 +- llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 72 +-- llvm/test/CodeGen/AArch64/fpimm.ll | 12 +- llvm/test/CodeGen/AArch64/immcost.ll | 106 ++++ llvm/test/CodeGen/AArch64/literal_pools_float.ll | 11 +- llvm/test/CodeGen/AArch64/misched-fusion-lit.ll | 15 + llvm/test/CodeGen/AArch64/win_cst_pool.ll | 16 +- llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll | 40 ++ .../AMDGPU/coalescer-extend-pruned-subrange.mir | 6 +- .../coalescer-subranges-another-prune-error.mir | 2 +- .../coalescer-with-subregs-bad-identical.mir | 2 +- llvm/test/CodeGen/AMDGPU/endpgm-dce.mir | 2 +- .../AMDGPU/flat-error-unsupported-gpu-hsa.ll | 2 +- llvm/test/CodeGen/AMDGPU/fold-cndmask.mir | 8 +- .../fold-immediate-operand-shrink-with-carry.mir | 18 +- .../AMDGPU/fold-immediate-operand-shrink.mir | 50 +- .../CodeGen/AMDGPU/global-load-store-atomics.mir | 4 +- llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir | 4 +- .../AMDGPU/macro-fusion-cluster-vcc-uses.mir | 64 +-- llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir | 6 +- llvm/test/CodeGen/AMDGPU/mul.ll | 6 + .../AMDGPU/optimize-negated-cond-exec-masking.mir | 58 +-- .../CodeGen/AMDGPU/promote-constOffset-to-imm.mir | 68 +-- .../CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll | 5 +- .../CodeGen/AMDGPU/regcoal-subrange-join-seg.mir | 2 +- llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir | 20 +- llvm/test/CodeGen/AMDGPU/sdwa-ops.mir | 60 +-- llvm/test/CodeGen/AMDGPU/shrink-carry.mir | 8 +- llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 44 +- .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 2 +- .../AMDGPU/undefined-physreg-sgpr-spill.mir | 4 +- .../CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll | 17 + .../test/CodeGen/AMDGPU/vop-shrink-frame-index.mir | 12 +- llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir | 4 +- .../test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir | 2 +- llvm/test/CodeGen/SystemZ/buildvector-00.ll | 8 +- llvm/test/CodeGen/SystemZ/dag-combine-03.ll | 16 +- llvm/test/CodeGen/X86/absolute-rotate.ll | 16 + llvm/test/CodeGen/X86/xor.ll | 5 +- llvm/test/DebugInfo/ARM/float-stack-arg.ll | 53 ++ llvm/test/MC/AMDGPU/vop3-gfx9.s | 37 ++ llvm/test/MC/AMDGPU/vop3.s | 38 +- llvm/test/MC/Disassembler/AMDGPU/vop3_gfx9.txt | 28 ++ llvm/test/MC/Disassembler/AMDGPU/vop3_vi.txt | 28 ++ llvm/test/MC/X86/I386-32.s | 116 ++++- llvm/test/MC/X86/I386-64.s | 187 +++++++- llvm/test/MC/X86/I86-32.s | 8 + llvm/test/MC/X86/I86-64.s | 16 + llvm/test/MC/X86/x86-32-avx.s | 12 +- llvm/test/MC/X86/x86-32.s | 16 +- llvm/test/MC/X86/x86_64-avx-encoding.s | 12 +- llvm/test/MC/X86/x86_errors.s | 6 + llvm/test/TableGen/intrinsic-varargs.td | 2 +- llvm/test/Transforms/InstCombine/and-fcmp.ll | 54 ++- llvm/test/Transforms/InstCombine/fsh.ll | 58 ++- llvm/test/Transforms/InstCombine/or-fcmp.ll | 52 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 127 ++--- .../Transforms/InstCombine/uadd-with-overflow.ll | 131 +++++ llvm/test/Transforms/InstCombine/with_overflow.ll | 54 +++ .../test/Transforms/InstSimplify/cmp_of_min_max.ll | 150 ++++++ .../Transforms/LoopVectorize/pr30806-phi-scev.ll | 66 +++ llvm/test/Transforms/LoopVectorize/pr30806.ll | 65 +++ .../Transforms/LowerExpectIntrinsic/PR33346.ll | 4 +- llvm/test/Verifier/intrinsic-immarg.ll | 9 - llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s | 16 +- llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/BdVer2/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/BdVer2/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/BdVer2/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Broadwell/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Broadwell/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/BtVer2/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/BtVer2/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Generic/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Generic/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Haswell/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Haswell/resources-sse2.s | 16 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s | 16 +- llvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 48 +- .../llvm-mca/X86/SandyBridge/resources-sse1.s | 16 +- .../llvm-mca/X86/SandyBridge/resources-sse2.s | 16 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 48 +- .../llvm-mca/X86/SkylakeClient/resources-sse1.s | 16 +- .../llvm-mca/X86/SkylakeClient/resources-sse2.s | 16 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 48 +- .../llvm-mca/X86/SkylakeServer/resources-sse1.s | 16 +- .../llvm-mca/X86/SkylakeServer/resources-sse2.s | 16 +- .../tools/llvm-mca/X86/Znver1/resources-avx1.s | 48 +- .../tools/llvm-mca/X86/Znver1/resources-sse1.s | 16 +- .../tools/llvm-mca/X86/Znver1/resources-sse2.s | 16 +- .../tools/llvm-objcopy/ELF/basic-archive-copy.test | 2 +- .../ELF/cross-arch-sections-symbols.test | 2 +- .../tools/llvm-objcopy/ELF/shstrtab-optimize.test | 28 ++ .../tools/llvm-objcopy/ELF/strtab-optimize.test | 21 + llvm/tools/llvm-exegesis/llvm-exegesis.cpp | 47 +- llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp | 52 +- llvm/tools/llvm-objcopy/ELF/Object.cpp | 22 +- llvm/tools/llvm-objcopy/ELF/Object.h | 2 +- llvm/utils/TableGen/CodeGenTarget.cpp | 4 + llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 3 + llvm/utils/TableGen/X86RecognizableInstr.cpp | 10 +- 299 files changed, 5612 insertions(+), 3428 deletions(-) create mode 100644 clang-tools-extra/test/pp-trace/pp-trace-filter.cpp create mode 100644 clang/test/CodeGen/rot-intrinsics.c create mode 100644 clang/test/Sema/warn-fortify-source.c create mode 100644 libcxx/test/libcxx/atomics/atomics.order/memory_order.underlyin [...] create mode 100644 libcxx/test/libcxx/debug/debug_helper_test.pass.cpp rename libcxx/test/libcxx/debug/{debug_throw_register.pass.cpp => debug_register.p [...] delete mode 100644 libcxx/test/libcxx/debug/debug_throw.pass.cpp copy libcxx/test/support/{debug_mode_helper.h => container_debug_tests.hpp} (77%) copy lld/test/ELF/Inputs/{start-lib2.s => dummy-shared.s} (100%) create mode 100644 lld/test/ELF/weak-undef-no-shared-libs.s create mode 100755 lldb/examples/python/armv7_cortex_m_target_defintion.py create mode 100644 lldb/lit/SymbolFile/Inputs/target-symbols-add-unwind.c create mode 100644 lldb/lit/SymbolFile/target-symbols-add-unwind.test create mode 100644 llvm/lib/Target/AArch64/AArch64ExpandImm.cpp create mode 100644 llvm/lib/Target/AArch64/AArch64ExpandImm.h create mode 100644 llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll create mode 100644 llvm/test/CodeGen/AArch64/immcost.ll create mode 100644 llvm/test/CodeGen/AMDGPU/vectorize-buffer-fat-pointer.ll create mode 100644 llvm/test/DebugInfo/ARM/float-stack-arg.ll create mode 100644 llvm/test/Transforms/InstCombine/uadd-with-overflow.ll create mode 100644 llvm/test/Transforms/InstSimplify/cmp_of_min_max.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr30806-phi-scev.ll create mode 100644 llvm/test/Transforms/LoopVectorize/pr30806.ll create mode 100644 llvm/test/tools/llvm-objcopy/ELF/shstrtab-optimize.test create mode 100644 llvm/test/tools/llvm-objcopy/ELF/strtab-optimize.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (d27571fb -> 8c4ec63c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards d27571fb 2: good: llvm-linux: 5371 new 8c4ec63c 2: good: llvm-linux: 5371 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d27571fb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 70 +- 2-build_llvm/console.log | 10374 +++++++++++++++++++------------------- 3-build_linux/console.log | 110 +- 5-check_regression/console.log | 2 +- 6-update_baseline/console.log | 8 +- console.log | 10564 ++++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 10628 insertions(+), 10508 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits March 2019