Tcwg-commits December 2019

tcwg-commits@lists.linaro.org

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig updated (35f54868a08 -> 28cf2ba7415)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig in repository toolchain/ci/gcc. from 35f54868a08 Daily bump. adds 8a77631cd23 Daily bump. adds 28cf2ba7415 [Darwin, PPC] Use Darwin9 bundle header for Rosetta builds. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 11 +++++++++++ gcc/DATESTAMP | 2 +- gcc/config/darwin.h | 11 +++++++---- gcc/config/rs6000/darwin.h | 18 ++++++++++++------ 4 files changed, 31 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig updated (65d21b82 -> 8b068601)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 65d21b82 2: update: binutils-gcc-linux: 18079 new 8b068601 2: update: binutils-gcc-linux: 18079 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (65d21b82) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 262 +- 03-build_abe-binutils/console.log | 10794 +++++++-------- 04-build_abe-stage1/console.log | 13222 +++++++++---------- 05-build_linux/console.log | 736 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 6 +- console.log | 25218 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 9 files changed, 25211 insertions(+), 25167 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (35f54868a08 -> 8a77631cd23)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/gcc. from 35f54868a08 Daily bump. adds 8a77631cd23 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig updated (4aa6ed5a -> 6f4564fa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 4aa6ed5a 0: update: binutils-gcc-linux: all new 6f4564fa 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4aa6ed5a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 11050 +++++++-------- 04-build_abe-stage1/console.log | 14157 ++++++++++--------- 05-build_linux/console.log | 648 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 10 +- console.log | 26452 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 26427 insertions(+), 26466 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (35f54868a08 -> 28cf2ba7415)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/gcc. from 35f54868a08 Daily bump. adds 8a77631cd23 Daily bump. new 28cf2ba7415 [Darwin, PPC] Use Darwin9 bundle header for Rosetta builds. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 11 +++++++++++ gcc/DATESTAMP | 2 +- gcc/config/darwin.h | 11 +++++++---- gcc/config/rs6000/darwin.h | 18 ++++++++++++------ 4 files changed, 31 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (4a946756 -> d4235b30)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 4a946756 0: update: binutils-gcc-linux: all new d4235b30 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4a946756) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11060 ++++++------- 04-build_abe-stage1/console.log | 18646 ++++++++++----------- 05-build_linux/console.log | 822 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 31165 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 31192 insertions(+), 31119 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 11 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (ab8a7a29bf1 -> c5b4a2386b5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from ab8a7a29bf1 [lldb] Adapt for NetBSD-9.99.30 ptrace(2) API changes adds 1f054d667e2 AMDGPU/GlobalISel: Fix mapping and selection of llvm.amdgcn [...] adds 3732f4e093f [OPENMP]Add extra checks and initialization for clause modifier. adds 502a77f125f Migrate function attribute "no-frame-pointer-elim" to "fram [...] adds eb16435b5e5 Migrate function attribute "no-frame-pointer-elim-non-leaf" [...] adds a36ddf0aa9d Migrate function attribute "no-frame-pointer-elim"="false" [...] adds 9f6b13e5cce [Support] Fix behavior of StringRef::count with overlapping [...] adds c853c73d3de [Thumb][test] Fix CodeGen/Thumb/PR17309.ll after llvmorg-1 [...] adds 1ac7c50ded4 [WinEH] Delete addFnAttr("no-frame-pointer-elim") which see [...] adds 583ef13f0be [MCJIT] Migrate function attribute "no-frame-pointer-elim" [...] adds 58f324a468f [Attributor] Function level undefined behavior attribute adds 5732f56bbd2 [Attributor] UB Attribute now handles all instructions that [...] adds 52b5fe5f45b [compiler-rt] [netbsd] Define _RTLD_SOURCE to fix build adds 27dc4c319b5 [X86FixupSetCC] Use MachineInstr::readRegister/definesRegis [...] adds 1d5d074aef2 [Attributor] Reach optimistic fixpoint in AAValueSimplify [...] adds 1497a4350e2 [MLIR][NFC] Insert const_cast to avoid warning adds 8304781cae9 Add missing strict_fp_to_int adds 604d7fbfc1e [llvm-readobj/llvm-readelf][test] - Add testing for EI_OSAB [...] adds 1a2d2b492a3 [llvm-readobj] - Merge `gnu-symbols.test` to `symbols.test` [...] adds 80c45e49c33 [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. adds aff6c9db9a9 [compiler-rt] [netbsd] Correct the fallback definition of P [...] adds ba1cdba4c48 [llvm-nm] Display STT_GNU_IFUNC as 'i' adds 2498d882598 [X86] Merge together some common code in LowerFP_TO_INT now [...] adds caf460d979a [lldb][NFC] Use StringRef in ClangASTContext::GetBuiltinTyp [...] adds 4af5b23db30 [X86FixupSetCC] Remember the preceding eflags defining inst [...] adds c5b4a2386b5 [X86] Use zero vector to extend to 512-bits for strict_fp_t [...] No new revisions were added by this update. Summary of changes: clang/lib/Parse/ParseOpenMP.cpp | 9 +- clang/lib/Sema/SemaOpenMP.cpp | 8 + clang/test/CodeGen/backend-unsupported-error.ll | 2 +- .../sanitizer_common/sanitizer_linux_libcdep.cpp | 4 + .../sanitizer_platform_limits_netbsd.cpp | 4 +- lld/test/COFF/Inputs/undefined-symbol-lto-a.ll | 4 +- lld/test/COFF/Inputs/undefined-symbol-lto-b.ll | 2 +- lld/test/COFF/lto-cpu-string.ll | 2 +- lld/test/ELF/lto/cpu-string.ll | 2 +- lld/test/ELF/ppc64-ifunc.s | 4 +- lld/test/wasm/Inputs/debuginfo1.ll | 6 +- lld/test/wasm/Inputs/debuginfo2.ll | 2 +- lld/test/wasm/debug-removed-fn.ll | 2 +- lldb/include/lldb/Symbol/ClangASTContext.h | 6 +- .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 4 +- lldb/source/Symbol/ClangASTContext.cpp | 82 +++--- llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst | 163 +++++------ llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst | 15 +- llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst | 15 +- llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst | 19 +- llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst | 58 ++++ llvm/docs/AMDGPU/AMDGPUAsmGFX904.rst | 58 ++++ llvm/docs/AMDGPU/AMDGPUAsmGFX906.rst | 93 +++++++ llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst | 165 +++++++++++ ...x9_mad_type_dev.rst => gfx900_mad_type_dev.rst} | 2 +- ...ad_type_dev.rst => gfx900_mod_vop3_abs_neg.rst} | 9 +- llvm/docs/AMDGPU/gfx900_src32_0.rst | 17 ++ llvm/docs/AMDGPU/gfx900_src32_1.rst | 17 ++ .../{gfx9_mad_type_dev.rst => gfx900_vdst32_0.rst} | 10 +- ...x9_mad_type_dev.rst => gfx904_mad_type_dev.rst} | 2 +- ...ad_type_dev.rst => gfx904_mod_vop3_abs_neg.rst} | 9 +- llvm/docs/AMDGPU/gfx904_src32_0.rst | 17 ++ llvm/docs/AMDGPU/gfx904_src32_1.rst | 17 ++ .../{gfx9_mad_type_dev.rst => gfx904_vdst32_0.rst} | 10 +- ...x9_mad_type_dev.rst => gfx906_mad_type_dev.rst} | 2 +- ...ype_dev.rst => gfx906_mod_dpp_sdwa_abs_neg.rst} | 9 +- ...9_mad_type_dev.rst => gfx906_mod_sdwa_sext.rst} | 9 +- ...ad_type_dev.rst => gfx906_mod_vop3_abs_neg.rst} | 9 +- llvm/docs/AMDGPU/gfx906_src32_0.rst | 17 ++ llvm/docs/AMDGPU/gfx906_src32_1.rst | 17 ++ llvm/docs/AMDGPU/gfx906_src32_2.rst | 17 ++ .../{gfx9_mad_type_dev.rst => gfx906_type_dev.rst} | 9 +- .../{gfx9_mad_type_dev.rst => gfx906_vdst32_0.rst} | 10 +- .../{gfx9_mad_type_dev.rst => gfx906_vsrc32_0.rst} | 10 +- llvm/docs/AMDGPU/gfx908_addr_buf.rst | 22 ++ ...gfx9_mad_type_dev.rst => gfx908_adst1024_0.rst} | 10 +- ...{gfx9_mad_type_dev.rst => gfx908_adst128_0.rst} | 10 +- .../{gfx9_mad_type_dev.rst => gfx908_adst32_0.rst} | 10 +- ...{gfx9_mad_type_dev.rst => gfx908_adst512_0.rst} | 10 +- ...gfx9_mad_type_dev.rst => gfx908_asrc1024_0.rst} | 10 +- ...{gfx9_mad_type_dev.rst => gfx908_asrc128_0.rst} | 10 +- .../{gfx9_mad_type_dev.rst => gfx908_asrc32_0.rst} | 10 +- ...{gfx9_mad_type_dev.rst => gfx908_asrc512_0.rst} | 10 +- llvm/docs/AMDGPU/gfx908_data_buf_atomic32.rst | 21 ++ ...d_type_dev.rst => gfx908_dst_flat_atomic32.rst} | 12 +- ...x9_mad_type_dev.rst => gfx908_mad_type_dev.rst} | 2 +- ...ype_dev.rst => gfx908_mod_dpp_sdwa_abs_neg.rst} | 9 +- ...9_mad_type_dev.rst => gfx908_mod_sdwa_sext.rst} | 9 +- ...ad_type_dev.rst => gfx908_mod_vop3_abs_neg.rst} | 9 +- llvm/docs/AMDGPU/gfx908_offset_buf.rst | 17 ++ .../{gfx9_mad_type_dev.rst => gfx908_opt.rst} | 9 +- .../{gfx9_mad_type_dev.rst => gfx908_ret.rst} | 9 +- .../{gfx9_mad_type_dev.rst => gfx908_rsrc_buf.rst} | 10 +- llvm/docs/AMDGPU/gfx908_saddr_flat_global.rst | 19 ++ llvm/docs/AMDGPU/gfx908_src32_0.rst | 17 ++ llvm/docs/AMDGPU/gfx908_src32_1.rst | 17 ++ llvm/docs/AMDGPU/gfx908_src32_2.rst | 17 ++ .../{gfx9_mad_type_dev.rst => gfx908_src32_3.rst} | 10 +- .../{gfx9_mad_type_dev.rst => gfx908_type_dev.rst} | 9 +- llvm/docs/AMDGPU/gfx908_vaddr_flat_global.rst | 22 ++ ...{gfx9_mad_type_dev.rst => gfx908_vasrc32_0.rst} | 10 +- ...{gfx9_mad_type_dev.rst => gfx908_vasrc64_0.rst} | 10 +- ...{gfx9_mad_type_dev.rst => gfx908_vdata32_0.rst} | 10 +- .../{gfx9_mad_type_dev.rst => gfx908_vdst32_0.rst} | 10 +- .../{gfx9_mad_type_dev.rst => gfx908_vsrc32_0.rst} | 10 +- llvm/docs/AMDGPUModifierSyntax.rst | 55 +++- llvm/docs/AMDGPUOperandSyntax.rst | 60 ++++ llvm/docs/AMDGPUUsage.rst | 38 ++- llvm/docs/SourceLevelDebugging.rst | 2 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 26 ++ .../ExecutionEngine/ExecutionEngineBindings.cpp | 6 +- llvm/lib/Support/StringRef.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 6 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 + llvm/lib/Target/X86/X86FixupSetCC.cpp | 46 +--- llvm/lib/Target/X86/X86ISelLowering.cpp | 39 +-- llvm/lib/Target/X86/X86WinEHState.cpp | 5 - llvm/lib/Transforms/IPO/Attributor.cpp | 125 ++++++++- .../test/Analysis/BranchProbabilityInfo/pr22718.ll | 6 +- .../CostModel/SystemZ/intrinsic-cost-crash.ll | 2 +- .../constant_functions_multi_dim.ll | 4 +- .../Analysis/DependenceAnalysis/MIVCheckConst.ll | 2 +- .../NonCanonicalizedSubscript.ll | 2 +- .../invariant.group-bug.ll | 4 +- llvm/test/Analysis/MemorySSA/pr28880.ll | 2 +- llvm/test/Analysis/MemorySSA/pr39197.ll | 2 +- llvm/test/Analysis/MemorySSA/pr40038.ll | 2 +- llvm/test/Analysis/ScalarEvolution/pr22674.ll | 2 +- .../ScalarEvolution/scev-canonical-mode.ll | 2 +- .../Analysis/TypeBasedAliasAnalysis/PR17620.ll | 4 +- .../Analysis/TypeBasedAliasAnalysis/tbaa-path.ll | 2 +- llvm/test/Bitcode/DILocation-implicit-code.ll | 4 +- llvm/test/Bitcode/drop-debug-info.3.5.ll | 2 +- llvm/test/Bitcode/upgrade-tbaa.ll | 2 +- llvm/test/BugPoint/func-attrs-keyval.ll | 2 +- llvm/test/BugPoint/func-attrs.ll | 4 +- .../CodeGen/AArch64/GlobalISel/inline-memcpy.mir | 2 +- .../CodeGen/AArch64/GlobalISel/inline-memmove.mir | 2 +- .../CodeGen/AArch64/GlobalISel/inline-memset.mir | 2 +- .../aarch64-2014-08-11-MachineCombinerCrash.ll | 2 +- .../AArch64/aarch64-a57-fp-load-balancing.ll | 4 +- .../AArch64/aarch64-fix-cortex-a53-835769.ll | 4 +- .../CodeGen/AArch64/aarch64-mov-debug-locs.mir | 4 +- .../test/CodeGen/AArch64/arm64-detect-vec-redux.ll | 2 +- .../AArch64/arm64-fma-combine-with-fpfusion.ll | 2 +- .../CodeGen/AArch64/arm64-indexed-vector-ldst-2.ll | 2 +- .../CodeGen/AArch64/arm64-misched-basic-A53.ll | 2 +- .../CodeGen/AArch64/arm64-misched-basic-A57.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll | 4 +- .../AArch64/arm64-triv-disjoint-mem-access.ll | 2 +- .../CodeGen/AArch64/branch-relax-block-size.mir | 2 +- llvm/test/CodeGen/AArch64/consthoist-gep.ll | 2 +- llvm/test/CodeGen/AArch64/cxx-tlscc.ll | 2 +- .../test/CodeGen/AArch64/dag-combine-invaraints.ll | 4 +- llvm/test/CodeGen/AArch64/large-stack.ll | 2 +- .../AArch64/loopvectorize_pr33804_double.ll | 2 +- .../CodeGen/AArch64/machine-outliner-all-stack.mir | 2 +- .../machine-outliner-compatible-candidates.mir | 2 +- .../AArch64/machine-outliner-drop-stack.mir | 2 +- .../CodeGen/AArch64/machine-outliner-regsave.mir | 2 +- .../CodeGen/AArch64/machine-outliner-remarks.ll | 2 +- .../machine-outliner-retaddr-sign-regsave.mir | 2 +- .../machine-outliner-retaddr-sign-sp-mod.mir | 2 +- .../CodeGen/AArch64/machine-outliner-size-info.mir | 2 +- .../AArch64/machine-outliner-unsafe-stack-call.mir | 2 +- llvm/test/CodeGen/AArch64/machine-outliner.mir | 2 +- llvm/test/CodeGen/AArch64/preferred-alignment.ll | 4 +- .../test/CodeGen/AArch64/sched-past-vector-ldst.ll | 2 +- llvm/test/CodeGen/AArch64/stack_guard_remat.ll | 2 +- .../test/CodeGen/AArch64/vector_merge_dep_check.ll | 2 +- llvm/test/CodeGen/AArch64/win64_vararg.ll | 2 +- llvm/test/CodeGen/AArch64/wineh-frame5.mir | 4 +- llvm/test/CodeGen/AArch64/wineh-frame6.mir | 4 +- llvm/test/CodeGen/AArch64/wineh-frame7.mir | 4 +- llvm/test/CodeGen/AArch64/wineh-frame8.mir | 2 +- llvm/test/CodeGen/AArch64/wineh5.mir | 4 +- llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir | 4 +- .../CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir | 2 +- llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll | 2 +- llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll | 2 +- llvm/test/CodeGen/ARM/2010-12-07-PEIBug.ll | 2 +- llvm/test/CodeGen/ARM/2011-08-25-ldmia_ret.ll | 2 +- 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llvm/test/Transforms/NewGVN/pr34430.ll | 2 +- llvm/test/Transforms/NewGVN/pr34452.ll | 2 +- .../Reassociate/reassociate-landingpad.ll | 2 +- .../NVPTX/non-vectorizable-intrinsic.ll | 2 +- .../SLPVectorizer/X86/consecutive-access.ll | 2 +- .../Transforms/SLPVectorizer/X86/crash_bullet3.ll | 2 +- .../Transforms/SLPVectorizer/X86/crash_flop7.ll | 2 +- .../Transforms/SLPVectorizer/X86/crash_smallpt.ll | 2 +- .../Transforms/SLPVectorizer/X86/debug_info.ll | 2 +- .../X86/insert-element-build-vector.ll | 2 +- llvm/test/Transforms/SLPVectorizer/X86/pr16899.ll | 2 +- .../Transforms/SLPVectorizer/X86/vector_gep.ll | 2 +- llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll | 2 +- llvm/test/Transforms/SafeStack/ARM/debug.ll | 6 +- llvm/test/Transforms/SafeStack/X86/debug-loc.ll | 4 +- llvm/test/Transforms/SafeStack/X86/debug-loc2.ll | 4 +- llvm/test/Transforms/SampleProfile/branch.ll | 6 +- .../Transforms/SampleProfile/entry_counts_cold.ll | 4 +- .../SampleProfile/entry_counts_missing_dbginfo.ll | 4 +- llvm/test/Transforms/SampleProfile/gcc-simple.ll | 4 +- llvm/test/Transforms/SampleProfile/inline-act.ll | 2 +- llvm/test/Transforms/SampleProfile/offset.ll | 2 +- llvm/test/Transforms/SampleProfile/propagate.ll | 6 +- llvm/test/Transforms/SampleProfile/remarks.ll | 4 +- llvm/test/Transforms/Scalarizer/dbginfo.ll | 2 +- .../SimplifyCFG/Hexagon/switch-to-lookup-table.ll | 2 +- .../Transforms/SimplifyCFG/merge-cleanuppads.ll | 4 +- .../Transforms/SimplifyCFG/volatile-phioper.ll | 4 +- .../StraightLineStrengthReduce/AMDGPU/pr23975.ll | 2 +- llvm/test/Transforms/Util/dbg-user-of-aext.ll | 2 +- .../Transforms/Util/libcalls-fast-math-inf-loop.ll | 4 +- llvm/test/tools/dsymutil/Inputs/frame-dw2.ll | 4 +- llvm/test/tools/dsymutil/Inputs/frame-dw4.ll | 4 +- llvm/test/tools/gold/X86/split-dwarf.ll | 2 +- llvm/test/tools/llvm-lib/Inputs/arm64.ll | 2 +- llvm/test/tools/llvm-lib/Inputs/i386.ll | 2 +- llvm/test/tools/llvm-lib/Inputs/x86_64.ll | 2 +- llvm/test/tools/llvm-nm/ifunc.test | 27 ++ .../test/tools/llvm-objdump/AMDGPU/source-lines.ll | 2 +- .../Hexagon/source-interleave-hexagon.ll | 2 +- .../source-interleave-same-line-different-file.ll | 2 +- .../llvm-objdump/X86/Inputs/source-interleave.ll | 2 +- .../X86/disassemble-archive-with-source.ll | 2 +- .../llvm-readobj/ELF/Inputs/relocs.obj.elf-x86_64 | Bin 1984 -> 0 bytes .../ELF/Inputs/symbols-proc-specific.elf-hexagon | Bin 600 -> 0 bytes .../llvm-readobj/ELF/file-header-abi-version.test | 47 ++++ .../tools/llvm-readobj/ELF/file-header-os-abi.test | 305 +++++++++++++++++++++ llvm/test/tools/llvm-readobj/ELF/gnu-symbols.test | 57 ---- llvm/test/tools/llvm-readobj/ELF/symbols.test | 143 +++++++--- llvm/tools/llvm-nm/llvm-nm.cpp | 13 +- llvm/unittests/ADT/StringRefTest.cpp | 7 + mlir/include/mlir/IR/Value.h | 2 +- mlir/include/mlir/Pass/PassOptions.h | 3 +- polly/docs/experiments/matmul/matmul.ll | 4 +- polly/docs/experiments/matmul/matmul.normalopt.ll | 8 +- ...atmul.polly.interchanged+tiled+vector+openmp.ll | 6 +- .../matmul.polly.interchanged+tiled+vector.ll | 8 +- .../matmul/matmul.polly.interchanged+tiled.ll | 8 +- .../matmul/matmul.polly.interchanged.ll | 8 +- polly/docs/experiments/matmul/matmul.preopt.ll | 4 +- polly/test/DependenceInfo/fine_grain_dep_0.ll | 2 +- polly/test/ForwardOpTree/atax.ll | 2 +- polly/test/ForwardOpTree/jacobi-1d.ll | 2 +- polly/test/GPGPU/host-statement.ll | 2 +- .../test/GPGPU/kernels-names-across-scops-funcs.ll | 4 +- polly/test/GPGPU/scheduler-timeout.ll | 2 +- polly/test/GPGPU/untouched-arrays.ll | 2 +- .../Isl/Ast/runtime_context_with_error_blocks.ll | 4 +- polly/test/Isl/CodeGen/OpenMP/mapped-phi-access.ll | 2 +- .../reference-argument-from-non-affine-region.ll | 2 +- ...t_load_instruction_referenced_by_parameter_1.ll | 8 +- ...t_load_instruction_referenced_by_parameter_2.ll | 4 +- polly/test/Isl/CodeGen/debug-intrinsics.ll | 2 +- .../error_block_contains_invalid_memory_access.ll | 4 +- polly/test/Isl/CodeGen/hoisting_1.ll | 2 +- polly/test/Isl/CodeGen/hoisting_2.ll | 2 +- polly/test/Isl/CodeGen/intrinsics_lifetime.ll | 2 +- polly/test/Isl/CodeGen/intrinsics_misc.ll | 2 +- .../Isl/CodeGen/invariant_cannot_handle_void.ll | 2 +- .../invariant_load_different_sized_types.ll | 2 +- ...nvariant_load_not_executed_but_in_parameters.ll | 8 +- .../CodeGen/invariant_verify_function_failed.ll | 4 +- .../CodeGen/invariant_verify_function_failed_2.ll | 2 +- .../CodeGen/loop-invariant-load-type-mismatch.ll | 2 +- .../Isl/CodeGen/multiple-types-invariant-load-2.ll | 2 +- polly/test/Isl/CodeGen/out-of-scop-phi-node-use.ll | 2 +- polly/test/Isl/CodeGen/phi-defined-before-scop.ll | 2 +- polly/test/Isl/CodeGen/pr25241.ll | 2 +- .../Isl/CodeGen/scev_expansion_in_nonaffine.ll | 2 +- .../pattern-matching-based-opts-after-delicm.ll | 2 +- .../prevectorization-without-tiling.ll | 2 +- polly/test/ScheduleOptimizer/prevectorization.ll | 2 +- .../test/ScopDetect/error-block-always-executed.ll | 4 +- .../ScopDetect/error-block-referenced-from-scop.ll | 4 +- polly/test/ScopDetect/expand-region-correctly-2.ll | 2 +- polly/test/ScopDetect/intrinsics_1.ll | 4 +- polly/test/ScopDetect/intrinsics_2.ll | 2 +- polly/test/ScopDetect/intrinsics_3.ll | 2 +- polly/test/ScopDetect/report-scop-location.ll | 2 +- .../ReportIrreducibleRegion.ll | 2 +- .../ScopDetectionDiagnostics/ReportLoopBound-01.ll | 2 +- .../ReportLoopHasNoExit.ll | 2 +- .../ReportNonAffineAccess-01.ll | 2 +- .../ScopDetectionDiagnostics/ReportUnprofitable.ll | 2 +- .../ReportVariantBasePtr-01.ll | 2 +- polly/test/ScopInfo/BoundChecks/single-loop.ll | 4 +- polly/test/ScopInfo/BoundChecks/two-loops.ll | 4 +- polly/test/ScopInfo/complex-expression.ll | 2 +- .../ScopInfo/constant_functions_as_unknowns.ll | 4 +- .../test/ScopInfo/constant_functions_multi_dim.ll | 4 +- .../ScopInfo/do-not-model-error-block-accesses.ll | 4 +- .../ScopInfo/early_exit_for_complex_domains.ll | 2 +- polly/test/ScopInfo/expensive-boundary-context.ll | 2 +- polly/test/ScopInfo/intrinsics.ll | 2 +- .../ScopInfo/long-sequence-of-error-blocks-2.ll | 6 +- .../test/ScopInfo/long-sequence-of-error-blocks.ll | 6 +- polly/test/ScopInfo/memcpy-raw-source.ll | 2 +- .../test/ScopInfo/mismatching-array-dimensions.ll | 2 +- polly/test/ScopInfo/multidim_srem.ll | 2 +- polly/test/ScopInfo/remarks.ll | 4 +- .../ScopInfo/scev-div-with-evaluatable-divisor.ll | 2 +- polly/test/ScopInfo/unnamed_stmts.ll | 2 +- polly/test/Simplify/phi_in_regionstmt.ll | 2 +- 965 files changed, 3351 insertions(+), 2031 deletions(-) create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX904.rst create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX906.rst create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX908.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx900_mad_type_dev.rst} (94%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx900_mod_vop3_abs_neg.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx900_src32_0.rst create mode 100644 llvm/docs/AMDGPU/gfx900_src32_1.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx900_vdst32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx904_mad_type_dev.rst} (94%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx904_mod_vop3_abs_neg.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx904_src32_0.rst create mode 100644 llvm/docs/AMDGPU/gfx904_src32_1.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx904_vdst32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_mad_type_dev.rst} (94%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_mod_dpp_sdwa_abs_neg.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_mod_sdwa_sext.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_mod_vop3_abs_neg.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx906_src32_0.rst create mode 100644 llvm/docs/AMDGPU/gfx906_src32_1.rst create mode 100644 llvm/docs/AMDGPU/gfx906_src32_2.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_type_dev.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_vdst32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx906_vsrc32_0.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx908_addr_buf.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_adst1024_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_adst128_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_adst32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_adst512_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_asrc1024_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_asrc128_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_asrc32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_asrc512_0.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx908_data_buf_atomic32.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_dst_flat_atomic32.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_mad_type_dev.rst} (94%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_mod_dpp_sdwa_abs_neg.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_mod_sdwa_sext.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_mod_vop3_abs_neg.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx908_offset_buf.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_opt.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_ret.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_rsrc_buf.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx908_saddr_flat_global.rst create mode 100644 llvm/docs/AMDGPU/gfx908_src32_0.rst create mode 100644 llvm/docs/AMDGPU/gfx908_src32_1.rst create mode 100644 llvm/docs/AMDGPU/gfx908_src32_2.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_src32_3.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_type_dev.rst} (52%) create mode 100644 llvm/docs/AMDGPU/gfx908_vaddr_flat_global.rst copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_vasrc32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_vasrc64_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_vdata32_0.rst} (52%) copy llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_vdst32_0.rst} (52%) rename llvm/docs/AMDGPU/{gfx9_mad_type_dev.rst => gfx908_vsrc32_0.rst} (52%) create mode 100644 llvm/test/Transforms/Attributor/undefined_behavior.ll create mode 100644 llvm/test/tools/llvm-nm/ifunc.test delete mode 100644 llvm/test/tools/llvm-readobj/ELF/Inputs/relocs.obj.elf-x86_64 delete mode 100644 llvm/test/tools/llvm-readobj/ELF/Inputs/symbols-proc-specific.e [...] create mode 100644 llvm/test/tools/llvm-readobj/ELF/file-header-abi-version.test create mode 100644 llvm/test/tools/llvm-readobj/ELF/file-header-os-abi.test delete mode 100644 llvm/test/tools/llvm-readobj/ELF/gnu-symbols.test -- To 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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (6314219b -> 2a9eaafe)

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (0c6a3e049a4 -> d5dcc0eb2ca)

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (ebd1c6d1d3 -> b68476f136)

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