Tcwg-commits December 2019

tcwg-commits@lists.linaro.org

5 participants
9704 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allnoconfig updated (95fe4adb4 -> 0699d4790)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 95fe4adb4 0: update: binutils-gcc-linux: all new 0699d4790 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (95fe4adb4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 23 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11086 ++++++------- 04-build_abe-stage1/console.log | 18688 +++++++++++----------- 05-build_linux/console.log | 738 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 2 +- console.log | 30502 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 30736 insertions(+), 30761 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig updated (b4abe7afbf5 -> c7dc4734d23)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/llvm-project. from b4abe7afbf5 [ARM] Sink splat to ICmp adds 32cc14100e8 Revert "[MIPS GlobalISel] Select bitreverse" adds 0f0330a7870 [PowerPC] Legalize rounding nodes adds 491cfa4250d AMDGPU/GlobalISel: Account for G_PHI result bank adds 58bcf511070 AMDGPU: Generate check lines adds 9e1a2a668b9 AMDGPU: Improve llvm.round.f64 lowering for CI+ adds 9fd31fdbd30 GlobalISel: moreElementsVector for FP min/max adds 18240c3cd63 AMDGPU/GlobalISel: Add select test for fexp2 adds f33fd9648c4 [ARM][Thumb][FIX] Add unwinding information to t4 adds 987eb8e26cc [InstCombine] propagate sign argument through nested copysigns adds 1247865fe02 AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftz adds 98f72a5107c [MIPS GlobalISel] Select bitreverse. Recommit adds ee3eebba0d3 [InstCombine] remove stale comment on test; NFC adds 03b9f0a5e19 Ignore "no-frame-pointer-elim" and "no-frame-pointer-elim-n [...] adds 48e0e68edb3 AMDGPU/GlobalISel: Re-use MRI available in selector adds 0c5bee8fdd4 [test] do not parse ls output for file size; NFCI adds 47a2fd2df4f [X86] Add X86ISD::PCMPGT to SimplifyMultipleUseDemandedBits [...] adds 94d08feaeff TableGen: Fix assert on PatFrags with predicate code adds 7fa0bfe7d58 AMDGPU/GlobalISel: Select mul24 intrinsics adds 4a7aa252a32 [X86][AsmParser] re-introduce 'offset' operator adds 000c6a5038b [OpenMP] Use the OpenMPIRBuilder for `omp cancel` adds 10fedd94b43 [OpenMP] Use the OpenMPIRBuilder for `omp parallel` adds 0bd3cc42485 [PowerPC][docs] Update Embedded PowerPC docs in Compiler Wr [...] adds bc48af8c575 [libomptarget][nfc] Change unintentional target_impl prefix [...] adds 6bd1fcd7959 [OpenMP][FIX] Generalize a test check line adds 07be32961a6 Remove a redundant `default:` on an exhaustive switch(enum). adds 8b23b2bbd96 [CodeGen] Use CreateFNeg in buildFMulAdd adds 70f8dd4cf60 [CodeGen] Use IRBuilder::CreateFNeg for __builtin_conj adds 6185dc0eb3a [X86] Add test case for PR44412. NFC adds 991f7abdfc5 [NFC] Add comments in unit test aix-xcoff-toc.ll to clarify [...] adds 831898ff8ac [SelectionDAG] Fix copy/paste mistake in comment. NFC adds 787e078f3ec [TargetLowering][AMDGPU] Make scalarizeVectorLoad return a [...] adds 0d6ebb4f0dd [mlir] Refactor operation results to use a single use list [...] adds 5b1cbfa4232 [NFC] Style cleanup adds b350c666ab6 Revert "DebugInfo: Fix rangesBaseAddress DICompileUnit bitc [...] adds 23a6ae2b062 [NFC] Make X86MCCodeEmitter::isPCRel32Branch static adds 28880198718 [Attributor] Annotate the memory behavior of call site arguments adds b1b441d22de [Attributor] Use abstract call sites to determine associate [...] adds dada8132af6 [Attributor] Propagate known align from arguments to call s [...] adds 70771d8b9e8 [Utils] Allow update_test_checks to scrub attribute annotations adds be26bd55130 [Utils] Reuse argument variable names in the body adds a36a89dcdcf [NFC] Style cleanup adds 4a6413cd0a8 [Utils][Fix] Minor test result change adds e898ba2d151 [X86] Slightly improve our attempted error recovery for 64- [...] adds 751336340da [Attributor] Function signature rewrite infrastructure adds a6c59e0792e [Utils] Deal with occasionally deleted functions adds 4f82af81a04 [Attributor] Suppress unused warnings when assertions are d [...] adds e8c9110b56b clang-tidy doc: modernize-make-unique has an autofix adds d04e64a25a5 [InstCombine] Add tests for PR44242 adds fb114694e93 [InstCombine] Don't rewrite phi-of-bitcast when the phi has [...] adds 0c7ca82161b Fix external-names.c test when separator is \\ adds b409f73e1fd [ARM][TypePromotion] Re-enable by default adds c7dc4734d23 [llvm-exegesis] Check counters before running No new revisions were added by this update. Summary of changes: clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 +- clang/lib/CodeGen/CGBuiltin.cpp | 7 +- clang/lib/CodeGen/CGExprScalar.cpp | 15 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 95 +++ clang/lib/Sema/SemaStmtAsm.cpp | 7 +- clang/test/CodeGen/complex-builtins-2.c | 20 + clang/test/CodeGen/fp-contract-pragma.cpp | 15 + clang/test/CodeGen/ms-inline-asm-64.c | 4 +- clang/test/CodeGen/ms-inline-asm.c | 12 +- clang/test/CodeGen/ms-inline-asm.cpp | 2 +- clang/test/OpenMP/cancel_codegen.cpp | 119 +-- clang/test/OpenMP/parallel_codegen.cpp | 117 +-- clang/test/Parser/ms-inline-asm.c | 5 + clang/test/VFS/external-names.c | 6 +- llvm/docs/CompilerWriterInfo.rst | 12 +- llvm/docs/ReleaseNotes.rst | 5 + llvm/include/llvm/CodeGen/TargetLowering.h | 7 +- llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 18 + llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 29 +- llvm/include/llvm/IR/AutoUpgrade.h | 5 + llvm/include/llvm/IR/CallSite.h | 31 +- llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h | 8 +- llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h | 47 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 112 ++- llvm/lib/AsmParser/LLParser.cpp | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 1 + llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 - llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 13 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 12 +- llvm/lib/CodeGen/TargetOptionsImpl.cpp | 14 +- llvm/lib/CodeGen/TypePromotion.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPConstants.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 138 +++- llvm/lib/IR/AbstractCallSite.cpp | 19 + llvm/lib/IR/AutoUpgrade.cpp | 20 + llvm/lib/MC/MCParser/AsmParser.cpp | 52 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 18 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 36 +- llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 4 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 2 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 15 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 37 + llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 216 +++-- llvm/lib/Target/X86/AsmParser/X86Operand.h | 20 +- .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 907 +++++++++++---------- llvm/lib/Target/X86/X86AsmPrinter.cpp | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 17 +- llvm/lib/Transforms/IPO/Attributor.cpp | 376 ++++++++- .../Transforms/InstCombine/InstCombineCalls.cpp | 10 + .../Transforms/InstCombine/InstCombineCasts.cpp | 57 +- llvm/test/Assembler/dicompileunit.ll | 4 +- llvm/test/Bitcode/upgrade-frame-pointer.ll | 33 + .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 233 ++++++ .../GlobalISel/inst-select-amdgcn.mul.u24.mir | 65 ++ .../AMDGPU/GlobalISel/inst-select-fexp2.mir | 42 + .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 42 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 96 ++- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 14 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 762 ++++++++++++++++- .../Mips/GlobalISel/legalizer/bitreverse.mir | 144 ++-- .../CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll | 144 ++-- llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll | 10 + llvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll | 2 +- llvm/test/CodeGen/PowerPC/rounding-ops.ll | 8 +- llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll | 561 +++++++++++++ .../PowerPC/vector-constrained-fp-intrinsics.ll | 372 +++------ llvm/test/CodeGen/Thumb2/emit-unwinding.ll | 15 + llvm/test/CodeGen/X86/ms-inline-asm.ll | 2 +- llvm/test/CodeGen/X86/offset-operator.ll | 15 + llvm/test/CodeGen/X86/pr44412.ll | 36 + llvm/test/CodeGen/X86/sadd_sat.ll | 4 +- llvm/test/CodeGen/X86/sadd_sat_vec.ll | 140 ++-- llvm/test/CodeGen/X86/ssub_sat.ll | 10 +- llvm/test/CodeGen/X86/ssub_sat_vec.ll | 220 ++--- llvm/test/DebugInfo/X86/range_reloc.ll | 2 +- llvm/test/MC/X86/pr32530.s | 13 + llvm/test/TableGen/predicate-patfags.td | 63 ++ .../ArgumentPromotion/2008-02-01-ReturnAttrs.ll | 2 +- .../ArgumentPromotion/2008-07-02-array-indexing.ll | 2 +- .../Attributor/ArgumentPromotion/X86/attributes.ll | 4 +- .../X86/min-legal-vector-width.ll | 16 +- .../Attributor/ArgumentPromotion/attrs.ll | 2 +- .../Attributor/ArgumentPromotion/basictest.ll | 4 +- .../Attributor/ArgumentPromotion/byval-2.ll | 2 +- .../Attributor/ArgumentPromotion/byval.ll | 4 +- .../Attributor/ArgumentPromotion/chained.ll | 2 +- .../Attributor/ArgumentPromotion/control-flow.ll | 20 +- .../Attributor/ArgumentPromotion/control-flow2.ll | 4 +- .../Transforms/Attributor/ArgumentPromotion/dbg.ll | 7 +- .../Attributor/ArgumentPromotion/fp80.ll | 2 +- .../Attributor/ArgumentPromotion/inalloca.ll | 2 +- .../ArgumentPromotion/nonzero-address-spaces.ll | 5 +- .../Attributor/ArgumentPromotion/pr27568.ll | 5 +- .../Attributor/ArgumentPromotion/pr32917.ll | 2 +- .../Attributor/ArgumentPromotion/profile.ll | 2 +- .../Attributor/ArgumentPromotion/reserve-tbaa.ll | 4 +- .../Attributor/ArgumentPromotion/sret.ll | 2 +- .../Attributor/ArgumentPromotion/variadic.ll | 2 +- .../IPConstantProp/2009-09-24-byval-ptr.ll | 14 +- .../Attributor/IPConstantProp/PR26044.ll | 4 +- .../IPConstantProp/openmp_parallel_for.ll | 4 +- .../Attributor/IPConstantProp/pthreads.ll | 12 +- .../Attributor/IPConstantProp/thread_local_acs.ll | 2 +- llvm/test/Transforms/Attributor/align.ll | 38 +- llvm/test/Transforms/Attributor/callbacks.ll | 7 +- llvm/test/Transforms/Attributor/liveness.ll | 14 +- llvm/test/Transforms/Attributor/misc.ll | 18 +- llvm/test/Transforms/Attributor/noalias.ll | 22 +- llvm/test/Transforms/Attributor/nocapture-2.ll | 10 +- llvm/test/Transforms/Attributor/nonnull.ll | 14 +- llvm/test/Transforms/Attributor/value-simplify.ll | 8 +- llvm/test/Transforms/InstCombine/copysign.ll | 5 +- llvm/test/Transforms/InstCombine/pr44242.ll | 190 +++++ .../Inputs/argument_name_reuse.ll | 7 + .../Inputs/argument_name_reuse.ll.expected | 14 + .../Inputs/argument_name_reuse.ll.plain.expected | 13 + .../Inputs/basic.ll.funcsig.expected | 2 +- .../update_test_checks/Inputs/scrub_attrs.ll | 8 + .../Inputs/scrub_attrs.ll.plain.expected | 13 + .../Inputs/scrub_attrs.ll.scrub.expected | 13 + .../Inputs/sometimes_deleted_function.ll | 12 + .../Inputs/sometimes_deleted_function.ll.expected | 19 + .../update_test_checks/argument_name_reuse.test | 6 + .../update_test_checks/scrub_attrs.test | 9 + .../sometimes_deleted_function.test | 5 + llvm/test/tools/llvm-profdata/show-prof-size.test | 2 +- .../tools/yaml2obj/ELF/custom-null-section.yaml | 4 +- llvm/tools/llvm-exegesis/lib/Latency.cpp | 2 - llvm/tools/llvm-exegesis/lib/Target.cpp | 11 + llvm/tools/llvm-exegesis/llvm-exegesis.cpp | 13 +- llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp | 120 +++ llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 26 +- llvm/utils/UpdateTestChecks/common.py | 41 +- llvm/utils/update_test_checks.py | 9 + mlir/include/mlir/IR/Block.h | 2 +- mlir/include/mlir/IR/Operation.h | 32 +- mlir/include/mlir/IR/UseDefLists.h | 354 +++++--- mlir/include/mlir/IR/Value.h | 78 +- mlir/lib/IR/Operation.cpp | 58 +- mlir/lib/IR/Value.cpp | 95 ++- mlir/lib/Transforms/ViewOpGraph.cpp | 10 +- .../deviceRTLs/amdgcn/src/target_impl.h | 4 +- .../libomptarget/deviceRTLs/common/src/libcall.cu | 4 +- .../deviceRTLs/nvptx/src/target_impl.h | 6 +- 154 files changed, 5367 insertions(+), 1950 deletions(-) create mode 100644 clang/test/CodeGen/complex-builtins-2.c create mode 100644 llvm/test/Bitcode/upgrade-frame-pointer.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mul.u24.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir create mode 100644 llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll create mode 100644 llvm/test/CodeGen/X86/offset-operator.ll create mode 100644 llvm/test/CodeGen/X86/pr44412.ll create mode 100644 llvm/test/MC/X86/pr32530.s create mode 100644 llvm/test/TableGen/predicate-patfags.td create mode 100644 llvm/test/Transforms/InstCombine/pr44242.ll create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/argu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/argu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/argu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/scru [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/scru [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/scru [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/some [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/some [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/argument_na [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/scrub_attrs.test create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/sometimes_d [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig updated (0118d530e -> 6359304b5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/base-artifacts. discards 0118d530e 2: update: llvm-linux: 18309 new 6359304b5 2: update: llvm-linux: 18309 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0118d530e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 12552 +++++++++++++++++----------------- 03-build_linux/console.log | 914 +-- 05-check_regression/console.log | 10 +- 06-update_baseline/console.log | 26 +- console.log | 13686 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 13690 insertions(+), 13690 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (32cc14100e8 -> c7dc4734d23)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 32cc14100e8 Revert "[MIPS GlobalISel] Select bitreverse" adds 0f0330a7870 [PowerPC] Legalize rounding nodes adds 491cfa4250d AMDGPU/GlobalISel: Account for G_PHI result bank adds 58bcf511070 AMDGPU: Generate check lines adds 9e1a2a668b9 AMDGPU: Improve llvm.round.f64 lowering for CI+ adds 9fd31fdbd30 GlobalISel: moreElementsVector for FP min/max adds 18240c3cd63 AMDGPU/GlobalISel: Add select test for fexp2 adds f33fd9648c4 [ARM][Thumb][FIX] Add unwinding information to t4 adds 987eb8e26cc [InstCombine] propagate sign argument through nested copysigns adds 1247865fe02 AMDGPU/GlobalISel: Select llvm.amdgcn.fmad.ftz adds 98f72a5107c [MIPS GlobalISel] Select bitreverse. Recommit adds ee3eebba0d3 [InstCombine] remove stale comment on test; NFC adds 03b9f0a5e19 Ignore "no-frame-pointer-elim" and "no-frame-pointer-elim-n [...] adds 48e0e68edb3 AMDGPU/GlobalISel: Re-use MRI available in selector adds 0c5bee8fdd4 [test] do not parse ls output for file size; NFCI adds 47a2fd2df4f [X86] Add X86ISD::PCMPGT to SimplifyMultipleUseDemandedBits [...] adds 94d08feaeff TableGen: Fix assert on PatFrags with predicate code adds 7fa0bfe7d58 AMDGPU/GlobalISel: Select mul24 intrinsics adds 4a7aa252a32 [X86][AsmParser] re-introduce 'offset' operator adds 000c6a5038b [OpenMP] Use the OpenMPIRBuilder for `omp cancel` adds 10fedd94b43 [OpenMP] Use the OpenMPIRBuilder for `omp parallel` adds 0bd3cc42485 [PowerPC][docs] Update Embedded PowerPC docs in Compiler Wr [...] adds bc48af8c575 [libomptarget][nfc] Change unintentional target_impl prefix [...] adds 6bd1fcd7959 [OpenMP][FIX] Generalize a test check line adds 07be32961a6 Remove a redundant `default:` on an exhaustive switch(enum). adds 8b23b2bbd96 [CodeGen] Use CreateFNeg in buildFMulAdd adds 70f8dd4cf60 [CodeGen] Use IRBuilder::CreateFNeg for __builtin_conj adds 6185dc0eb3a [X86] Add test case for PR44412. NFC adds 991f7abdfc5 [NFC] Add comments in unit test aix-xcoff-toc.ll to clarify [...] adds 831898ff8ac [SelectionDAG] Fix copy/paste mistake in comment. NFC adds 787e078f3ec [TargetLowering][AMDGPU] Make scalarizeVectorLoad return a [...] adds 0d6ebb4f0dd [mlir] Refactor operation results to use a single use list [...] adds 5b1cbfa4232 [NFC] Style cleanup adds b350c666ab6 Revert "DebugInfo: Fix rangesBaseAddress DICompileUnit bitc [...] adds 23a6ae2b062 [NFC] Make X86MCCodeEmitter::isPCRel32Branch static adds 28880198718 [Attributor] Annotate the memory behavior of call site arguments adds b1b441d22de [Attributor] Use abstract call sites to determine associate [...] adds dada8132af6 [Attributor] Propagate known align from arguments to call s [...] adds 70771d8b9e8 [Utils] Allow update_test_checks to scrub attribute annotations adds be26bd55130 [Utils] Reuse argument variable names in the body adds a36a89dcdcf [NFC] Style cleanup adds 4a6413cd0a8 [Utils][Fix] Minor test result change adds e898ba2d151 [X86] Slightly improve our attempted error recovery for 64- [...] adds 751336340da [Attributor] Function signature rewrite infrastructure adds a6c59e0792e [Utils] Deal with occasionally deleted functions adds 4f82af81a04 [Attributor] Suppress unused warnings when assertions are d [...] adds e8c9110b56b clang-tidy doc: modernize-make-unique has an autofix adds d04e64a25a5 [InstCombine] Add tests for PR44242 adds fb114694e93 [InstCombine] Don't rewrite phi-of-bitcast when the phi has [...] adds 0c7ca82161b Fix external-names.c test when separator is \\ adds b409f73e1fd [ARM][TypePromotion] Re-enable by default new c7dc4734d23 [llvm-exegesis] Check counters before running The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 +- clang/lib/CodeGen/CGBuiltin.cpp | 7 +- clang/lib/CodeGen/CGExprScalar.cpp | 15 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 95 +++ clang/lib/Sema/SemaStmtAsm.cpp | 7 +- clang/test/CodeGen/complex-builtins-2.c | 20 + clang/test/CodeGen/fp-contract-pragma.cpp | 15 + clang/test/CodeGen/ms-inline-asm-64.c | 4 +- clang/test/CodeGen/ms-inline-asm.c | 12 +- clang/test/CodeGen/ms-inline-asm.cpp | 2 +- clang/test/OpenMP/cancel_codegen.cpp | 119 +-- clang/test/OpenMP/parallel_codegen.cpp | 117 +-- clang/test/Parser/ms-inline-asm.c | 5 + clang/test/VFS/external-names.c | 6 +- llvm/docs/CompilerWriterInfo.rst | 12 +- llvm/docs/ReleaseNotes.rst | 5 + .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + llvm/include/llvm/CodeGen/TargetLowering.h | 7 +- llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h | 18 + llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 29 +- llvm/include/llvm/IR/AutoUpgrade.h | 5 + llvm/include/llvm/IR/CallSite.h | 31 +- llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h | 8 +- llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h | 47 +- llvm/include/llvm/Transforms/IPO/Attributor.h | 112 ++- llvm/lib/AsmParser/LLParser.cpp | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 1 + llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 - llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 55 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 12 +- llvm/lib/CodeGen/TargetOptionsImpl.cpp | 14 +- llvm/lib/CodeGen/TypePromotion.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPConstants.cpp | 2 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 138 +++- llvm/lib/IR/AbstractCallSite.cpp | 19 + llvm/lib/IR/AutoUpgrade.cpp | 20 + llvm/lib/MC/MCParser/AsmParser.cpp | 52 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 18 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 36 +- llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 7 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 4 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 2 + llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 15 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 37 + llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 216 +++-- llvm/lib/Target/X86/AsmParser/X86Operand.h | 20 +- .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 907 +++++++++++---------- llvm/lib/Target/X86/X86AsmPrinter.cpp | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 17 +- llvm/lib/Transforms/IPO/Attributor.cpp | 376 ++++++++- .../Transforms/InstCombine/InstCombineCalls.cpp | 10 + .../Transforms/InstCombine/InstCombineCasts.cpp | 57 +- llvm/test/Assembler/dicompileunit.ll | 4 +- llvm/test/Bitcode/upgrade-frame-pointer.ll | 33 + .../GlobalISel/inst-select-amdgcn.fmad.ftz.mir | 233 ++++++ .../GlobalISel/inst-select-amdgcn.mul.u24.mir | 65 ++ .../AMDGPU/GlobalISel/inst-select-fexp2.mir | 42 + .../AMDGPU/GlobalISel/legalize-bitreverse.mir | 21 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 42 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 96 ++- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 14 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 762 ++++++++++++++++- .../Mips/GlobalISel/legalizer/bitreverse.mir | 215 +++++ .../CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll | 184 +++++ llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll | 10 + llvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll | 2 +- llvm/test/CodeGen/PowerPC/rounding-ops.ll | 8 +- llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll | 561 +++++++++++++ .../PowerPC/vector-constrained-fp-intrinsics.ll | 372 +++------ llvm/test/CodeGen/Thumb2/emit-unwinding.ll | 15 + llvm/test/CodeGen/X86/ms-inline-asm.ll | 2 +- llvm/test/CodeGen/X86/offset-operator.ll | 15 + llvm/test/CodeGen/X86/pr44412.ll | 36 + llvm/test/CodeGen/X86/sadd_sat.ll | 4 +- llvm/test/CodeGen/X86/sadd_sat_vec.ll | 140 ++-- llvm/test/CodeGen/X86/ssub_sat.ll | 10 +- llvm/test/CodeGen/X86/ssub_sat_vec.ll | 220 ++--- llvm/test/DebugInfo/X86/range_reloc.ll | 2 +- llvm/test/MC/X86/pr32530.s | 13 + llvm/test/TableGen/predicate-patfags.td | 63 ++ .../ArgumentPromotion/2008-02-01-ReturnAttrs.ll | 2 +- .../ArgumentPromotion/2008-07-02-array-indexing.ll | 2 +- .../Attributor/ArgumentPromotion/X86/attributes.ll | 4 +- .../X86/min-legal-vector-width.ll | 16 +- .../Attributor/ArgumentPromotion/attrs.ll | 2 +- .../Attributor/ArgumentPromotion/basictest.ll | 4 +- .../Attributor/ArgumentPromotion/byval-2.ll | 2 +- .../Attributor/ArgumentPromotion/byval.ll | 4 +- .../Attributor/ArgumentPromotion/chained.ll | 2 +- .../Attributor/ArgumentPromotion/control-flow.ll | 20 +- .../Attributor/ArgumentPromotion/control-flow2.ll | 4 +- .../Transforms/Attributor/ArgumentPromotion/dbg.ll | 7 +- .../Attributor/ArgumentPromotion/fp80.ll | 2 +- .../Attributor/ArgumentPromotion/inalloca.ll | 2 +- .../ArgumentPromotion/nonzero-address-spaces.ll | 5 +- .../Attributor/ArgumentPromotion/pr27568.ll | 5 +- .../Attributor/ArgumentPromotion/pr32917.ll | 2 +- .../Attributor/ArgumentPromotion/profile.ll | 2 +- .../Attributor/ArgumentPromotion/reserve-tbaa.ll | 4 +- .../Attributor/ArgumentPromotion/sret.ll | 2 +- .../Attributor/ArgumentPromotion/variadic.ll | 2 +- .../IPConstantProp/2009-09-24-byval-ptr.ll | 14 +- .../Attributor/IPConstantProp/PR26044.ll | 4 +- .../IPConstantProp/openmp_parallel_for.ll | 4 +- .../Attributor/IPConstantProp/pthreads.ll | 12 +- .../Attributor/IPConstantProp/thread_local_acs.ll | 2 +- llvm/test/Transforms/Attributor/align.ll | 38 +- llvm/test/Transforms/Attributor/callbacks.ll | 7 +- llvm/test/Transforms/Attributor/liveness.ll | 14 +- llvm/test/Transforms/Attributor/misc.ll | 18 +- llvm/test/Transforms/Attributor/noalias.ll | 22 +- llvm/test/Transforms/Attributor/nocapture-2.ll | 10 +- llvm/test/Transforms/Attributor/nonnull.ll | 14 +- llvm/test/Transforms/Attributor/value-simplify.ll | 8 +- llvm/test/Transforms/InstCombine/copysign.ll | 5 +- llvm/test/Transforms/InstCombine/pr44242.ll | 190 +++++ .../Inputs/argument_name_reuse.ll | 7 + .../Inputs/argument_name_reuse.ll.expected | 14 + .../Inputs/argument_name_reuse.ll.plain.expected | 13 + .../Inputs/basic.ll.funcsig.expected | 2 +- .../update_test_checks/Inputs/scrub_attrs.ll | 8 + .../Inputs/scrub_attrs.ll.plain.expected | 13 + .../Inputs/scrub_attrs.ll.scrub.expected | 13 + .../Inputs/sometimes_deleted_function.ll | 12 + .../Inputs/sometimes_deleted_function.ll.expected | 19 + .../update_test_checks/argument_name_reuse.test | 6 + .../update_test_checks/scrub_attrs.test | 9 + .../sometimes_deleted_function.test | 5 + llvm/test/tools/llvm-profdata/show-prof-size.test | 2 +- .../tools/yaml2obj/ELF/custom-null-section.yaml | 4 +- llvm/tools/llvm-exegesis/lib/Latency.cpp | 2 - llvm/tools/llvm-exegesis/lib/Target.cpp | 11 + llvm/tools/llvm-exegesis/llvm-exegesis.cpp | 13 +- llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp | 120 +++ llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 26 +- llvm/utils/UpdateTestChecks/common.py | 41 +- llvm/utils/update_test_checks.py | 9 + mlir/include/mlir/IR/Block.h | 2 +- mlir/include/mlir/IR/Operation.h | 32 +- mlir/include/mlir/IR/UseDefLists.h | 354 +++++--- mlir/include/mlir/IR/Value.h | 78 +- mlir/lib/IR/Operation.cpp | 58 +- mlir/lib/IR/Value.cpp | 95 ++- mlir/lib/Transforms/ViewOpGraph.cpp | 10 +- .../deviceRTLs/amdgcn/src/target_impl.h | 4 +- .../libomptarget/deviceRTLs/common/src/libcall.cu | 4 +- .../deviceRTLs/nvptx/src/target_impl.h | 6 +- 157 files changed, 5685 insertions(+), 1811 deletions(-) create mode 100644 clang/test/CodeGen/complex-builtins-2.c create mode 100644 llvm/test/Bitcode/upgrade-frame-pointer.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mul.u24.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitreverse.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll create mode 100644 llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll create mode 100644 llvm/test/CodeGen/X86/offset-operator.ll create mode 100644 llvm/test/CodeGen/X86/pr44412.ll create mode 100644 llvm/test/MC/X86/pr32530.s create mode 100644 llvm/test/TableGen/predicate-patfags.td create mode 100644 llvm/test/Transforms/InstCombine/pr44242.ll create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/argu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/argu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/argu [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/scru [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/scru [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/scru [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/some [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/some [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/argument_na [...] create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/scrub_attrs.test create mode 100644 llvm/test/tools/UpdateTestChecks/update_test_checks/sometimes_d [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (46766df88 -> 9c5fd0a73)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 46766df88 0: update: llvm-linux: all new 9c5fd0a73 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (46766df88) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 16 +- 02-build_llvm/console.log | 12510 +++++++++++++++++------------------ 03-build_linux/console.log | 820 +-- 04-boot_linux/console.log | 2 +- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 2 +- console.log | 13352 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13356 insertions(+), 13356 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig updated (f6926fe5580 -> 4682b0a53b3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig in repository toolchain/ci/gcc. from f6926fe5580 2019-12-30 Thomas Koenig <tkoenig(a)gcc.gnu.org> adds 7c23961a159 /gcc/cp 2019-12-30 Paolo Carlini <paolo.carlini(a)oracle.com> adds eaa18cd42c4 Remove assert in reshape_init_r. adds 9f40a2fccb6 Fix builtin functions needlessly using VIEW_CONVERT_EXPRs o [...] adds 43dd84f2c71 PR libgomp/93066 * inclhack.def (hpux_c99_inttypes3): Fix [...] adds 91c08cedf7f Fix typo in macro name guarding conditional in vxcrtstuff.c adds 09261b9be2f Fix macro reference in gthr-vxworks-tls.c adds 8ba90d1382a Improve VxWorks GTHREAD_ONCE_INIT adds bdc7738bb12 Improve recursion protection for VxWorks limits.h adds 52a91c9b12b Define STARTFILE_PREFIX_SPEC for powerpc VxWorks < 7 adds f072cb86e3b Identify sections in vx-common.h adds 12579d96252 Refine definitions for wchar_t/wint_t on VxWorks adds 489a291637f Setup TARGET_C_PREINCLUDE for VxWorks adds 600a680fb87 Simplify the compilation commands for config/vxworks.c adds c32bc16cc56 Introduce an internal API for VxWorks version checks adds 137897f3ada Setup system header wrappers for C++ on VxWorks adds f32f801247c Add missing file expected with rev 279781 adds 81312f86812 Add missing file expected with rev 279783 adds d98b8959618 Add missing files expected with rev 279784 adds 5b8261921fd * fi.po: Update. adds 2758cc57aa3 Add missing file expected with rev 279781 adds 56560d70ba6 Arrange to preinclude yvals.h ahead of stdint on VxWorks 7 adds f0b20ef201f Adapt libstdc++ os_defines for VxWorks to more recent versions adds 8beea8fd991 Guard aarch64/aapcs64 tests using abitest.S by check_weak_a [...] adds 220fd779b08 allow $ in scan-tree-dump expressions matching symbol names adds 48cc6949449 Prevent redefinition of WCHAR_MAX from testsuite/gcc.dg/cpp/ucs.c adds 20ce1da0ecc VxWorks has_nanosleep for libstdc++ enable-libstdcxx-time auto adds 043b2d62c9d undefine OFFSET in testsuite/gcc.dg/vect/tree-vect.h adds 854804d4d0b Add ChangeLog entry for rev 279797 adds 47c4fc06d50 Daily bump. adds f9e233c9d08 Fix SSA update when vectorisation adds a vdef to a read-only loop adds 4682b0a53b3 PR libgomp/93065 * oacc-init.c (goacc_runtime_deinitializ [...] No new revisions were added by this update. Summary of changes: fixincludes/ChangeLog | 8 + fixincludes/fixincl.x | 65 +- fixincludes/inclhack.def | 26 + fixincludes/tests/base/inttypes.h | 17 + gcc/ChangeLog | 179 ++++++ gcc/DATESTAMP | 2 +- gcc/config.gcc | 37 +- gcc/config/rs6000/rs6000-builtin.def | 88 ++- gcc/config/rs6000/rs6000-call.c | 523 +++++++++------- gcc/config/rs6000/vxworks.h | 7 + gcc/config/t-vxworks | 55 +- gcc/config/vx-common.h | 47 +- gcc/config/vxworks-c.c | 37 ++ gcc/config/vxworks/_vxworks-versions.h | 54 ++ gcc/config/vxworks/_yvals-wrapper.h | 44 ++ gcc/config/vxworks/_yvals.h | 45 ++ gcc/config/vxworks/complex.h | 28 + gcc/config/vxworks/inttypes.h | 28 + gcc/config/vxworks/math.h | 28 + gcc/config/vxworks/setjmp.h | 34 ++ gcc/config/vxworks/stdint.h | 28 + gcc/config/vxworks/vxworks-predef.h | 32 + gcc/cp/ChangeLog | 20 + gcc/cp/cp-tree.h | 7 +- gcc/cp/decl.c | 3 +- gcc/cp/decl2.c | 22 +- gcc/cp/init.c | 101 ++-- gcc/cp/parser.c | 3 +- gcc/cp/pt.c | 2 +- gcc/po/ChangeLog | 4 + gcc/po/fi.po | 654 +++++++++++---------- gcc/testsuite/ChangeLog | 41 ++ gcc/testsuite/c-c++-common/pr56493.c | 2 +- gcc/testsuite/g++.dg/init/delete1.C | 6 +- gcc/testsuite/g++.dg/ipa/pr85607.C | 8 +- gcc/testsuite/g++.dg/warn/Wdelete-incomplete-1.C | 7 +- .../g++.dg/warn/delete-non-virtual-dtor.C | 10 +- gcc/testsuite/g++.dg/warn/incomplete1.C | 8 +- gcc/testsuite/gcc.dg/cpp/ucs.c | 4 + gcc/testsuite/gcc.dg/tree-ssa/sra-17.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/sra-18.c | 8 +- gcc/testsuite/gcc.dg/vect/tree-vect.h | 6 + gcc/testsuite/gcc.dg/vect/vect-epilogues-2.c | 57 ++ .../gcc.target/aarch64/aapcs64/aapcs64.exp | 36 +- gcc/testsuite/gcc.target/powerpc/pr92923-1.c | 453 ++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr92923-2.c | 285 +++++++++ gcc/tree-vect-loop-manip.c | 66 ++- libcc1/ChangeLog | 5 + libcc1/libcp1plugin.cc | 3 +- libgcc/ChangeLog | 20 + libgcc/config/gthr-vxworks-tls.c | 12 +- libgcc/config/gthr-vxworks.h | 14 +- libgcc/config/vxcrtstuff.c | 4 +- libgomp/ChangeLog | 5 + libgomp/oacc-init.c | 9 + libstdc++-v3/ChangeLog | 24 + libstdc++-v3/acinclude.m4 | 5 + libstdc++-v3/config/os/vxworks/os_defines.h | 67 ++- libstdc++-v3/configure | 5 + 59 files changed, 2699 insertions(+), 701 deletions(-) create mode 100644 gcc/config/vxworks-c.c create mode 100644 gcc/config/vxworks/_vxworks-versions.h create mode 100644 gcc/config/vxworks/_yvals-wrapper.h create mode 100644 gcc/config/vxworks/_yvals.h create mode 100644 gcc/config/vxworks/complex.h create mode 100644 gcc/config/vxworks/inttypes.h create mode 100644 gcc/config/vxworks/math.h create mode 100644 gcc/config/vxworks/setjmp.h create mode 100644 gcc/config/vxworks/stdint.h create mode 100644 gcc/config/vxworks/vxworks-predef.h create mode 100644 gcc/testsuite/gcc.dg/vect/vect-epilogues-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92923-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr92923-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig updated (6a89db5c95 -> bf31e60440)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig in repository toolchain/ci/binutils-gdb. from 6a89db5c95 archive.c bfd_zalloc adds 37d5ab199b coff object_p memory leaks adds a7ac9aa525 vms-alpha.c object_p memory leaks adds 87d557ae1b Use "bool" in more spots in TUI adds 3d34df0aa7 Make some TUI globals "static" adds 930be66764 Automatic date update in version.in new bf31e60440 asan: alpha-vms: Heap-buffer-overflow The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 22 +++++++++ bfd/coffgen.c | 3 ++ bfd/version.h | 2 +- bfd/vms-alpha.c | 126 +++++++++++++++++++++++++-------------------------- gdb/ChangeLog | 22 +++++++++ gdb/tui/tui-hooks.c | 12 ++--- gdb/tui/tui-interp.c | 6 +-- gdb/tui/tui-win.c | 32 ++++++------- gdb/tui/tui-win.h | 2 +- gdb/tui/tui.c | 8 ++-- gdb/tui/tui.h | 4 +- 11 files changed, 142 insertions(+), 97 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig updated (cd9680149 -> ead0195e1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allnoconfig in repository toolchain/ci/base-artifacts. discards cd9680149 0: update: binutils-gcc-linux: all new ead0195e1 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cd9680149) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ne [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11594 ++++++------- 04-build_abe-stage1/console.log | 20355 +++++++++++----------- 05-build_linux/console.log | 606 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 10 +- console.log | 33189 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 10 files changed, 33197 insertions(+), 33203 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[binutils-gdb] branch master updated (930be66764 -> bf31e60440)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 930be66764 Automatic date update in version.in new bf31e60440 asan: alpha-vms: Heap-buffer-overflow The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 12 ++++++++ bfd/vms-alpha.c | 92 +++++++++++++++++++++++++-------------------------------- 2 files changed, 53 insertions(+), 51 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig updated (9577eace3e8 -> 26b996a95cc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allmodconfig in repository toolchain/ci/gcc. from 9577eace3e8 Daily bump. adds 8a969c076ad Catch division by zero errors in array sizes. adds 8541e44c90a 2019-12-30 Thomas Koenig <tkoenig(a)gcc.gnu.org> adds e509dbe5090 * fi.po: Update. adds 26b996a95cc Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 11 + gcc/fortran/arith.c | 6 + gcc/fortran/decl.c | 31 +- gcc/fortran/gfortran.h | 2 + gcc/po/ChangeLog | 4 + gcc/po/fi.po | 654 ++++++++++++++------------- gcc/testsuite/ChangeLog | 6 + gcc/testsuite/gfortran.dg/arith_divide_2.f90 | 9 + 9 files changed, 395 insertions(+), 330 deletions(-) create mode 100644 gcc/testsuite/gfortran.dg/arith_divide_2.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

← Newer
1
...
9
10
11
12
13
14
15
...
971
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits December 2019