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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-O3-vs-O3_LTO
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discards a9174981c 0: reset: binutils-gcc-glibc: 0
new 0c7cf1e5f 0: update: binutils-gcc-glibc: 0
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01-reset_artifacts/console.log | 68 +-
02-prepare_abe/console.log | 186 +-
03-build_abe-binutils/console.log | 9454 +-
04-build_abe-stage1/console.log | 17851 +--
05-build_abe-linux/console.log | 292 +-
06-build_abe-glibc/console.log | 37622 +++---
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09-benchmark-O3_marm/benchmark.log | 15 +-
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10-benchmark-O3_LTO_marm/console.log | 172 +-
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.../ref-results-0.csv | 0
.../ref-results-1.csv | 0
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.../ref-results.csv | 2 +-
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.../results-compare.csv | 8 +-
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12-update_baseline/new-results.csv | 58 +-
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console.log | 115604 +++++++++---------
jenkins/manifest.sh | 18 +-
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results_id-1 | 2 +-
results_id-2 | 2 +-
46 files changed, 128731 insertions(+), 118625 deletions(-)
create mode 100644 11-check_regression/new-results-0.csv
create mode 100644 11-check_regression/new-results-1.csv
copy {12-update_baseline => 11-check_regression}/new-results-compare.csv (96%)
create mode 100644 11-check_regression/new-results-full.csv
create mode 100644 11-check_regression/new-results.csv
create mode 100644 11-check_regression/new-results.log
copy 12-update_baseline/new-results-0.csv => 11-check_regression/ref-results-0.csv (100%)
copy 12-update_baseline/new-results-1.csv => 11-check_regression/ref-results-1.csv (100%)
copy 12-update_baseline/new-results-compare.csv => 11-check_regression/ref-results [...]
copy 12-update_baseline/new-results-full.csv => 11-check_regression/ref-results-fu [...]
copy 12-update_baseline/new-results-full.csv => 11-check_regression/ref-results.csv (84%)
copy 12-update_baseline/new-results.log => 11-check_regression/ref-results.log (94%)
copy {12-update_baseline => 11-check_regression}/results-compare.csv (80%)
delete mode 100644 reset-baseline
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-arm-spec2k6-Oz_LTO
in repository toolchain/ci/base-artifacts.
discards 84928a75b 0: reset: binutils-gcc-glibc-llvm: -3
new e4713c4a4 0: update: binutils-gcc-glibc-llvm: -3
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01-reset_artifacts/console.log | 132 +-
02-prepare_abe/console.log | 434 +-
03-build_abe-binutils/console.log | 10006 +-
04-build_abe-stage1/console.log | 18037 ++--
05-build_abe-linux/console.log | 292 +-
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11-update_baseline/console.log | 2 +-
console.log | 124351 +++++++++++-----------
jenkins/manifest.sh | 22 +-
reset-baseline | 0
16 files changed, 124760 insertions(+), 123124 deletions(-)
delete mode 100644 reset-baseline
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unknown user pushed a change to branch master
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from 42a92bf21c8 [RISCV] Add MachineInstr immediate verification
new b41a9002ccc bpf: fix wrong truncation elimination when there is back-edge/loop
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lib/Target/BPF/BPF.h | 2 +
lib/Target/BPF/BPFISelDAGToDAG.cpp | 169 +++---------------------------
lib/Target/BPF/BPFMIPeephole.cpp | 189 +++++++++++++++++++++++++++++++++-
lib/Target/BPF/BPFTargetMachine.cpp | 12 ++-
test/CodeGen/BPF/remove_truncate_6.ll | 80 ++++++++++++++
5 files changed, 285 insertions(+), 167 deletions(-)
create mode 100644 test/CodeGen/BPF/remove_truncate_6.ll
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unknown user pushed a change to branch master
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from 03e1ab9424 [gdb/testsuite] Fix local-static.exp with g++-4.8
new 745ff14e6e [gdb/tdep] Fix 'Unexpected register class' assert in amd64_p [...]
new d10eccaa72 [gdb/tdep] Fix inferior call arg passing for amd64
new cbbbc402e0 libctf: mark swap.h inline functions as static
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gdb/ChangeLog | 14 +++
gdb/amd64-tdep.c | 117 +++++++++++++---------
gdb/testsuite/ChangeLog | 11 ++
gdb/testsuite/gdb.base/infcall-nested-structs.exp | 14 ---
libctf/ChangeLog | 4 +
libctf/swap.h | 6 +-
6 files changed, 102 insertions(+), 64 deletions(-)
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unknown user pushed a change to branch master
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from 05969797106 find_partition_fixes: remove unused bbs_in_cold_partition variable
new 67a13ee59b7 * config/mips/mips.c (mips_expand_builtin_insn): Force the [...]
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gcc/config/mips/mips.c | 20 ++++++++++++++++++
gcc/testsuite/ChangeLog | 4 ++++
gcc/testsuite/gcc.target/mips/msa-dpadd-dpsub.c | 28 +++++++++++++++++++++++++
4 files changed, 58 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/mips/msa-dpadd-dpsub.c
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from 9cb56c603f5 [AMDGPU] Fix-up cases where writelane has 2 SGPR operands
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.../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 1 +
lib/Target/RISCV/RISCVInstrInfo.cpp | 60 +++++++++++++++++++++-
lib/Target/RISCV/RISCVInstrInfo.h | 10 +++-
lib/Target/RISCV/RISCVInstrInfo.td | 16 ++++++
lib/Target/RISCV/RISCVSubtarget.cpp | 2 +-
lib/Target/RISCV/Utils/RISCVBaseInfo.h | 16 ++++++
test/CodeGen/RISCV/verify-instr.mir | 11 ++++
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from b17fcc1039 [gdb/testsuite] Fix regexp for reg value in jit-reader.exp
new 03e1ab9424 [gdb/testsuite] Fix local-static.exp with g++-4.8
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