Tcwg-commits October 2019

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13959 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (2074a27d488 -> 7a17e445bbe)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/gcc. from 2074a27d488 [arm] clean up alu+shift patterns adds c712a709994 PR c++/92106 - ICE with structured bindings and -Wreturn-l [...] adds 4073b83e4aa PR c++/92062 - ODR-use ignored for static member of class t [...] adds 45cedc6377c PR c++/92015 * constexpr.c (cxx_eval_component_reference, [...] adds aaf7e4e22c3 /cp 2019-10-21 Paolo Carlini <paolo.carlini(a)oracle.com> adds 7c0eab23eb5 PR c++/83434 - typeinfo for noexcept function lacks noexcep [...] adds ad651a1e1fc 2019-10-21 Jozef Lawrynowicz <jozef.l(a)mittosystems.com> adds b85dd9c1965 Daily bump. adds f71e3aa2a5d * lock-and-run.sh: Check for process existence rather than [...] adds 8db9a62c6d1 * .gitattributes: Also check ChangeLog whitespace. adds 7e375793ea7 * lock-and-run.sh: Tweak command order. adds 040439bd9e1 [testsuite] Make the Wnonnull independent of system headers. adds 024e3aa735e [C++] Avoid exposing internal details in aka types adds 18690af21f6 Fix use after free in vector_size change adds 1243f4ece47 Fix PR reference in ChangeLog. adds 9b3b552318b Come up with json::integer_number and use it in GCOV. adds c5c6e50cd41 * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Update. adds fee76a24c81 2019-10-22 Richard Biener <rguenther(a)suse.de> adds 69dbf052478 Fix PR middle-end/90796 adds 5885f487165 2019-10-22 Richard Biener <rguenther(a)suse.de> adds b80bc224a5b [arm] make arm_carry_operation and arm_borrow_operation duals adds bc0ce08b88f [arm] Match subtraction from carry_operation adds 88ab531a5ae Arm: Fix arm libsanitizer bootstrap failure adds 57f5992bc1c PR c++/85746: Don't fold __builtin_constant_p prematurely adds 7a17e445bbe PR tree-optimization/85887 * decl.c (expand_static_init): [...] No new revisions were added by this update. Summary of changes: .gitattributes | 1 + ChangeLog | 4 + gcc/ChangeLog | 79 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 7 ++ gcc/config/arm/arm.md | 13 +++ gcc/config/arm/predicates.md | 2 +- gcc/cp/ChangeLog | 53 +++++++++ gcc/cp/constexpr.c | 8 +- gcc/cp/cp-tree.h | 13 ++- gcc/cp/decl.c | 4 +- gcc/cp/error.c | 10 +- gcc/cp/parser.c | 8 +- gcc/cp/pt.c | 2 + gcc/cp/rtti.c | 8 +- gcc/cp/tree.c | 80 +++++++------ gcc/cp/typeck.c | 6 +- gcc/diagnostic-format-json.cc | 4 +- gcc/expr.c | 3 - gcc/gcov.c | 23 ++-- gcc/gimple-loop-jam.c | 81 +++++++++++-- gcc/json.cc | 41 +++++-- gcc/json.h | 35 ++++-- gcc/lock-and-run.sh | 41 +++++-- gcc/optinfo-emit-json.cc | 10 +- gcc/testsuite/ChangeLog | 53 +++++++++ gcc/testsuite/g++.dg/cpp0x/constexpr-92015.C | 7 ++ gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C | 19 +++ gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C | 19 +++ gcc/testsuite/g++.dg/cpp1z/decomp50.C | 51 +++++++++ .../diag-aka-5.h => g++.dg/diagnostic/aka5.h} | 0 gcc/testsuite/g++.dg/diagnostic/aka5a.C | 127 +++++++++++++++++++++ gcc/testsuite/g++.dg/diagnostic/aka5b.C | 127 +++++++++++++++++++++ gcc/testsuite/g++.dg/parse/qualified2.C | 2 +- gcc/testsuite/g++.dg/pr85746.C | 10 ++ gcc/testsuite/g++.dg/rtti/pr83534.C | 13 +++ gcc/testsuite/g++.old-deja/g++.other/decl5.C | 7 +- gcc/testsuite/g++.target/aarch64/diag_aka_1.C | 13 +++ gcc/testsuite/gcc.dg/Wnonnull.c | 16 +-- gcc/testsuite/gcc.dg/torture/pr92173.c | 11 ++ gcc/testsuite/gcc.dg/unroll-and-jam.c | 22 +++- gcc/testsuite/gcc.dg/vshift-5.c | 44 +++++++ gcc/tree-vect-loop.c | 70 ++++++------ gcc/tree-vect-slp.c | 30 +++-- gcc/tree-vect-stmts.c | 29 ++++- libsanitizer/ChangeLog | 6 + .../sanitizer_platform_limits_posix.cpp | 6 +- libstdc++-v3/ChangeLog | 4 + .../post/aarch64-linux-gnu/baseline_symbols.txt | 5 + 49 files changed, 1056 insertions(+), 173 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-92015.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/decomp50.C copy gcc/testsuite/{gcc.dg/diag-aka-5.h => g++.dg/diagnostic/aka5.h} (100%) create mode 100644 gcc/testsuite/g++.dg/diagnostic/aka5a.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/aka5b.C create mode 100644 gcc/testsuite/g++.dg/pr85746.C create mode 100644 gcc/testsuite/g++.dg/rtti/pr83534.C create mode 100644 gcc/testsuite/g++.target/aarch64/diag_aka_1.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92173.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (e5f3c0e3b8 -> 6207ed2877)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/binutils-gdb. from e5f3c0e3b8 Remove tui_exec_info_content adds 45f47c3a25 gdb: Ensure that !(a < a) is true in sort_cmp on obj_section [...] adds 7ba99d2188 DWARF 5 support: Handle line table and file indexes adds 5ae8188eaa Automatic date update in version.in adds ef0cc92e9c Don't allow RELATIVE relocs in pr22269 testcase adds 6207ed2877 Prevent more potential illegal memory accesses in the RX dis [...] No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 33 +++++++ gdb/dwarf2read.c | 183 +++++++++++++++++++++++---------------- gdb/objfiles.c | 16 ++-- ld/ChangeLog | 8 ++ ld/testsuite/ld-elf/pr22269-1.rd | 6 +- ld/testsuite/ld-elf/shared.exp | 4 +- opcodes/ChangeLog | 7 ++ opcodes/rx-dis.c | 50 +++++++---- 9 files changed, 207 insertions(+), 102 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig updated (a9621a1 -> a53bd4b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards a9621a1 2: update: binutils-gcc-linux: 19056 new a53bd4b 2: update: binutils-gcc-linux: 19059 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a9621a1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 338 +- 03-build_abe-binutils/console.log | 11433 +++++++------- 04-build_abe-stage1/console.log | 15959 ++++++++++--------- 05-build_linux/console.log | 2240 +-- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 86 +- console.log | 30212 ++++++++++++++++++------------------ jenkins/manifest.sh | 16 +- results | 2 +- 10 files changed, 30203 insertions(+), 30219 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (7d194c2100ad -> 3b7c59a1950c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 7d194c2100ad Linux 5.4-rc4 adds 20504fa1d2ff pinctrl: armada-37xx: fix control of pins 32 and up adds f876dbff857b pinctrl: bcm-iproc: Use SPDX header adds 39b65fbb8130 pinctrl: ns2: Fix off by one bugs in ns2_pinmux_enable() adds 48659227e0a1 pinctrl: iproc: allow for error from platform_get_irq() adds 2fd215b8fdbe pinctrl: stmfx: fix null pointer on remove adds b835d6953009 pinctrl: armada-37xx: swap polarity on LED group adds 57ff2df1b952 pinctrl: intel: Allocate IRQ chip dynamic adds 260996c30f4f pinctrl: cherryview: restore Strago DMI workaround for all [...] adds d2fe76dddaac Merge tag 'intel-pinctrl-fixes-v5.4' of git://git.kernel.o [...] adds 8f1c9dffe30b pinctrl: berlin: as370: fix a typo s/spififib/spdifib adds 9091a0698be2 dt-bindings: pinctrl: aspeed-g6: Rework SD3 function and groups adds 377dfcdcc046 pinctrl: aspeed-g6: Sort pins for sanity adds b178f91f449c pinctrl: aspeed-g6: Fix I2C14 SDA description adds 9979346f5560 pinctrl: aspeed-g6: Fix I3C3/I3C4 pinmux configuration adds c136d4c71f75 pinctrl: aspeed-g6: Make SIG_DESC_CLEAR() behave intuitively adds 155058343253 pinctrl: aspeed-g6: Fix UART13 group pinmux adds d6e7a1a5119c pinctrl: aspeed-g6: Rename SD3 to EMMC and rework pin groups adds 3b7c59a1950c Merge tag 'pinctrl-v5.4-2' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: .../bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 86 +++++++------- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 124 +++++++++------------ drivers/pinctrl/aspeed/pinmux-aspeed.h | 3 +- drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 12 +- drivers/pinctrl/bcm/pinctrl-ns2-mux.c | 4 +- drivers/pinctrl/berlin/pinctrl-as370.c | 2 +- drivers/pinctrl/intel/pinctrl-cherryview.c | 4 - drivers/pinctrl/intel/pinctrl-intel.c | 27 ++--- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 26 ++--- drivers/pinctrl/pinctrl-stmfx.c | 2 +- 10 files changed, 131 insertions(+), 159 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (4b965d2 -> 1581b23)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 4b965d2 0: update: llvm-linux: boot new 1581b23 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4b965d2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 11954 +++++++++++++++++----------------- 03-build_linux/console.log | 666 +- 04-boot_linux/console.log | 438 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 8 +- console.log | 13294 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 13298 insertions(+), 13298 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (1f43ea41c33 -> 3bf7fddeb05)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from 1f43ea41c33 Prune Pass.h include from DataLayout.h. NFCI adds 78424e5f841 Prune include of DataLayout.h from include/clang/Basic/Targ [...] adds 0cfd9e5b580 [test] Merge Driver/as-w-warnings.c into as-no-warnings.c adds afb163f53ad SemaExceptionSpec - silence static analyzer getAs<> null de [...] adds ca7f4d8b85b [NFC][CVP] Add `shl` no-wrap deduction test coverage adds 87cb734c04b [Clang] Add VerboseOutputStream to CompilerInstance adds 502a509e478 SemaTemplateDeduction - silence static analyzer getAs<> nul [...] adds 8f2dac471ad Reverted r375425 as it broke some buildbots. adds 7c15c4fb174 [X86] Rename matchBitOpReduction to matchScalarReduction. NFCI. adds 33092194f2c [AMDGPU] Select AGPR in PHI operand legalization adds b5234b64af8 AMDGPU: Slightly restructure m0 init code adds dd6cf159bab AMDGPU: Stop adding m0 implicit def to SGPR spills adds 8ebbf25cb1e AMDGPU: Erase redundant redefs of m0 in SIFoldOperands adds 38038f116f7 AMDGPU: Use CopyToReg for interp intrinsic lowering adds 6f0ae81512c [GISel][CombinerHelper] Add a combine turning shuffle_vecto [...] adds e5ecba4f53e [clang-fuzzer] Add new fuzzer target for Objective-C adds ed870cce676 Found more timeouts to unify. adds 7cd7f4a83b7 [CVP] No-wrap deduction for `shl` adds 8c6913a07bf [lit] Remove redundancy from names and comments adds ef9a0278f0a AMDGPU: Select basic interp directly from intrinsics adds 3330cad6307 [lit] Simplify test scheduling via multiprocessing.Pool adds 3434472ed74 XFAIL TestLocalVariables.py on Windows adds 97263fa2ddd AMDGPU/GlobalISel: Legalize fast unsafe FDIV adds 0b4368cbfba [examples] Add a dependency on ExecutionEngine to LLJITWith [...] adds 95c184cd0aa [X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) movm [...] adds b446356bf33 [X86][SSE] Add OR(EXTRACTELT(X,0),OR(EXTRACTELT(X,1))) -> M [...] adds 667c2eb08b9 Factor out common test functionality into a helper class. (NFC) adds e57fe85a599 whitespace cleanup adds 8896d073b19 [Implicit Modules] Add -cc1 option -fmodules-strict-context [...] adds cb92413c520 Fix -fuse-init-array decision logic on NetBSD adds 3292facc0a2 [NFC] Fix typos in CMake comment adds e25898d93f7 [X86][BMI] Pull out schedule classes from bmi_andn<> and bmi_bls<> adds e17b658fc75 [hwasan] Workaround unwinder issues in try-catch test. adds d56203201f8 Fix lld detection in standalone compiler-rt. adds b94ac8a2632 [lit] Move increase_process_limit to ParallelRun adds 04edd1893c2 remove multi-argument form of PythonObject::Reset() adds d602e0d0cab fix PythonDataObjectsTest.TestExceptions on windows adds 114de1eab29 Minor coding style fix. NFC. adds fb042b094fd Refactor DependencyScanningTool to its own file adds 4e039e2720f gn build: Merge r375483 adds e659fff2fb7 [CMake] Allow overriding MSVC_DIA_SDK_DIR via CMake adds 3fe1c88bb2b [CMake] [WinMsvc] Look for includes and libs in ${MSVC_BASE [...] adds 64226b2df66 [clang-fuzzer] Update proto fuzzer example for r375453. adds 3ca2b17f847 [FrontendTests] Don't actually run the full compiler, parsi [...] adds 2108a974f78 Revert "[FrontendTests] Don't actually run the full compile [...] adds 1876e6c83c7 [builtins][test] Avoid unportable mmap call in clear_cache_test.c adds ecc999101aa [FrontendTests] Try again to make test not write an output file adds 78d632d1055 [LLVMDebugInfoPDB] - Use cantFail() instead of assert(). adds 0f4186779e0 [ThinLTO] Don't internalize during promotion adds 17f5d2b1a5c [Alignment][NFC] Attributes use Align/MaybeAlign adds 8e050e41a4b [Alignment][NFC] Use MaybeAlign in AttrBuilder adds f2c8f3b181e [PowerPC] Turn on CR-Logical reducer pass adds 734c74ba14b [Alignment][NFC] Convert LoadInst to MaybeAlign adds 5b99c189b3b [Alignment][NFC] Convert StoreInst to MaybeAlign adds e5dd30f77e1 [ThinLTO] Add code comment. NFC adds e4af9de36ca [MIPS GlobalISel] Select MSA vector generic and builtin add adds 95290827d7d [MIParser] Set RegClassOrRegBank during instruction parsing adds 3ef017d0669 [InstCombine] Signed saturation tests. NFC adds 40c47680eb2 [libcxx] Remove shared_ptr::make_shared adds 186155b89c2 [InstCombine] Signed saturation patterns adds 3bf7fddeb05 Update git-llvm script to push to GitHub No new revisions were added by this update. Summary of changes: clang/docs/Modules.rst | 10 + clang/include/clang/Basic/TargetInfo.h | 8 +- clang/include/clang/Driver/CC1Options.td | 3 + clang/include/clang/Frontend/CompilerInstance.h | 24 +- clang/include/clang/Lex/HeaderSearchOptions.h | 20 +- .../DependencyScanning/DependencyScanningTool.h | 48 ++ clang/lib/Basic/TargetInfo.cpp | 5 + clang/lib/Basic/Targets/AMDGPU.cpp | 1 + clang/lib/Driver/ToolChains/NetBSD.cpp | 15 +- clang/lib/Frontend/CompilerInstance.cpp | 14 +- clang/lib/Frontend/CompilerInvocation.cpp | 20 + clang/lib/Frontend/InitPreprocessor.cpp | 1 + clang/lib/Sema/SemaExceptionSpec.cpp | 7 +- clang/lib/Sema/SemaLambda.cpp | 3 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 10 +- .../lib/Tooling/DependencyScanning/CMakeLists.txt | 1 + .../DependencyScanning/DependencyScanningTool.cpp | 71 ++ clang/test/Driver/as-no-warnings.c | 9 +- clang/test/Driver/as-w-option.c | 7 - clang/test/Driver/netbsd.c | 15 + clang/test/Modules/context-hash.c | 34 + clang/tools/clang-fuzzer/CMakeLists.txt | 13 + clang/tools/clang-fuzzer/ClangFuzzer.cpp | 2 +- .../{ClangFuzzer.cpp => ClangObjectiveCFuzzer.cpp} | 13 +- clang/tools/clang-fuzzer/Dockerfile | 1 + .../tools/clang-fuzzer/ExampleClangProtoFuzzer.cpp | 2 +- clang/tools/clang-fuzzer/README.txt | 43 +- .../clang-fuzzer/corpus_examples/objc/BasicClass.m | 29 + .../corpus_examples/objc/ClassCategory.m | 20 + .../corpus_examples/objc/ClassExtension.m | 20 + .../corpus_examples/objc/SharedInstance.m | 34 + clang/tools/clang-fuzzer/handle-cxx/handle_cxx.cpp | 5 +- clang/tools/clang-fuzzer/handle-cxx/handle_cxx.h | 1 + clang/tools/clang-scan-deps/ClangScanDeps.cpp | 125 +--- clang/unittests/AST/DeclTest.cpp | 1 + clang/unittests/Frontend/OutputStreamTest.cpp | 57 ++ compiler-rt/CMakeLists.txt | 2 +- compiler-rt/cmake/config-ix.cmake | 1 + compiler-rt/test/builtins/Unit/clear_cache_test.c | 2 +- compiler-rt/test/hwasan/TestCases/try-catch.cpp | 9 +- libcxx/include/CMakeLists.txt | 4 +- libcxx/include/memory | 45 +- lldb/include/lldb/Interpreter/ScriptInterpreter.h | 3 + .../lang/c/local_variables/TestLocalVariables.py | 1 + .../test/tools/lldb-server/TestGdbRemoteKill.py | 2 +- .../lldb-server/TestGdbRemoteThreadsInStopReply.py | 5 +- .../lldb-server/TestGdbRemote_qThreadStopInfo.py | 5 +- lldb/scripts/Python/python-extensions.swig | 205 ++---- lldb/scripts/Python/python-typemaps.swig | 21 +- lldb/scripts/Python/python-wrapper.swig | 43 -- lldb/scripts/lldb.swig | 5 + .../ScriptInterpreter/Python/CMakeLists.txt | 1 - .../ScriptInterpreter/Python/PythonDataObjects.cpp | 137 +++- .../ScriptInterpreter/Python/PythonDataObjects.h | 115 +-- .../Python/PythonExceptionState.cpp | 169 ----- .../Python/PythonExceptionState.h | 56 -- .../Python/ScriptInterpreterPython.cpp | 291 ++++---- .../Python/ScriptInterpreterPythonImpl.h | 26 +- lldb/unittests/Expression/DWARFExpressionTest.cpp | 172 ++--- .../ScriptInterpreter/Python/CMakeLists.txt | 1 - .../Python/PythonDataObjectsTests.cpp | 84 +++ .../Python/PythonExceptionStateTests.cpp | 164 ----- llvm/cmake/config-ix.cmake | 3 +- llvm/cmake/platforms/WinMsvc.cmake | 4 + .../LLJITWithObjectCache/CMakeLists.txt | 1 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 17 + .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 5 +- llvm/include/llvm/CodeGen/TargetFrameLowering.h | 8 - llvm/include/llvm/IR/Attributes.h | 40 +- llvm/include/llvm/IR/Function.h | 9 +- llvm/include/llvm/IR/InstrTypes.h | 10 +- llvm/include/llvm/IR/Instructions.h | 32 +- llvm/lib/AsmParser/LLParser.cpp | 43 +- llvm/lib/AsmParser/LLParser.h | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 12 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 87 +++ llvm/lib/CodeGen/LiveDebugValues.cpp | 3 +- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 2 + llvm/lib/CodeGen/RegUsageInfoCollector.cpp | 4 +- llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp | 13 - .../PDB/Native/NativeEnumInjectedSources.cpp | 25 +- llvm/lib/IR/AttributeImpl.h | 4 +- llvm/lib/IR/Attributes.cpp | 51 +- llvm/lib/IR/Instructions.cpp | 59 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 9 +- .../Target/AArch64/AArch64MachineFunctionInfo.h | 52 +- .../Target/AArch64/AArch64PreLegalizerCombiner.cpp | 2 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 28 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 12 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 88 ++- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 8 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 21 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 52 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 19 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 12 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 6 - llvm/lib/Target/ARM/ARMFrameLowering.h | 2 - llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 60 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 18 +- llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 9 +- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 26 +- llvm/lib/Target/X86/X86InstrArithmetic.td | 10 +- llvm/lib/Target/X86/X86InstrInfo.td | 19 +- llvm/lib/Transforms/IPO/FunctionImport.cpp | 4 + llvm/lib/Transforms/IPO/GlobalOpt.cpp | 16 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 7 +- .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstCombineLoadStoreAlloca.cpp | 4 +- llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp | 6 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 67 ++ .../Scalar/CorrelatedValuePropagation.cpp | 9 + .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 5 +- llvm/lib/Transforms/Scalar/GVN.cpp | 8 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 3 +- .../prelegalizercombiner-shuffle-vector.mir | 353 +++++++++ ...g-callee-save-size-after-livedebugvariables.mir | 92 --- .../GlobalISel/legalize-fast-unsafe-fdiv.mir | 798 +++++++++++++++++++++ .../AMDGPU/fold-operands-remove-m0-redef.mir | 366 ++++++++++ .../CodeGen/AMDGPU/indirect-addressing-term.ll | 16 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll | 8 +- llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 53 +- .../AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir | 4 +- llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll | 27 + .../test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir | 39 + .../Mips/GlobalISel/instruction-select/add_vec.mir | 130 ++++ .../CodeGen/Mips/GlobalISel/legalizer/add_vec.mir | 122 ++++ .../Mips/GlobalISel/legalizer/add_vec_builtin.mir | 237 ++++++ .../GlobalISel/legalizer/sitofp_and_uitofp.mir | 20 +- .../CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll | 70 ++ .../Mips/GlobalISel/llvm-ir/add_vec_builtin.ll | 138 ++++ .../Mips/GlobalISel/regbankselect/add_vec.mir | 126 ++++ llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll | 39 +- llvm/test/CodeGen/PowerPC/brcond.ll | 6 +- llvm/test/CodeGen/PowerPC/pr42492.ll | 14 +- llvm/test/CodeGen/PowerPC/tocSaveInPrologue.ll | 15 +- llvm/test/CodeGen/PowerPC/vec-min-max.ll | 23 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 114 ++- .../MIR/X86/live-debug-values-reg-copy.mir | 2 +- llvm/test/ThinLTO/X86/not-internalized.ll | 34 + llvm/test/ThinLTO/X86/weak_externals.ll | 4 +- .../Transforms/CorrelatedValuePropagation/icmp.ll | 4 +- .../Transforms/CorrelatedValuePropagation/shl.ll | 378 ++++++++++ llvm/test/Transforms/InstCombine/sadd_sat.ll | 503 +++++++++++++ llvm/unittests/IR/AttributesTest.cpp | 8 +- llvm/utils/git-svn/git-llvm | 510 ++----------- .../clang/lib/Tooling/DependencyScanning/BUILD.gn | 1 + llvm/utils/lit/lit/LitTestCase.py | 2 +- llvm/utils/lit/lit/main.py | 25 - llvm/utils/lit/lit/run.py | 78 +- llvm/utils/lit/lit/worker.py | 32 +- 155 files changed, 5501 insertions(+), 2201 deletions(-) create mode 100644 clang/include/clang/Tooling/DependencyScanning/DependencyScanni [...] create mode 100644 clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp delete mode 100644 clang/test/Driver/as-w-option.c create mode 100644 clang/test/Modules/context-hash.c copy clang/tools/clang-fuzzer/{ClangFuzzer.cpp => ClangObjectiveCFuzzer.cpp} (62%) create mode 100644 clang/tools/clang-fuzzer/corpus_examples/objc/BasicClass.m create mode 100644 clang/tools/clang-fuzzer/corpus_examples/objc/ClassCategory.m create mode 100644 clang/tools/clang-fuzzer/corpus_examples/objc/ClassExtension.m create mode 100644 clang/tools/clang-fuzzer/corpus_examples/objc/SharedInstance.m delete mode 100644 lldb/source/Plugins/ScriptInterpreter/Python/PythonExceptionState.cpp delete mode 100644 lldb/source/Plugins/ScriptInterpreter/Python/PythonExceptionState.h delete mode 100644 lldb/unittests/ScriptInterpreter/Python/PythonExceptionStateTests.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-shuff [...] delete mode 100644 llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebu [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fast-unsafe-fdiv.mir create mode 100644 llvm/test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir create mode 100644 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll create mode 100644 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir create mode 100644 llvm/test/ThinLTO/X86/not-internalized.ll create mode 100644 llvm/test/Transforms/CorrelatedValuePropagation/shl.ll create mode 100644 llvm/test/Transforms/InstCombine/sadd_sat.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (7189888 -> d57488b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 7189888 0: update: llvm-linux: boot new d57488b 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7189888) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-build_llvm/console.log | 12088 +++++++++++++------------- 03-build_linux/console.log | 4614 +++++----- 04-boot_linux/console.log | 476 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 8 +- console.log | 17414 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 8 files changed, 17420 insertions(+), 17416 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[binutils-gdb] branch master updated (6207ed2877 -> ccb1ba6229)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 6207ed2877 Prevent more potential illegal memory accesses in the RX dis [...] new 7bb4305982 Store the mangled name as a string_view new 1a6ff1a96b Add a fast_hash function in common-utils new ccb1ba6229 Use libxxhash for hashing, if present The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/ChangeLog | 27 +++ gdb/Makefile.in | 8 +- gdb/config.in | 3 + gdb/configure | 497 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ gdb/configure.ac | 23 +++ gdb/symtab.c | 16 +- gdb/utils.c | 4 + gdb/utils.h | 14 ++ 8 files changed, 583 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig updated (7d194c2100ad -> 3b7c59a1950c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig in repository toolchain/ci/linux. from 7d194c2100ad Linux 5.4-rc4 adds 20504fa1d2ff pinctrl: armada-37xx: fix control of pins 32 and up adds f876dbff857b pinctrl: bcm-iproc: Use SPDX header adds 39b65fbb8130 pinctrl: ns2: Fix off by one bugs in ns2_pinmux_enable() adds 48659227e0a1 pinctrl: iproc: allow for error from platform_get_irq() adds 2fd215b8fdbe pinctrl: stmfx: fix null pointer on remove adds b835d6953009 pinctrl: armada-37xx: swap polarity on LED group adds 57ff2df1b952 pinctrl: intel: Allocate IRQ chip dynamic adds 260996c30f4f pinctrl: cherryview: restore Strago DMI workaround for all [...] adds d2fe76dddaac Merge tag 'intel-pinctrl-fixes-v5.4' of git://git.kernel.o [...] adds 8f1c9dffe30b pinctrl: berlin: as370: fix a typo s/spififib/spdifib adds 9091a0698be2 dt-bindings: pinctrl: aspeed-g6: Rework SD3 function and groups adds 377dfcdcc046 pinctrl: aspeed-g6: Sort pins for sanity adds b178f91f449c pinctrl: aspeed-g6: Fix I2C14 SDA description adds 9979346f5560 pinctrl: aspeed-g6: Fix I3C3/I3C4 pinmux configuration adds c136d4c71f75 pinctrl: aspeed-g6: Make SIG_DESC_CLEAR() behave intuitively adds 155058343253 pinctrl: aspeed-g6: Fix UART13 group pinmux adds d6e7a1a5119c pinctrl: aspeed-g6: Rename SD3 to EMMC and rework pin groups adds 3b7c59a1950c Merge tag 'pinctrl-v5.4-2' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: .../bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 86 +++++++------- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 124 +++++++++------------ drivers/pinctrl/aspeed/pinmux-aspeed.h | 3 +- drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 12 +- drivers/pinctrl/bcm/pinctrl-ns2-mux.c | 4 +- drivers/pinctrl/berlin/pinctrl-as370.c | 2 +- drivers/pinctrl/intel/pinctrl-cherryview.c | 4 - drivers/pinctrl/intel/pinctrl-intel.c | 27 ++--- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 26 ++--- drivers/pinctrl/pinctrl-stmfx.c | 2 +- 10 files changed, 131 insertions(+), 159 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig updated (040e384 -> 8587370)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 040e384 0: update: llvm-linux: all new 8587370 0: update: llvm-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (040e384) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-build_llvm/console.log | 11760 ++++++++++++++++++------------------ 03-build_linux/console.log | 738 +-- 04-boot_linux/console.log | 2 +- console.log | 12630 +++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 6 files changed, 12634 insertions(+), 12634 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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