Tcwg-commits October 2019

tcwg-commits@lists.linaro.org

6 participants
13959 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (d57488b -> d314ec8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards d57488b 0: update: llvm-linux: boot new d314ec8 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d57488b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-build_llvm/console.log | 12847 ++++++++++++++-------------- 03-build_linux/console.log | 4552 +++++----- 04-boot_linux/console.log | 476 +- console.log | 18005 ++++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 6 files changed, 18362 insertions(+), 17656 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (3b7c59a1950c -> 13b86bc4cd64)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 3b7c59a1950c Merge tag 'pinctrl-v5.4-2' of git://git.kernel.org/pub/scm [...] adds 44db1216efe3 Btrfs: add missing extents release on file extent cluster [...] adds 4b654acdae85 btrfs: block-group: Fix a memory leak due to missing btrfs [...] adds 80ed4548d071 btrfs: don't needlessly create extent-refs kernel thread adds 8702ba9396bf btrfs: qgroup: Always free PREALLOC META reserve in btrfs_ [...] adds fd2b007eaec8 btrfs: tracepoints: Fix wrong parameter order for qgroup events adds 1b2442b4ae0f btrfs: tracepoints: Fix bad entry members of qgroup events adds c7967fc1499b Btrfs: fix qgroup double free after failure to reserve met [...] adds ba0b084ac309 Btrfs: check for the full sync flag while holding the inod [...] adds 54955e3bfde5 Merge tag 'for-5.4-rc4-tag' of git://git.kernel.org/pub/sc [...] adds 1e72e673b9d1 EDAC/ghes: Fix Use after free in ghes_edac remove path adds e969c860d563 Merge tag 'edac_urgent_for_5.4' of git://git.kernel.org/pu [...] adds 67e15fa5b487 ARM: mm: fix alignment handler faults under memory pressure adds 1bb9fb0a147f ARM: mm: alignment: use "u32" for 32-bit instructions adds 851140ab0d08 ARM: 8908/1: add __always_inline to functions called from [...] adds 4c0742f65b4e ARM: 8914/1: NOMMU: Fix exc_ret for XIP adds 2ecb287998a4 ARM: 8926/1: v7m: remove register save to stack before svc adds e963408e8ff4 drivers/amba: fix reset control error handling adds 39f4d4410484 Merge branch 'misc' into fixes adds 13b86bc4cd64 Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm No new revisions were added by this update. Summary of changes: arch/arm/include/asm/domain.h | 8 ++--- arch/arm/include/asm/uaccess.h | 4 +-- arch/arm/kernel/head-common.S | 5 +-- arch/arm/kernel/head-nommu.S | 2 ++ arch/arm/mm/alignment.c | 70 +++++++++++++++++++++++++++++------------- arch/arm/mm/proc-v7m.S | 6 ++-- drivers/amba/bus.c | 14 +++++++-- drivers/edac/ghes_edac.c | 4 +++ fs/btrfs/block-group.c | 1 + fs/btrfs/ctree.h | 5 +-- fs/btrfs/delalloc-space.c | 7 ++--- fs/btrfs/disk-io.c | 6 ---- fs/btrfs/file.c | 43 ++++++++++++-------------- fs/btrfs/inode-map.c | 4 +-- fs/btrfs/inode.c | 12 ++++---- fs/btrfs/ioctl.c | 6 ++-- fs/btrfs/qgroup.c | 4 +-- fs/btrfs/relocation.c | 9 +++--- include/trace/events/btrfs.h | 3 +- 19 files changed, 120 insertions(+), 93 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig updated (1581b23 -> c4cfa8d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-defconfig in repository toolchain/ci/base-artifacts. discards 1581b23 0: update: llvm-linux: boot new c4cfa8d 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1581b23) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-build_llvm/console.log | 11962 +++++++++++++++++------------------ 03-build_linux/console.log | 666 +- 04-boot_linux/console.log | 434 +- console.log | 13190 +++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 6 files changed, 13194 insertions(+), 13194 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[gcc] branch master updated (c5edfbaf16a -> 8cb9169f976)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from c5edfbaf16a 2019-10-23 Jozef Lawrynowicz <jozef.l(a)mittosystems.com> new f34b64d760a PR c++/91369 Implement P0784R7 changes to allocation and co [...] new 8cb9169f976 Make std::invoke usable in constant expressions The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libstdc++-v3/ChangeLog | 59 ++++++++++ libstdc++-v3/include/bits/alloc_traits.h | 125 +++++++++++++------- libstdc++-v3/include/bits/allocator.h | 37 +++++- libstdc++-v3/include/bits/stl_construct.h | 128 +++++++++++++-------- libstdc++-v3/include/bits/stl_uninitialized.h | 4 +- libstdc++-v3/include/ext/alloc_traits.h | 16 ++- libstdc++-v3/include/ext/malloc_allocator.h | 4 +- libstdc++-v3/include/ext/new_allocator.h | 4 +- libstdc++-v3/include/std/functional | 11 +- libstdc++-v3/include/std/version | 1 + .../invoke/constexpr.cc} | 24 ++-- .../testsuite/20_util/headers/memory/synopsis.cc | 6 + .../20_util/scoped_allocator/69293_neg.cc | 3 + .../specialized_algorithms/construct_at/1.cc | 64 +++++++++++ .../vector/cons/destructible_debug_neg.cc | 4 + .../23_containers/vector/cons/destructible_neg.cc | 4 + 16 files changed, 368 insertions(+), 126 deletions(-) copy libstdc++-v3/testsuite/20_util/{reference_wrapper/incomplete.cc => function_o [...] create mode 100644 libstdc++-v3/testsuite/20_util/specialized_algorithms/construct [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (3b7c59a1950c -> 13b86bc4cd64)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/linux. from 3b7c59a1950c Merge tag 'pinctrl-v5.4-2' of git://git.kernel.org/pub/scm [...] adds 44db1216efe3 Btrfs: add missing extents release on file extent cluster [...] adds 4b654acdae85 btrfs: block-group: Fix a memory leak due to missing btrfs [...] adds 80ed4548d071 btrfs: don't needlessly create extent-refs kernel thread adds 8702ba9396bf btrfs: qgroup: Always free PREALLOC META reserve in btrfs_ [...] adds fd2b007eaec8 btrfs: tracepoints: Fix wrong parameter order for qgroup events adds 1b2442b4ae0f btrfs: tracepoints: Fix bad entry members of qgroup events adds c7967fc1499b Btrfs: fix qgroup double free after failure to reserve met [...] adds ba0b084ac309 Btrfs: check for the full sync flag while holding the inod [...] adds 54955e3bfde5 Merge tag 'for-5.4-rc4-tag' of git://git.kernel.org/pub/sc [...] adds 1e72e673b9d1 EDAC/ghes: Fix Use after free in ghes_edac remove path adds e969c860d563 Merge tag 'edac_urgent_for_5.4' of git://git.kernel.org/pu [...] adds 67e15fa5b487 ARM: mm: fix alignment handler faults under memory pressure adds 1bb9fb0a147f ARM: mm: alignment: use "u32" for 32-bit instructions adds 851140ab0d08 ARM: 8908/1: add __always_inline to functions called from [...] adds 4c0742f65b4e ARM: 8914/1: NOMMU: Fix exc_ret for XIP adds 2ecb287998a4 ARM: 8926/1: v7m: remove register save to stack before svc adds e963408e8ff4 drivers/amba: fix reset control error handling adds 39f4d4410484 Merge branch 'misc' into fixes adds 13b86bc4cd64 Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm No new revisions were added by this update. Summary of changes: arch/arm/include/asm/domain.h | 8 ++--- arch/arm/include/asm/uaccess.h | 4 +-- arch/arm/kernel/head-common.S | 5 +-- arch/arm/kernel/head-nommu.S | 2 ++ arch/arm/mm/alignment.c | 70 +++++++++++++++++++++++++++++------------- arch/arm/mm/proc-v7m.S | 6 ++-- drivers/amba/bus.c | 14 +++++++-- drivers/edac/ghes_edac.c | 4 +++ fs/btrfs/block-group.c | 1 + fs/btrfs/ctree.h | 5 +-- fs/btrfs/delalloc-space.c | 7 ++--- fs/btrfs/disk-io.c | 6 ---- fs/btrfs/file.c | 43 ++++++++++++-------------- fs/btrfs/inode-map.c | 4 +-- fs/btrfs/inode.c | 12 ++++---- fs/btrfs/ioctl.c | 6 ++-- fs/btrfs/qgroup.c | 4 +-- fs/btrfs/relocation.c | 9 +++--- include/trace/events/btrfs.h | 3 +- 19 files changed, 120 insertions(+), 93 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig updated (052baf5 -> 6aa0881)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 052baf5 0: update: llvm-linux: boot new 6aa0881 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (052baf5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 78 +- 02-build_llvm/console.log | 12024 +++++++++++++++++------------------ 03-build_linux/console.log | 666 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 14 +- console.log | 12790 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 7 files changed, 12794 insertions(+), 12794 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (aa98d62d9c7 -> 59b9270a3ef)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/gcc. from aa98d62d9c7 PR c++/92062 - ODR-use ignored for static member of class [...] adds 8d4b1882b59 2019-10-22 Steven G. Kargl <kargl(a)gcc.gnu.org> adds b553943b346 Daily bump. adds 6d913d0b879 2019-10-23 Richard Biener <rguenther(a)suse.de> adds 2e3e912d1c8 PR tree-optimization/92131 * tree-vrp.c (extract_range_fr [...] adds 2a156f5d0df Backport r276141 adds 59b9270a3ef Backport r276178 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 26 +++++++++ gcc/DATESTAMP | 2 +- gcc/dwarf2out.c | 23 ++++---- gcc/fortran/ChangeLog | 6 ++ gcc/fortran/array.c | 14 +++++ gcc/fortran/decl.c | 8 --- gcc/testsuite/ChangeLog | 29 ++++++++++ gcc/testsuite/g++.dg/debug/dwarf2/pr91887.C | 12 ++++ gcc/testsuite/gcc.c-torture/execute/20191023-1.c | 73 ++++++++++++++++++++++++ gcc/testsuite/gcc.dg/pr91885.c | 47 +++++++++++++++ gcc/tree-vectorizer.c | 2 +- gcc/tree-vrp.c | 13 +++-- 12 files changed, 227 insertions(+), 28 deletions(-) create mode 100644 gcc/testsuite/g++.dg/debug/dwarf2/pr91887.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/20191023-1.c create mode 100644 gcc/testsuite/gcc.dg/pr91885.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig updated (4dd872c -> 87146e7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 4dd872c 0: update: binutils-gcc-linux: boot new 87146e7 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4dd872c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11145 +++++++-------- 04-build_abe-stage1/console.log | 14122 +++++++++---------- 05-build_linux/console.log | 794 +- console.log | 26697 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 7 files changed, 26691 insertions(+), 26681 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[gcc] branch master updated (6baec19fb63 -> c5edfbaf16a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 6baec19fb63 Replace C++14 feature used in C++11 test new 6f6e061fa29 2019-10-23 Jozef Lawrynowicz <jozef.l(a)mittosystems.com> new c5edfbaf16a 2019-10-23 Jozef Lawrynowicz <jozef.l(a)mittosystems.com> The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 12 +++ gcc/config/msp430/msp430-protos.h | 1 + gcc/config/msp430/msp430.c | 22 ++--- gcc/config/msp430/msp430.md | 8 +- libgcc/ChangeLog | 12 +++ libgcc/config/msp430/lib2hw_mul.S | 170 +++++++++++++++++++++++--------------- libgcc/config/msp430/lib2mul.c | 3 + 7 files changed, 147 insertions(+), 81 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (3bf7fddeb05 -> d01fd2f35a0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig in repository toolchain/ci/llvm-project. from 3bf7fddeb05 Update git-llvm script to push to GitHub adds 0bff9bd26e3 [lldb] Adjust for the new class_rw_t layout. adds 19ca80ef057 gn build: make sync build work with git revs now that svn is gone adds 48f57138be5 [AMDGPU] Allow tied operand subreg folding adds 8be5827f856 Test commit - add clarification to README regarding Darwin. adds a7cebfe9c03 Relax assertions when there's really no entries. [NFC] adds f9b1dc5553c [AMDGPU] Updated fold-vgpr-copy.mir test. NFC. adds 9b1419a9e50 [NFC][LVI][CVP] Tests where pre-specified `add` no-wrap fla [...] adds 4334892e7b0 [DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' [...] adds 68f5ca4e19c [HIP] Add option -fgpu-allow-device-init adds aed9d6d64a3 [RISCV] Add support for -ffixed-xX flags adds e0e7d06df3e fix a few typos to test git committing adds 70316d3174d Revert "Fix lld detection in standalone compiler-rt." adds 1c98ff49a30 Fix name of warn_ignored_hip_only_option adds 4c539e8da1b Revert r374202"[ObjC generics] Fix not inheriting type boun [...] adds f86dc64bad4 typo fix test commit adds cf57be9d349 [PowerPC][NFC] Remove deprecated Function Attrs comments adds efd7caaa4ec Fix broken sphinx link in CMake.rst. adds 31d3c1d8b70 [PowerPC][NFC] Remove deprecated Function Attrs comments #2 adds 19e95ab4210 [NFC] Strip trailing whitespace in test to test Github committing adds 437e0e5191c [libcxx][test][NFC] Fix comment typos. adds d052a578de5 [c++2a] Allow comparison functions to be explicitly defaulted. adds 20bf0cf2f02 [TargetLowering] optimizeSetCCToComparisonWithZero(): add e [...] adds c46d24f5c31 [MIPS GlobalISel] Select MSA vector generic and builtin sub adds d1815dacb00 [MIPS GlobalISel] Select MSA vector generic and builtin mul adds 64df708400a [lib/ObjectYAML] - Add a full stop to the comment. NFC. adds 74a72e68484 [DebugInfo] Stop describing imms in TargetInstrInfo's descr [...] adds 4b63ca1379a [Mips] Use appropriate private label prefix based on Mips ABI adds 40668abca4d [Support] Add a way to run a function on a detached thread adds 7bc7fe6b789 Revert "[Support] Add a way to run a function on a detached [...] adds 977205b595c [Sanitizers] Add support for RISC-V 64-bit adds 10c8dbcb840 [clangd] Propogate context in TUScheduler::run adds a9c3c176ad7 Reland "[Support] Add a way to run a function on a detached [...] adds a4d55a2c360 [X86] combineX86ShufflesRecursively - assert the root mask [...] adds 82b1b39b367 [mips] Reformat `la / dla` expansion test cases. NFC adds 263abc6761a [mips] Add tests to check `la / dla` expansion in XGOT cases. NFC adds c470a9b586c [mips] Implement `la` macro expansion for N32 ABI adds 8e574e56c62 [mips] Use `expandLoadAddress` for JAL expansion adds 689ce810598 [libc++][NFC] Remove excess trailing newlines from most files adds be86fdb86e1 [analyzer] Fix off-by-one in operator call parameter binding. adds 1f665046fbf [LVI][CVP] LazyValueInfoImpl::solveBlockValueBinaryOp(): us [...] adds 8eda8f8ce85 [LVI][NFC] Factor solveBlockValueSaturatingIntrinsic() out [...] adds 342c02d0ad5 Fix non-portable GNU diff option adds 60286818ff8 [Analysis] Update Analysis/LazyValueAnalysis/lvi-after-jump [...] adds 8bda5f20674 [clangd] abort if shutdown takes more than a minute. new b689cc640f3 Minor movement of one function with now-correct strictfp at [...] new d01fd2f35a0 [lldb] Add nodebug attribute to import-std-module/sysroot test The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 8 +- clang-tools-extra/clangd/ClangdLSPServer.h | 6 +- clang-tools-extra/clangd/TUScheduler.cpp | 7 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 23 +- .../clangd/unittests/TUSchedulerTests.cpp | 9 + clang/include/clang/AST/Decl.h | 7 + clang/include/clang/AST/Type.h | 2 +- clang/include/clang/Basic/DiagnosticCommonKinds.td | 8 +- clang/include/clang/Basic/DiagnosticGroups.td | 4 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 25 ++ clang/include/clang/Basic/LangOptions.def | 1 + clang/include/clang/Driver/Options.td | 9 +- clang/include/clang/Sema/Sema.h | 73 ++++- clang/lib/AST/Decl.cpp | 23 +- clang/lib/AST/Type.cpp | 4 - clang/lib/CodeGen/CGDeclCXX.cpp | 7 +- clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 64 ++++ clang/lib/Driver/ToolChains/HIP.cpp | 4 + clang/lib/Frontend/CompilerInvocation.cpp | 7 + clang/lib/Parse/ParseDecl.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 3 +- clang/lib/Parse/ParseStmtAsm.cpp | 7 +- clang/lib/Sema/SemaCUDA.cpp | 2 + clang/lib/Sema/SemaDecl.cpp | 22 -- clang/lib/Sema/SemaDeclCXX.cpp | 285 ++++++++++++++--- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 9 +- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/test/Analysis/temporaries.cpp | 16 + .../class.compare/class.compare.default/p1.cpp | 46 +++ clang/test/CXX/class/class.compare/class.eq/p1.cpp | 25 ++ .../test/CXX/class/class.compare/class.rel/p1.cpp | 25 ++ .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 26 +- clang/test/CodeGenCUDA/device-init-fun.cu | 19 ++ clang/test/Driver/riscv-fixed-x-register.c | 341 +++++++++++++++++++++ clang/test/Frontend/warn-device-init-fun.cu | 8 + clang/test/Parser/cxx0x-decl.cpp | 2 +- clang/test/SemaCXX/cxx0x-defaulted-functions.cpp | 2 +- clang/test/SemaCXX/cxx17-compat.cpp | 33 ++ clang/test/SemaObjC/parameterized_classes_subst.m | 14 - clang/tools/driver/cc1as_main.cpp | 5 +- clang/tools/libclang/CIndex.cpp | 4 +- compiler-rt/CMakeLists.txt | 2 +- compiler-rt/cmake/config-ix.cmake | 5 +- .../lib/sanitizer_common/sanitizer_linux.cpp | 10 +- .../lib/sanitizer_common/sanitizer_platform.h | 8 +- .../sanitizer_platform_limits_linux.cpp | 2 +- .../sanitizer_platform_limits_posix.cpp | 2 +- .../sanitizer_platform_limits_posix.h | 3 + libcxx/benchmarks/CMakeLists.txt | 1 - libcxx/benchmarks/CartesianBenchmarks.h | 1 - libcxx/include/__debug | 1 - libcxx/include/experimental/propagate_const | 1 - libcxx/src/mutex_destructor.cpp | 1 - libcxx/src/support/solaris/wcsnrtombs.inc | 1 - .../sequences/deque/spare_block_handling.pass.cpp | 2 - .../list.modifiers/erase_iter_iter_db1.pass.cpp | 1 - .../fstreams/filebuf/traits_mismatch.fail.cpp | 1 - .../file.streams/fstreams/traits_mismatch.fail.cpp | 1 - .../input.streams/traits_mismatch.fail.cpp | 1 - .../output.streams/traits_mismatch.fail.cpp | 1 - .../string.streams/traits_mismatch.fail.cpp | 1 - .../test/libcxx/iterators/advance.debug1.pass.cpp | 1 - libcxx/test/libcxx/iterators/next.debug1.pass.cpp | 1 - .../memory/aligned_allocation_macro.pass.cpp | 2 +- libcxx/test/libcxx/numerics/bit.ops.pass.cpp | 1 - .../meta/stress_tests/stress_test_is_same.sh.cpp | 2 - .../stress_tests/stress_test_metafunctions.sh.cpp | 2 - .../containers/associative/map/contains.pass.cpp | 1 - .../associative/map/map.erasure/erase_if.pass.cpp | 1 - .../containers/associative/set/contains.pass.cpp | 1 - .../array/array.cons/initializer_list.pass.cpp | 2 +- .../containers/unord/unord.map/contains.pass.cpp | 1 - .../containers/unord/unord.map/erase_if.pass.cpp | 1 - .../containers/unord/unord.set/contains.pass.cpp | 1 - .../syserr.errcode.observers/bool.fail.cpp | 1 - ...convertible_element_type.explicit.ctor.pass.cpp | 1 - ...ertible_element_type.non-explicit.ctor.pass.cpp | 1 - .../convertible_propagate_const.copy_ctor.pass.cpp | 1 - .../convertible_propagate_const.move_ctor.pass.cpp | 1 - .../element_type.explicit.ctor.pass.cpp | 1 - .../propagate_const.class/swap.pass.cpp | 1 - .../lexically_relative_and_proximate.pass.cpp | 2 +- .../fs.op.funcs/fs.op.relative/relative.pass.cpp | 2 +- .../weakly_canonical.pass.cpp | 2 +- .../std/input.output/filesystems/lit.local.cfg | 1 - .../fpos/fpos.operations/difference.pass.cpp | 2 +- .../fpos/fpos.operations/subtraction.pass.cpp | 2 +- .../make_reverse_iterator.pass.cpp | 1 - libcxx/test/std/numerics/c.math/abs.fail.cpp | 1 - libcxx/test/std/numerics/c.math/abs.pass.cpp | 4 +- .../string_compare/size_size_string_view.pass.cpp | 2 +- .../opeq.string_view.string.pass.cpp | 1 - .../opge.string_view.pointer.pass.cpp | 4 +- .../opgt.string_view.pointer.pass.cpp | 4 +- .../ople.string_view.pointer.pass.cpp | 4 +- .../oplt.string_view.pointer.pass.cpp | 4 +- .../meta.const.eval/is_constant_evaluated.pass.cpp | 2 +- .../meta/meta.rel/is_convertible.pass.cpp | 2 +- .../meta/meta.rel/is_convertible_fallback.pass.cpp | 1 - .../optional/optional.specalg/swap.pass.cpp | 2 +- .../unique.ptr.asgn/move_convert.pass.cpp | 2 +- .../unique.ptr.class/unique.ptr.ctor/move.pass.cpp | 4 +- .../unique.ptr.ctor/move_convert.pass.cpp | 2 +- .../unique.ptr.ctor/nullptr.pass.cpp | 2 +- .../unique.ptr.ctor/pointer.pass.cpp | 2 +- .../time.cal.weekday.members/ok.pass.cpp | 2 +- .../time.duration.literals/literals1.fail.cpp | 1 - .../tuple.tuple/tuple.assign/convert_copy.pass.cpp | 2 +- .../tuple.tuple/tuple.assign/convert_move.pass.cpp | 2 +- .../test/std/utilities/utility/synopsis.pass.cpp | 1 - libcxx/test/support/nothing_to_do.pass.cpp | 1 - libcxx/test/support/propagate_const_helpers.h | 1 - libcxx/utils/docker/debian9/Dockerfile.base | 1 - .../utils/docker/debian9/Dockerfile.compiler_zoo | 2 - libcxx/utils/docker/scripts/run_buildbot.sh | 1 - libcxx/utils/google-benchmark/.clang-format | 1 - .../google-benchmark/cmake/gnu_posix_regex.cpp | 1 - .../utils/google-benchmark/cmake/posix_regex.cpp | 1 - libcxx/utils/google-benchmark/cmake/std_regex.cpp | 1 - .../utils/google-benchmark/docs/AssemblyTests.md | 1 - .../google-benchmark/test/AssemblyTests.cmake | 1 - libcxx/utils/libcxx/test/googlebenchmark.py | 1 - lld/include/lld/Core/Error.h | 4 +- lld/include/lld/Core/UndefinedAtom.h | 2 +- .../sysroot/root/usr/include/c++/v1/algorithm | 1 + .../Disassembler/llvm/DisassemblerLLVMC.cpp | 6 +- .../Instruction/MIPS/EmulateInstructionMIPS.cpp | 5 +- .../MIPS64/EmulateInstructionMIPS64.cpp | 9 +- .../AppleObjCClassDescriptorV2.cpp | 12 + llvm/docs/CMake.rst | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 7 + llvm/include/llvm/IR/ConstantRange.h | 8 + llvm/include/llvm/Support/TargetRegistry.h | 15 +- llvm/include/llvm/Support/Threading.h | 30 +- llvm/lib/Analysis/LazyValueInfo.cpp | 54 +++- llvm/lib/CodeGen/LLVMTargetMachine.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 65 ++++ llvm/lib/CodeGen/TargetInstrInfo.cpp | 3 - llvm/lib/IR/ConstantRange.cpp | 15 + llvm/lib/MC/MCDisassembler/Disassembler.cpp | 5 +- llvm/lib/Object/ModuleSymbolTable.cpp | 4 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 2 +- llvm/lib/Support/CrashRecoveryContext.cpp | 5 +- llvm/lib/Support/Threading.cpp | 51 ++- llvm/lib/Support/Unix/Threading.inc | 63 ++-- llvm/lib/Support/Unix/Unix.h | 9 + llvm/lib/Support/Windows/Process.inc | 7 - llvm/lib/Support/Windows/Threading.inc | 50 +-- llvm/lib/Support/Windows/WindowsSupport.h | 8 + .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 3 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 4 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h | 2 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 12 - .../Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp | 3 +- .../Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | 3 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp | 2 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h | 2 +- llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 2 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 3 +- .../Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp | 3 +- .../lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h | 3 +- .../Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp | 3 +- .../Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h | 2 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 58 +--- .../lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 18 +- llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h | 3 +- .../Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 5 +- llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 4 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 24 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 4 +- .../Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp | 3 +- .../lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h | 3 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 3 +- llvm/lib/Target/PowerPC/README.txt | 3 + .../RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp | 3 +- llvm/lib/Target/RISCV/RISCV.td | 5 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 11 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 38 +++ llvm/lib/Target/RISCV/RISCVISelLowering.h | 6 + llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 11 + llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 2 + llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 1 + llvm/lib/Target/RISCV/RISCVSubtarget.h | 5 + .../Sparc/MCTargetDesc/SparcMCTargetDesc.cpp | 6 +- .../SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp | 3 +- .../MCTargetDesc/WebAssemblyMCAsmInfo.cpp | 3 +- .../MCTargetDesc/WebAssemblyMCAsmInfo.h | 3 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.cpp | 5 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 + llvm/lib/Target/X86/X86InstrInfo.cpp | 5 + .../XCore/MCTargetDesc/XCoreMCTargetDesc.cpp | 3 +- .../LazyValueAnalysis/lvi-after-jumpthreading.ll | 10 +- llvm/test/Assembler/thinlto-vtable-summary.ll | 2 +- llvm/test/Bitcode/compatibility.ll | 20 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 35 ++- llvm/test/CodeGen/ARM/addsubcarry-promotion.ll | 62 ++-- .../Mips/GlobalISel/instruction-select/mul_vec.mir | 130 ++++++++ .../Mips/GlobalISel/instruction-select/sub_vec.mir | 130 ++++++++ .../CodeGen/Mips/GlobalISel/legalizer/mul_vec.mir | 122 ++++++++ .../Mips/GlobalISel/legalizer/mul_vec_builtin.mir | 129 ++++++++ .../CodeGen/Mips/GlobalISel/legalizer/sub_vec.mir | 122 ++++++++ .../Mips/GlobalISel/legalizer/sub_vec_builtin.mir | 237 ++++++++++++++ .../CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll | 70 +++++ .../Mips/GlobalISel/llvm-ir/mul_vec_builtin.ll | 74 +++++ .../CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll | 70 +++++ .../Mips/GlobalISel/llvm-ir/sub_vec_builtin.ll | 138 +++++++++ .../Mips/GlobalISel/regbankselect/mul_vec.mir | 126 ++++++++ .../Mips/GlobalISel/regbankselect/sub_vec.mir | 126 ++++++++ .../CodeGen/Mips/compactbranches/no-beqzc-bnezc.ll | 4 +- llvm/test/CodeGen/PowerPC/build-vector-tests.ll | 131 +------- llvm/test/CodeGen/PowerPC/sms-simple.ll | 6 +- llvm/test/CodeGen/RISCV/reserved-reg-errors.ll | 36 +++ llvm/test/CodeGen/RISCV/reserved-regs.ll | 130 ++++++++ llvm/test/CodeGen/X86/pr43769.ll | 54 ++++ llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir | 83 +++++ .../MIR}/SystemZ/lit.local.cfg | 0 llvm/test/MC/Mips/expansion-jal-sym-pic.s | 93 ++++++ llvm/test/MC/Mips/macro-dla-pic.s | 213 ++++++++++--- llvm/test/MC/Mips/macro-la-pic.s | 303 ++++++++++++++---- llvm/test/MC/Mips/macro-li.d.s | 26 +- llvm/test/MC/Mips/macro-li.s.s | 12 +- llvm/test/MC/Mips/private-prefix.s | 22 ++ .../Transforms/CorrelatedValuePropagation/icmp.ll | 132 ++++++++ llvm/test/tools/llvm-cxxmap/remap.test | 2 +- .../tools/llvm-profdata/profile-symbol-list.test | 2 +- llvm/test/tools/llvm-profdata/roundtrip.test | 10 +- llvm/test/tools/llvm-profdata/sample-remap.test | 2 +- llvm/tools/dsymutil/DwarfStreamer.cpp | 4 +- llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp | 5 +- llvm/tools/llvm-dwp/llvm-dwp.cpp | 5 +- llvm/tools/llvm-exegesis/lib/Analysis.cpp | 5 +- llvm/tools/llvm-jitlink/llvm-jitlink.cpp | 5 +- .../llvm-mc-assemble-fuzzer.cpp | 6 +- llvm/tools/llvm-mc/Disassembler.cpp | 6 +- llvm/tools/llvm-mc/Disassembler.h | 3 +- llvm/tools/llvm-mc/llvm-mc.cpp | 5 +- llvm/tools/llvm-mca/llvm-mca.cpp | 4 +- llvm/tools/llvm-objdump/MachODump.cpp | 10 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 4 +- llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp | 5 +- llvm/tools/sancov/sancov.cpp | 4 +- llvm/unittests/DebugInfo/DWARF/DwarfGenerator.cpp | 4 +- .../ExecutionEngine/JITLink/JITLinkTestCommon.cpp | 4 +- llvm/unittests/MC/DwarfLineTables.cpp | 4 +- llvm/unittests/MC/MCInstPrinter.cpp | 4 +- llvm/unittests/Support/Threading.cpp | 54 ++++ llvm/utils/TableGen/SequenceToOffsetTable.h | 4 +- .../utils/gn/build/sync_source_lists_from_cmake.py | 24 +- 249 files changed, 4290 insertions(+), 816 deletions(-) create mode 100644 clang/test/CXX/class/class.compare/class.compare.default/p1.cpp create mode 100644 clang/test/CXX/class/class.compare/class.eq/p1.cpp create mode 100644 clang/test/CXX/class/class.compare/class.rel/p1.cpp create mode 100644 clang/test/CodeGenCUDA/device-init-fun.cu create mode 100644 clang/test/Driver/riscv-fixed-x-register.c create mode 100644 clang/test/Frontend/warn-device-init-fun.cu create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/sub_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/mul_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/sub_vec.mir create mode 100644 llvm/test/CodeGen/RISCV/reserved-reg-errors.ll create mode 100644 llvm/test/CodeGen/RISCV/reserved-regs.ll create mode 100644 llvm/test/CodeGen/X86/pr43769.ll create mode 100644 llvm/test/DebugInfo/MIR/SystemZ/call-site-lzer.mir copy llvm/test/{Analysis/CostModel => DebugInfo/MIR}/SystemZ/lit.local.cfg (100%) create mode 100644 llvm/test/MC/Mips/private-prefix.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits October 2019