Tcwg-commits October 2019

tcwg-commits@lists.linaro.org

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13959 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig updated (f24860adca4 -> 54b97aff264)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from f24860adca4 Daily bump. adds 30f04a5d07b Backport ggc_trim Backport from mainline adds f61ed87a9f4 free summary vectors. Backport from mainline 2019-10-24 [...] adds 7b8f309cf42 [arm][PR88167] Fix __builtin_return_address returns invalid [...] adds 13a1c74461e compiler: don't inline integer expressions with named types adds 54b97aff264 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 45 +++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 84 +++++++++++++++++++++++++------- gcc/ggc-none.c | 5 ++ gcc/ggc-page.c | 44 +++++++++++++++-- gcc/ggc.h | 3 ++ gcc/go/gofrontend/expressions.cc | 18 +++++-- gcc/lto/ChangeLog | 6 +++ gcc/lto/lto.c | 2 + gcc/symbol-summary.h | 4 ++ gcc/testsuite/ChangeLog | 9 ++++ gcc/testsuite/gcc.target/arm/pr88167-1.c | 15 ++++++ gcc/testsuite/gcc.target/arm/pr88167-2.c | 18 +++++++ 13 files changed, 229 insertions(+), 26 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr88167-1.c create mode 100644 gcc/testsuite/gcc.target/arm/pr88167-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig updated (2721d2e6 -> 58b657fa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 2721d2e6 0: update: binutils-gcc-linux: all new 58b657fa 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (2721d2e6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 166 +- 02-prepare_abe/console.log | 224 +- 03-build_abe-binutils/console.log | 10485 +++++++------- 04-build_abe-stage1/console.log | 14001 +++++++++---------- 05-build_linux/console.log | 856 +- 06-boot_linux/console.log | 6 +- 08-update_baseline/console.log | 25 + console.log | 26250 ++++++++++++++++++------------------ jenkins/manifest.sh | 10 +- 9 files changed, 26028 insertions(+), 25995 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig updated (efb9cdcd -> 27d5cb9c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards efb9cdcd 0: update: llvm-linux: boot new 27d5cb9c 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (efb9cdcd) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-build_llvm/console.log | 11984 +++++++++++++++++------------------ 03-build_linux/console.log | 714 ++- 04-boot_linux/console.log | 4 +- 05-check_regression/console.log | 8 +- 06-update_baseline/console.log | 25 + console.log | 12919 +++++++++++++++++++------------------- jenkins/manifest.sh | 6 +- 8 files changed, 12945 insertions(+), 12899 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig updated (0f7a344f -> ce08fca5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 0f7a344f 0: update: llvm-linux: boot new ce08fca5 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0f7a344f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 162 +- 02-build_llvm/console.log | 11962 +++++++++++++++++----------------- 03-build_linux/console.log | 806 ++- 04-boot_linux/console.log | 476 +- console.log | 13406 +++++++++++++++++++-------------------- jenkins/manifest.sh | 6 +- 6 files changed, 13407 insertions(+), 13411 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig updated (f24860adca4 -> 54b97aff264)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig in repository toolchain/ci/gcc. from f24860adca4 Daily bump. adds 30f04a5d07b Backport ggc_trim Backport from mainline adds f61ed87a9f4 free summary vectors. Backport from mainline 2019-10-24 [...] adds 7b8f309cf42 [arm][PR88167] Fix __builtin_return_address returns invalid [...] adds 13a1c74461e compiler: don't inline integer expressions with named types adds 54b97aff264 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 45 +++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 84 +++++++++++++++++++++++++------- gcc/ggc-none.c | 5 ++ gcc/ggc-page.c | 44 +++++++++++++++-- gcc/ggc.h | 3 ++ gcc/go/gofrontend/expressions.cc | 18 +++++-- gcc/lto/ChangeLog | 6 +++ gcc/lto/lto.c | 2 + gcc/symbol-summary.h | 4 ++ gcc/testsuite/ChangeLog | 9 ++++ gcc/testsuite/gcc.target/arm/pr88167-1.c | 15 ++++++ gcc/testsuite/gcc.target/arm/pr88167-2.c | 18 +++++++ 13 files changed, 229 insertions(+), 26 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr88167-1.c create mode 100644 gcc/testsuite/gcc.target/arm/pr88167-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig updated (c5502032 -> d3a05970)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards c5502032 0: update: binutils-gcc-linux: boot new d3a05970 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c5502032) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 80 +- 02-prepare_abe/console.log | 356 +- 03-build_abe-binutils/console.log | 11174 +++++++-------- 04-build_abe-stage1/console.log | 13959 ++++++++++--------- 05-build_linux/console.log | 818 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 14 +- console.log | 26409 ++++++++++++++++++------------------ jenkins/manifest.sh | 10 +- 9 files changed, 26411 insertions(+), 26417 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_ubsan updated (144b0807fcc -> 71046993786)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_ubsan in repository toolchain/ci/gcc. from 144b0807fcc [C++ PATCH] 'std' identifier not needed adds 701057fbee0 2019-10-24 Richard Biener <rguenther(a)suse.de> adds 2d7348a33c9 Fix another UBSAN in Fortran coarray. adds cd77033a01c S/390: Use UNSPEC_GET_TP for thread pointer loads adds 4a7df0f3b23 Define std::uniform_random_bit_generator concept for C++20 adds 54e2e2bb856 PR libstdc++/88338 Implement P0898R3, C++20 concepts library adds e1c584607b5 2019-10-24 Richard Biener <rguenther(a)suse.de> adds 245bc45271a 2019-10-24 Richard Biener <rguenther(a)suse.de> adds 34c79a052e1 2019-10-24 Richard Biener <rguenther(a)suse.de> adds daf5608fb9f 2019-10-24 Richard Biener <rguenther(a)suse.de> adds 47e4f7397a4 MSP430: Tweaks to generation of 430X instructions adds daf0305adc4 MSP430: Remove unused msp430_hard_regno_nregs_*_padding functions adds d2c976d5790 * ipa-reference.c (ipa_reference_optimization_summary_d): [...] adds 3ad8baf1748 Simplify common case of use_future_t that uses std::allocator adds cddd8a3c8f2 2019-10-24 Richard Biener <rguenther(a)suse.de> adds 525ead362b2 Finish moving constraint and logic functionality of out pt. [...] adds 715c8a41e08 Make gt_pch_nx unreachable in symbol-summary classes. adds 72da463e4d4 ipa-sra-19.c: Avoid unprototyped function adds 97a0265f0f3 Revert ABI changes to std::allocator in C++20 adds 61c7f424d83 [dump] small source cleanup adds 1ab81e0da4a [C++ PATCH] Template parm index fix adds 005098dc3e6 Add missing space to diagnostic in reshape_init_r. adds df2f0d60e6b rs6000: Implement [u]avg<mode>3_ceil adds 096bdef978d * cgraphunit.c (symbol_table::process_new_functions): Call [...] adds 34f0543c9af * symbols-summary.h (fast_function_summary<T *, V>::releas [...] adds 073e8b082fb * config/arc/arc.c (hwloop_optimize): Add missing space in [...] adds 922773eec46 * gimplify.h (omp_construct_selector_matches): Declare. * [...] adds dca43c5d630 Daily bump. adds 30672f1c868 2019-09-09 Edward Smith-Rowland <3dw4rd(a)verizon.net> adds d5c02925a4c * doc/xml/gnu/gpl-3.0.xml: Switch www.gnu.org to https. adds f9b66efbaf9 * doc/xml/manual/policy_data_structures_biblio.xml: Switch [...] adds f172333b7d7 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8fda7730d16 Fix reductions for fully-masked loops adds 37438a1a429 Fix typo in dump_tree_statistics. adds 8f01336ddfc Update SVE tests for recent XPASSes adds 09a61eea0b9 Fix failure in gcc.target/sve/reduc_strict_3.c adds b52c5823a5c 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8c202b0db0a 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 29df010379b Guard use of concepts with feature test macro adds 1e9fd29a425 * gcc.target/powerpc/pr70100.c: Add -mvsx. [...] adds 96d1e6235a5 [Fortran] OpenACC – permit common blocks in some clauses adds e1ad18eeeed PR target/85969 * config/avr/gen-avr-mmcu-specs.c (str_pr [...] adds 3c585034cfd Fix compilation with Clang adds 4badc652b89 Use implicitly-defined copy operations for test iterators adds 991edac437a PR c++/91581 - ICE in exception-specification of defaulted ctor. adds 71046993786 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 225 ++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 7 + gcc/c-family/c-attribs.c | 6 + gcc/c-family/c-common.h | 1 - gcc/c-family/c-omp.c | 188 ------------- gcc/c/ChangeLog | 9 + gcc/c/c-decl.c | 8 +- gcc/c/c-parser.c | 2 +- gcc/cgraphunit.c | 5 +- gcc/config/arc/arc.c | 6 +- gcc/config/avr/gen-avr-mmcu-specs.c | 8 - gcc/config/msp430/constraints.md | 1 + gcc/config/msp430/msp430.c | 25 +- gcc/config/msp430/msp430.md | 12 +- gcc/config/rs6000/altivec.md | 4 +- gcc/config/rs6000/rs6000-builtin.def | 12 +- gcc/config/rx/rx.c | 2 +- gcc/config/s390/s390.c | 5 +- gcc/config/s390/s390.md | 38 ++- gcc/cp/ChangeLog | 48 ++++ gcc/cp/call.c | 2 +- gcc/cp/config-lang.in | 2 +- gcc/cp/constraint.cc | 128 +++++++++ gcc/cp/cp-tree.h | 11 +- gcc/cp/decl.c | 5 +- gcc/cp/decl2.c | 8 +- gcc/cp/logic.cc | 83 +++++- gcc/cp/pt.c | 192 ++----------- gcc/dumpfile.c | 10 +- gcc/fortran/ChangeLog | 17 ++ gcc/fortran/array.c | 3 + gcc/fortran/openmp.c | 41 +-- gcc/fortran/resolve.c | 3 + gcc/genemit.c | 2 +- gcc/gimplify.c | 153 ++++++++++- gcc/gimplify.h | 2 + gcc/ipa-cp.c | 11 +- gcc/ipa-fnsummary.c | 151 ++++++----- gcc/ipa-fnsummary.h | 63 ++++- gcc/ipa-icf.c | 4 +- gcc/ipa-inline-analysis.c | 9 +- gcc/ipa-inline-transform.c | 8 +- gcc/ipa-inline.c | 55 ++-- gcc/ipa-prop.h | 2 +- gcc/ipa-reference.c | 189 +++++++------ gcc/ipa-reference.h | 4 +- gcc/ipa-sra.c | 8 +- gcc/lto/ChangeLog | 5 + gcc/lto/lto-partition.c | 6 +- gcc/lto/lto.c | 4 +- gcc/omp-general.c | 298 +++++++++++++++++++++ gcc/omp-general.h | 3 + gcc/plugin.c | 6 +- gcc/symbol-summary.h | 47 ++-- gcc/testsuite/ChangeLog | 116 ++++++++ .../c-c++-common/gomp/declare-variant-8.c | 125 +++++++++ gcc/testsuite/g++.dg/cpp0x/noexcept55.C | 8 + gcc/testsuite/gcc.dg/ipa/ipa-sra-19.c | 3 +- gcc/testsuite/gcc.dg/torture/pr92203.c | 37 +++ gcc/testsuite/gcc.dg/torture/pr92222.c | 17 ++ gcc/testsuite/gcc.dg/vect/pr65947-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-10.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-14.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-2.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-3.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-4.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-5.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-6.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-9.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-2.c | 2 +- gcc/testsuite/gcc.dg/vect/pr92205.c | 13 + gcc/testsuite/gcc.dg/vect/slp-reduc-10a.c | 82 ++++++ gcc/testsuite/gcc.dg/vect/slp-reduc-10b.c | 82 ++++++ gcc/testsuite/gcc.dg/vect/slp-reduc-10c.c | 82 ++++++ gcc/testsuite/gcc.dg/vect/slp-reduc-10d.c | 82 ++++++ gcc/testsuite/gcc.dg/vect/slp-reduc-10e.c | 82 ++++++ gcc/testsuite/gcc.dg/vect/slp-reduc-9.c | 25 ++ gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c | 2 +- .../gcc.dg/vect/vect-reduc-2char-big-array.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-2short.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8b.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2c.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/loop_add_5.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_5.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_8.c | 3 +- .../gcc.target/aarch64/sve/reduc_strict_3.c | 1 + gcc/testsuite/gcc.target/aarch64/sve/slp_13.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve/slp_5.c | 22 +- gcc/testsuite/gcc.target/aarch64/sve/slp_7.c | 20 +- gcc/testsuite/gcc.target/msp430/emulate-slli.c | 6 +- gcc/testsuite/gcc.target/msp430/emulate-srai.c | 6 +- gcc/testsuite/gcc.target/msp430/emulate-srli.c | 1 + gcc/testsuite/gcc.target/powerpc/pr70010.c | 4 +- .../gcc.target/s390/load-thread-pointer-once-2.c | 14 + gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 | 74 +++++ gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 | 53 ++++ gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 | 39 +++ gcc/tree-ssa-alias.c | 16 +- gcc/tree-ssa-loop-ch.c | 2 +- gcc/tree-ssa-sccvn.c | 9 +- gcc/tree-vect-data-refs.c | 2 +- gcc/tree-vect-loop.c | 75 +++--- gcc/tree-vect-patterns.c | 52 ++++ gcc/tree-vect-slp.c | 119 ++++---- gcc/tree-vect-stmts.c | 93 +++++-- gcc/tree.c | 2 +- libgomp/ChangeLog | 7 + .../libgomp.oacc-fortran/common-block-1.f90 | 107 ++++++++ .../libgomp.oacc-fortran/common-block-2.f90 | 152 +++++++++++ .../libgomp.oacc-fortran/common-block-3.f90 | 139 ++++++++++ libstdc++-v3/ChangeLog | 62 +++++ libstdc++-v3/doc/html/manual/status.html | 4 +- libstdc++-v3/doc/xml/gnu/gpl-3.0.xml | 2 +- .../xml/manual/policy_data_structures_biblio.xml | 2 +- libstdc++-v3/doc/xml/manual/status_cxx2020.xml | 159 ++++++++++- libstdc++-v3/include/bits/allocator.h | 21 +- libstdc++-v3/include/bits/random.h | 15 ++ libstdc++-v3/include/bits/range_cmp.h | 4 +- libstdc++-v3/include/experimental/executor | 45 +++- .../testsuite/20_util/allocator/rebind_c++20.cc | 5 +- .../{rebind_c++20.cc => requirements/constexpr.cc} | 12 +- .../allocator/requirements/typedefs_c++20.cc | 11 + libstdc++-v3/testsuite/20_util/allocator/void.cc | 22 ++ .../testsuite/26_numerics/random/concept.cc | 221 +++++++++++++++ .../testsuite/26_numerics/random/pr60037-neg.cc | 2 +- .../ext/malloc_allocator/variadic_construct.cc | 2 +- .../ext/new_allocator/variadic_construct.cc | 2 +- .../rebind_c++20.cc => std/concepts/1.cc} | 15 +- .../rebind_c++20.cc => std/concepts/2.cc} | 15 +- libstdc++-v3/testsuite/util/testsuite_iterators.h | 89 +++--- 138 files changed, 3712 insertions(+), 1006 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/declare-variant-8.c create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept55.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92203.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr92222.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr92205.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-reduc-10a.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-reduc-10b.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-reduc-10c.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-reduc-10d.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-reduc-10e.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-reduc-9.c create mode 100644 gcc/testsuite/gcc.target/s390/load-thread-pointer-once-2.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-1.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-2.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-3.f90 copy libstdc++-v3/testsuite/20_util/allocator/{rebind_c++20.cc => requirements/con [...] create mode 100644 libstdc++-v3/testsuite/26_numerics/random/concept.cc copy libstdc++-v3/testsuite/{20_util/allocator/rebind_c++20.cc => std/concepts/1.c [...] copy libstdc++-v3/testsuite/{20_util/allocator/rebind_c++20.cc => std/concepts/2.c [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_ubsan updated (74250815 -> ab340f1a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-arm-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards 74250815 0: update: gcc-144b0807fcce7da37fe80ef257e86ecb800e198f: 1 new ab340f1a 0: update: gcc-710469937868d629a85a99ffed66b86226391de1: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (74250815) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-arm-boots [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 372 +- 03-build_abe-bootstrap_ubsan/console.log | 95049 ++++++++++++++-------------- console.log | 95549 ++++++++++++++--------------- jenkins/manifest.sh | 10 +- 5 files changed, 95535 insertions(+), 95573 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (efcdedd2e72 -> a6a37e820cf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project. from efcdedd2e72 git-llvm: Drop dependency on github module adds 8c99a549dec [LiveDebugValues] Small code clean up; NFC adds a6712889f5f [lldb] [Host/netbsd] Set Arg0 for 'platform process list -v' adds 822059147bf [PowerPC] [Peephole] fold frame offset by using index form [...] adds 24ef631f433 Fix file-ordering nit in D67161. adds 77b3c794e34 [docs] Update Mips feature table in CodeGenerator.rst adds 2a3dc6b74f4 Fix a variable typo in LiveDebugValues [NFC] adds 53c164e2216 [llvm/Object] - Fix the error message reported for a broken [...] adds 9acaf542771 [obj2yaml] - Better dumping for relocations without symbols [...] adds 74d39a42f10 [clangd] DefineInline action availability checks adds dfd6374c784 [clangd] DefineInline action apply logic with fully qualifi [...] adds d581f68519d gn build: Merge 74d39a42f10 adds d62e3ed3f4b [clangd] Implement GetEligiblePoints adds 8aa84ad37db [clangd] Store Index in Tweak::Selection adds de3cef1d5d3 [yaml2obj, obj2yaml] - Add support for SHT_NOTE sections. adds e3105e71f3a [LLD][ELF] - Update test case after yaml2obj change. adds 11ce19d2119 [clang] Switch arm-mve-intrinsics tests to use %clang_cc1. adds ce1e249a688 Fix compilation error in clangd/refactor/tweaks/ExpandAutoType.cpp adds 3d9632a997f [clang-rename] NFC, make getCanonicalSymbolDeclaration robu [...] adds 417dd678250 [MIPS GlobalISel] Select MSA vector generic and builtin fsqrt adds 43e931cb5fc [clangd][NFC] Get rid of raw string literals in macros to m [...] adds 1baa50396d9 [RISCV] Add support for half-precision floats adds be29d928548 OpenMP Tasks dependencies hash re-sizing fixed. adds 11c2a85db88 [NFC] Rename LLVM_NO_DEAD_STRIP adds 6df7ef0d8ba [clang-format] [NFC] update the documentation in Format.h t [...] adds 59a51d84b3a [CodeGen][SelectionDAG] Fix tiny bug in ExpandIntRes_UADDSUBO adds b2c184458e9 [APInt] Add saturating multiply ops adds 1cc8e1e1d7d [APInt] Add saturating left-shift ops adds b82fa80e807 [SLP] adjust code comment; NFC adds 7ad3636c30a [AMDGPU] Remove update_llc_test_checks for a test adds abd89c243a4 build: reindent text (NFC) adds b85b4e5a6f8 Add an instruction marker field to the ExtraInfo in MachineInstrs. adds 8e567b0730f [clangd] Revert define-inline action changes to un-break wi [...] adds b74d7e5cccb [PowerPC] add test for popcnt with any_extend; NFC adds fd667b860e9 [libcxx] [test] Run `chmod +x` on executables when testing via SSH adds a153233caf6 gn build: Merge 8e567b0730f adds de79836312e [FPEnv] Teach the IRBuilder about correct use of the strict [...] adds 5934cd11ea3 [TableGen] Add asserts to make sure default values match pr [...] adds 7a2b704bf0c [Sema][Typo Correction] Fix another infinite loop on ambiguity adds 4d18b4a7c4f [SCEV] Add a clarifying comment around ExitLimit construction adds 96601ec28b7 ValueObject: Fix a crash related to children address type c [...] adds 197b7b24c33 [NFC][libomptarget] move remaining device specific code out [...] adds 118ceea5c36 Crt files are special cased by name when dealing with ctor [...] adds c35b358b741 AMDGPU/GlobalISel: Legalize FDIV16 adds e6c145e0548 [DAGCombiner] widen zext of popcount based on target support adds 3dd0a896b64 [X86] Add a check for SSE2 to the top of combineReductionTo [...] adds 72105b9dcd6 Fix compilation error in ObjectFileMachO::ParseSymtab adds 0877dd14e4e [Driver] Force llvm to install its handlers before lldb's adds c9c18e5a319 [AMDGPU] Disallow dpp combining for dpp instructions withou [...] adds d4303b38616 [AMDGPU] Fold AGPR reg_sequence initializers adds 074af2daf5f [llvm-objcopy][MachO] Add support for min os version load commands adds 2724d9e1296 build: remove `LLVM_CXX_STD` extension point adds 3c7c3717932 [CVP] add test for poison propagation bug (PR43802); NFC adds a4783ef58d3 [Alignment][NFC] getMemoryOpCost uses MaybeAlign adds cc0b9647b76 [LLD][ThinLTO] Handle GUID collision in import global processing adds 64c1f6602a0 Revert "Add an instruction marker field to the ExtraInfo in [...] adds a6e1de4afc5 [gicombiner] Add parse failure tests for defs/match adds 1ce552f3ef8 AMDGPU: Fix the broken dominator tree when creating waterfa [...] adds 171cf5302f4 AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG adds 03de2f84fc4 [ARM] Uses "Sun Style" syntax for section switching adds e8a0a0904b2 [Alignment][NFC] Convert AllocaInst to MaybeAlign adds 1a276d1e8c5 GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT adds c7dcacf16a6 [AMDGPU] Fixed asan failure in SIFoldOperands adds a6b0219fc4a Revert "[ARM] Uses "Sun Style" syntax for section switching" adds 738af7a6241 Add the ability to pass extra args to a Python breakpoi [...] adds 0e4d4153115 Update version number in llvm python bindings adds e070cf81196 [x86] add tests for extractelement with undef index (PR42689); NFC adds a27c998c006 [BPF] fix a CO-RE issue with -mattr=+alu32 adds 7913126a08e [globalisel] Add LLVMDev 2019 talks and links for the 2017 talks adds 27887bc1e7a [globalisel] Fix typo in 'Add LLVMDev 2019 talks and links [...] adds 4c0251da149 [AMDGPU] Enable SGPR copy folding adds 73a7a55c0ec lldb/COFF: Create a separate "section" for the file header adds 27fdf8a29d1 [lit] Don't fail when printing test output with special chars adds 7c603a41e20 lldb/minidump: Refactor memory region computation code adds 8da20560ab0 [clang][DependencyScanning] 80-col. adds 10b5cd8ed52 [LLDB] Fix inline variable only used in assertion. (NFC) adds feab0334f57 [globalisel] Restructure the GlobalISel documentation adds 6c89392592c Use __builtin_strlen in constexpr StringRef ctor with MSVC adds 5a3c657f3e8 Fix after 738af7a6241c98164625b9cd1ba9f8af4e36f197 adds a88591cff46 [libFuzzer] Enable extra counters for Fuchsia. adds f3ad8ae7b73 [lit] Move sharding logic into separate function adds 4c47617627f [SDAG] fold extract_vector_elt with undef index adds dd501045cde [Clang][Bundler] Error reporting improvements adds 27e2c8faec6 Add Record::getValueAsOptionalDef(). adds baf91d02da6 [NFC] Add a tablegen node for the root of the AST node hier [...] adds 93b29d3882b Revert "[Clang][Bundler] Error reporting improvements" adds 4141bb50a87 [ORC] Avoid SymbolStringPtr copies in DynamicLibrarySearchG [...] adds edb1a1de1b7 Reland "[Clang][Bundler] Error reporting improvements" new a6a37e820cf [X86][GISel] Fix typo in comment. NFC The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/SourceCode.cpp | 156 +++- clang-tools-extra/clangd/SourceCode.h | 21 + .../clangd/refactor/tweaks/ExpandAutoType.cpp | 2 +- .../clangd/unittests/SourceCodeTests.cpp | 62 ++ clang/include/clang/Basic/CommentNodes.td | 38 +- clang/include/clang/Basic/DeclNodes.td | 184 ++-- clang/include/clang/Basic/StmtNodes.td | 440 +++++----- clang/include/clang/Basic/TypeNodes.td | 114 ++- clang/include/clang/Format/Format.h | 32 +- .../DependencyScanning/DependencyScanningTool.h | 9 +- .../clang/Tooling/Inclusions/IncludeStyle.h | 9 + clang/lib/Sema/SemaExprCXX.cpp | 5 +- .../DependencyScanning/DependencyScanningTool.cpp | 8 +- .../Refactoring/Rename/USRFindingAction.cpp | 2 + .../CodeGen/arm-mve-intrinsics/scalar-shifts.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vadc.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vaddq.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vcvt.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vld24.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vldr.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vminvq.c | 4 +- clang/test/Driver/clang-offload-bundler.c | 32 +- clang/test/Sema/typo-correction-ambiguity.c | 14 + .../clang-offload-bundler/ClangOffloadBundler.cpp | 409 ++++----- clang/tools/driver/CMakeLists.txt | 4 +- clang/utils/TableGen/CMakeLists.txt | 2 +- clang/utils/TableGen/ClangASTEmitters.h | 39 + clang/utils/TableGen/ClangASTNodesEmitter.cpp | 119 +-- clang/utils/TableGen/ClangAttrEmitter.cpp | 14 +- clang/utils/TableGen/ClangTypeNodesEmitter.cpp | 24 +- clang/utils/TableGen/TableGen.cpp | 7 +- compiler-rt/lib/fuzzer/FuzzerExtraCounters.cpp | 2 +- libcxx/utils/libcxx/test/executor.py | 20 +- lld/ELF/OutputSections.cpp | 26 +- lld/test/ELF/ctors_dtors_priority.s | 18 +- lld/test/ELF/sht-group-empty.test | 1 + lldb/include/lldb/API/SBBreakpoint.h | 3 + lldb/include/lldb/API/SBBreakpointLocation.h | 7 +- lldb/include/lldb/API/SBBreakpointName.h | 7 +- lldb/include/lldb/API/SBStructuredData.h | 3 + lldb/include/lldb/Core/PropertiesBase.td | 2 + lldb/include/lldb/Core/ValueObject.h | 1 + .../Interpreter/OptionGroupPythonClassWithDict.h | 20 +- lldb/include/lldb/Interpreter/ScriptInterpreter.h | 31 +- lldb/include/lldb/Target/MemoryRegionInfo.h | 30 +- .../breakpoint_command/TestBreakpointCommand.py | 8 +- .../TestBreakpointCommandsFromPython.py | 83 +- .../breakpoint/breakpoint_command/bktptcmd.py | 18 + lldb/scripts/Python/python-wrapper.swig | 17 +- lldb/scripts/interface/SBBreakpoint.i | 8 + lldb/scripts/interface/SBBreakpointLocation.i | 11 +- lldb/scripts/interface/SBBreakpointName.i | 4 + lldb/source/API/SBBreakpoint.cpp | 34 +- lldb/source/API/SBBreakpointLocation.cpp | 31 +- lldb/source/API/SBBreakpointName.cpp | 37 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 8 +- .../Commands/CommandObjectBreakpointCommand.cpp | 48 +- lldb/source/Commands/CommandObjectThread.cpp | 12 +- lldb/source/Commands/Options.td | 7 - lldb/source/Core/ValueObject.cpp | 53 ++ lldb/source/Core/ValueObjectVariable.cpp | 45 - lldb/source/Host/netbsd/Host.cpp | 1 + .../Interpreter/OptionGroupPythonClassWithDict.cpp | 61 +- lldb/source/Interpreter/ScriptInterpreter.cpp | 12 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 7 +- .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 25 +- .../Plugins/Process/minidump/MinidumpParser.cpp | 72 +- .../Plugins/Process/minidump/MinidumpParser.h | 10 +- .../Plugins/Process/minidump/ProcessMinidump.cpp | 41 +- .../Plugins/Process/minidump/ProcessMinidump.h | 3 + .../Python/ScriptInterpreterPython.cpp | 105 ++- .../Python/ScriptInterpreterPython.h | 8 + .../Python/ScriptInterpreterPythonImpl.h | 22 +- lldb/source/Target/CMakeLists.txt | 1 + lldb/source/Target/MemoryRegionInfo.cpp | 20 + lldb/test/Shell/Minidump/memory-region.yaml | 49 ++ .../Shell/ObjectFile/PECOFF/export-dllfunc.yaml | 10 +- .../PECOFF/{subsections.yaml => sections.yaml} | 48 +- .../Shell/SymbolFile/DWARF/DW_OP_piece-struct.s | 113 +++ lldb/tools/driver/Driver.cpp | 19 + .../Process/minidump/MinidumpParserTest.cpp | 163 ++-- .../ScriptInterpreter/Python/PythonTestSuite.cpp | 3 +- lldb/utils/TableGen/LLDBPropertyDefEmitter.cpp | 15 + llvm/CMakeLists.txt | 6 +- llvm/bindings/python/llvm/common.py | 4 +- llvm/cmake/modules/AddLLVM.cmake | 4 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 30 +- llvm/docs/CMake.rst | 14 +- llvm/docs/CodeGenerator.rst | 10 +- llvm/docs/FuzzingLLVM.rst | 2 +- llvm/docs/GlobalISel.rst | 940 --------------------- llvm/docs/GlobalISel/GMIR.rst | 158 ++++ llvm/docs/GlobalISel/IRTranslator.rst | 57 ++ llvm/docs/GlobalISel/InstructionSelect.rst | 98 +++ llvm/docs/GlobalISel/Legalizer.rst | 351 ++++++++ llvm/docs/GlobalISel/Pipeline.rst | 82 ++ llvm/docs/GlobalISel/Porting.rst | 21 + llvm/docs/GlobalISel/RegBankSelect.rst | 73 ++ llvm/docs/GlobalISel/Resources.rst | 11 + llvm/docs/GlobalISel/index.rst | 94 +++ llvm/docs/Reference.rst | 6 +- llvm/include/llvm/ADT/APInt.h | 4 + llvm/include/llvm/ADT/StringRef.h | 8 +- llvm/include/llvm/Analysis/ScalarEvolution.h | 3 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 9 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 9 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 10 +- .../llvm/ExecutionEngine/Orc/ExecutionUtils.h | 2 +- llvm/include/llvm/IR/IRBuilder.h | 22 + llvm/include/llvm/IR/Instructions.h | 4 +- llvm/include/llvm/Object/ELF.h | 11 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 21 + llvm/include/llvm/Support/YAMLTraits.h | 3 +- llvm/include/llvm/TableGen/Record.h | 6 + llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/AsmParser/LLParser.cpp | 3 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 25 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 5 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 31 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 6 +- llvm/lib/IR/Instructions.cpp | 27 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 72 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 38 + llvm/lib/Support/APInt.cpp | 40 + llvm/lib/TableGen/Record.cpp | 15 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 15 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 78 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 5 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/FLATInstructions.td | 85 +- llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 3 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 161 +++- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 - llvm/lib/Target/AMDGPU/SIISelLowering.h | 8 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 11 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 8 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 2 +- llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp | 15 +- .../Target/Hexagon/HexagonTargetTransformInfo.cpp | 31 +- .../Target/Hexagon/HexagonTargetTransformInfo.h | 5 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 20 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 219 +++++ llvm/lib/Target/PowerPC/PPCInstrInfo.h | 10 + llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 8 + llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 9 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 11 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 7 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 4 +- .../Target/SystemZ/SystemZTargetTransformInfo.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 + llvm/lib/Target/X86/X86InstructionSelector.cpp | 2 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 21 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 5 +- llvm/lib/Transforms/Scalar/SROA.cpp | 21 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 16 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 14 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../inst-select-amdgpu-atomic-cmpxchg-flat.mir | 374 ++++++++ .../legalize-atomic-cmpxchg-with-success.mir | 21 +- .../AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir | 96 ++- ...lize-fast-unsafe-fdiv.mir => legalize-fdiv.mir} | 468 +++++++--- .../GlobalISel/legalize-insert-vector-elt.mir | 48 ++ llvm/test/CodeGen/AMDGPU/dpp_combine.mir | 16 + llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir | 48 ++ .../CodeGen/AMDGPU/indirect-addressing-si-noopt.ll | 4 - llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 368 +++++++- llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll | 3 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 48 ++ llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll | 73 ++ llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll | 1 + .../BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll | 12 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-existence-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-existence-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-existence-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-lshift-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-lshift-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-2.ll | 12 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-3.ll | 9 +- llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll | 1 + llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll | 1 + .../CodeGen/BPF/CORE/offset-reloc-access-str.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-end-load.ll | 6 +- llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll | 3 +- .../CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll | 1 + .../CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-1.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-3.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-middle-chain.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multilevel.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-pointer-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-pointer-2.ll | 2 + .../BPF/CORE/offset-reloc-struct-anonymous.ll | 8 +- .../CodeGen/BPF/CORE/offset-reloc-struct-array.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-typedef-array.ll | 2 + .../BPF/CORE/offset-reloc-typedef-struct.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-typedef-union.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll | 6 +- .../GlobalISel/instruction-select/fsqrt_vec.mir | 60 ++ .../Mips/GlobalISel/legalizer/fsqrt_vec.mir | 56 ++ .../GlobalISel/legalizer/fsqrt_vec_builtin.mir | 60 ++ .../CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec.ll | 34 + .../Mips/GlobalISel/llvm-ir/fsqrt_vec_builtin.ll | 35 + .../Mips/GlobalISel/regbankselect/fsqrt_vec.mir | 58 ++ .../CodeGen/PowerPC/fold-frame-offset-using-rr.mir | 52 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 55 +- llvm/test/CodeGen/RISCV/fp16-promote.ll | 142 ++++ llvm/test/CodeGen/WebAssembly/simd.ll | 32 +- llvm/test/CodeGen/X86/extractelement-index.ll | 24 + llvm/test/Object/invalid.test | 2 +- .../TableGen/GICombinerEmitter/defs-invalid.td | 42 + .../TableGen/GICombinerEmitter/match-invalid.td | 71 ++ llvm/test/ThinLTO/X86/Inputs/guid_collision.ll | 12 + llvm/test/ThinLTO/X86/guid_collision.ll | 17 + .../CorrelatedValuePropagation/phi-common-val.ll | 27 + .../llvm-objcopy/ELF/set-section-alignment.test | 1 + .../MachO/Inputs/min_iphoneos_version_lc.yaml | 15 + .../MachO/Inputs/min_macos_version_lc.yaml | 15 + .../MachO/Inputs/min_tvos_version_lc.yaml | 15 + .../MachO/Inputs/min_watchos_version_lc.yaml | 15 + .../MachO/min-version-load-commands.test | 20 + .../test/tools/llvm-readobj/elf-section-types.test | 1 + llvm/test/tools/llvm-readobj/gnu-notes.test | 12 +- llvm/test/tools/llvm-size/elf-sysv.test | 1 + .../test/tools/obj2yaml/elf-ppc64-relocations.yaml | 92 -- llvm/test/tools/obj2yaml/elf-sht-symtab-shndx.yaml | 3 +- llvm/test/tools/obj2yaml/no-symbol-reloc.test | 2 - .../obj2yaml/relocation-unsupported-machine.yaml | 2 - .../tools/yaml2obj/implicit-sections-types.test | 1 + llvm/tools/bugpoint/CMakeLists.txt | 2 +- llvm/tools/llc/CMakeLists.txt | 2 +- .../llvm-objcopy/MachO/MachOLayoutBuilder.cpp | 3 + llvm/tools/obj2yaml/elf2yaml.cpp | 70 +- llvm/tools/opt/CMakeLists.txt | 2 +- llvm/unittests/ADT/APIntTest.cpp | 35 + llvm/unittests/IR/IRBuilderTest.cpp | 9 + llvm/utils/TableGen/GICombinerEmitter.cpp | 3 + llvm/utils/lit/lit/cl_arguments.py | 3 + llvm/utils/lit/lit/display.py | 15 +- llvm/utils/lit/lit/main.py | 51 +- llvm/utils/lit/lit/run.py | 3 + llvm/utils/lit/lit/util.py | 2 + .../tests/Inputs/shtest-shell/stdout-encoding.txt | 7 + llvm/utils/lit/tests/max-failures.py | 2 +- llvm/utils/lit/tests/shtest-shell.py | 14 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 22 +- .../deviceRTLs/nvptx/src/target_impl.h | 15 + openmp/runtime/src/kmp_taskdeps.cpp | 8 +- 279 files changed, 6551 insertions(+), 2948 deletions(-) create mode 100644 clang/test/Sema/typo-correction-ambiguity.c create mode 100644 clang/utils/TableGen/ClangASTEmitters.h create mode 100644 lldb/source/Target/MemoryRegionInfo.cpp create mode 100644 lldb/test/Shell/Minidump/memory-region.yaml rename lldb/test/Shell/ObjectFile/PECOFF/{subsections.yaml => sections.yaml} (65%) create mode 100644 lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-struct.s delete mode 100644 llvm/docs/GlobalISel.rst create mode 100644 llvm/docs/GlobalISel/GMIR.rst create mode 100644 llvm/docs/GlobalISel/IRTranslator.rst create mode 100644 llvm/docs/GlobalISel/InstructionSelect.rst create mode 100644 llvm/docs/GlobalISel/Legalizer.rst create mode 100644 llvm/docs/GlobalISel/Pipeline.rst create mode 100644 llvm/docs/GlobalISel/Porting.rst create mode 100644 llvm/docs/GlobalISel/RegBankSelect.rst create mode 100644 llvm/docs/GlobalISel/Resources.rst create mode 100644 llvm/docs/GlobalISel/index.rst create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-c [...] rename llvm/test/CodeGen/AMDGPU/GlobalISel/{legalize-fast-unsafe-fdiv.mir => legal [...] create mode 100644 llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/RISCV/fp16-promote.ll create mode 100644 llvm/test/TableGen/GICombinerEmitter/defs-invalid.td create mode 100644 llvm/test/TableGen/GICombinerEmitter/match-invalid.td create mode 100644 llvm/test/ThinLTO/X86/Inputs/guid_collision.ll create mode 100644 llvm/test/ThinLTO/X86/guid_collision.ll create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_iphoneos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_macos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_tvos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_watchos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/min-version-load-commands.test create mode 100644 llvm/utils/lit/tests/Inputs/shtest-shell/stdout-encoding.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (77a27adb -> fba749bd)

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