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unknown user pushed a change to branch master
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from d61a5cefe6 PR38870: Add warning for zero-width unicode characters appea [...]
new 52bc9ec102 Make -Watomic-alignment say whether the atomic operation was [...]
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include/clang/Basic/DiagnosticSemaKinds.td | 4 ++--
lib/CodeGen/CGAtomic.cpp | 12 ++++++++----
test/CodeGen/atomics-sema-alignment.c | 8 ++++----
3 files changed, 14 insertions(+), 10 deletions(-)
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from 7235dd9f90 Automatic date update in version.in
new 96b6697fd8 gdb/testsuite: Make test names unique in gdb.base/watchpoint.exp
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gdb/testsuite/ChangeLog | 5 ++++
gdb/testsuite/gdb.base/watchpoint.exp | 52 +++++++++++++++++++----------------
2 files changed, 33 insertions(+), 24 deletions(-)
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unknown user pushed a change to branch master
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from a5f1bd02178 [InstCombine] narrow vector select with padded condition an [...]
new 566693531ef [MemorySSA] Update MemoryPhi wiring for block splitting to [...]
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include/llvm/Analysis/MemorySSAUpdater.h | 7 +++----
lib/Analysis/MemorySSAUpdater.cpp | 11 ++++++++++-
lib/Transforms/Utils/BreakCriticalEdges.cpp | 3 ++-
3 files changed, 15 insertions(+), 6 deletions(-)
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from 906fd9ab476 [AArch64] Support reserving x1-7 registers.
new 4e9fc1ef01f [WebAssembly] Change SIMD lane indices to vec_i8imm_op
new a5f1bd02178 [InstCombine] narrow vector select with padded condition an [...]
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lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 8 ++--
.../InstCombine/InstCombineVectorOps.cpp | 38 ++++++++++++++++++
.../InstCombine/shuffle-select-narrow.ll | 46 +++++++++++-----------
3 files changed, 66 insertions(+), 26 deletions(-)
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from 33d40b31957 [PGO] Fix some style issue of ControlHeightReduction
new 7df3d728242 [X86] Don't create X86ISD::AVG nodes from v1iX vectors.
new 183b21b1f20 [X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for [...]
new 906fd9ab476 [AArch64] Support reserving x1-7 registers.
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lib/Target/AArch64/AArch64.td | 11 ++---
lib/Target/AArch64/AArch64CallLowering.cpp | 5 +-
lib/Target/AArch64/AArch64FastISel.cpp | 4 ++
lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +-
lib/Target/AArch64/AArch64ISelLowering.cpp | 37 ++++++++++++--
lib/Target/AArch64/AArch64RegisterInfo.cpp | 53 ++++++++------------
lib/Target/AArch64/AArch64RegisterInfo.h | 2 +
lib/Target/AArch64/AArch64Subtarget.cpp | 6 ++-
lib/Target/AArch64/AArch64Subtarget.h | 11 ++---
lib/Target/X86/X86ISelLowering.cpp | 4 +-
test/CodeGen/AArch64/arm64-platform-reg.ll | 57 ++++++++++++++++++++++
.../AArch64/arm64-reserved-arg-reg-call-error.ll | 19 ++++++++
test/CodeGen/X86/avg.ll | 29 +++++++++++
test/CodeGen/X86/vec_cast.ll | 22 ++-------
14 files changed, 190 insertions(+), 72 deletions(-)
create mode 100644 test/CodeGen/AArch64/arm64-reserved-arg-reg-call-error.ll
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from afaf9ba [OpenMP] Change hint parameter type for critical to uint32_t
new aebd27b [OpenMP] Update copyright to 2018
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LICENSE.txt | 4 ++--
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from a2fde749914 [CMake] Fix LLVM_ENABLE_LTO option on Windows
new 33d40b31957 [PGO] Fix some style issue of ControlHeightReduction
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.../Instrumentation/ControlHeightReduction.cpp | 63 +++++++++++-----------
1 file changed, 30 insertions(+), 33 deletions(-)
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from 84c1ade2361 [X86] Modify the the rdtscp intrinsic to return values inst [...]
new a2fde749914 [CMake] Fix LLVM_ENABLE_LTO option on Windows
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cmake/modules/HandleLLVMOptions.cmake | 2 +-
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