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from 945a3e0770c [LoopInterchange] Turn into a loop pass.
new deede4f5ad6 Revert r343308: [LoopInterchange] Turn into a loop pass.
new ab5d6ab2dea [X86][Btver2] Fix BSF/BSR schedule
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lib/Target/X86/X86ScheduleBtVer2.td | 4 +-
lib/Transforms/IPO/PassManagerBuilder.cpp | 6 ++-
lib/Transforms/Scalar/LoopInterchange.cpp | 57 ++++++++++++++++------
test/CodeGen/X86/schedule-x86_64.ll | 24 ++++-----
.../llvm-mca/X86/BtVer2/clear-super-register-1.s | 36 +++++++-------
test/tools/llvm-mca/X86/BtVer2/resources-x86_64.s | 50 +++++++++----------
6 files changed, 104 insertions(+), 73 deletions(-)
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from 784cbe17ca [ClangFormat] 'try' of function-try-block doesn't obey Brace [...]
new 7d533b5c8b [ARM] Prevent DSP and SIM32 being set for v6m
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lib/Basic/Targets/ARM.cpp | 2 +-
test/Preprocessor/arm-acle-6.4.c | 7 +++++++
2 files changed, 8 insertions(+), 1 deletion(-)
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from 274ec57233a [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k
new 9abf993591b [llvm-mca] Teach how to track zero registers in class Regis [...]
new 945a3e0770c [LoopInterchange] Turn into a loop pass.
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lib/Transforms/IPO/PassManagerBuilder.cpp | 6 +--
lib/Transforms/Scalar/LoopInterchange.cpp | 57 ++++++----------------
.../llvm-mca/include/HardwareUnits/RegisterFile.h | 34 +++++++++----
tools/llvm-mca/include/Instruction.h | 25 +++++++---
tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 45 ++++++++++++-----
5 files changed, 94 insertions(+), 73 deletions(-)
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from 730058dc [clangd] Initial supoprt for cross-namespace global code completion.
new 55db8de1 [docs] Fix links in Clangd documentation
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docs/clangd.rst | 6 +++---
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from d4b76a11e2 [ARM] Alter test to account for change to armv6k default CPU
new 784cbe17ca [ClangFormat] 'try' of function-try-block doesn't obey Brace [...]
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lib/Format/UnwrappedLineParser.cpp | 2 ++
unittests/Format/FormatTest.cpp | 10 ++++++++++
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from c2c10245561 [ARM] Allow execute only code on Cortex-m23
new 274ec57233a [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k
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include/llvm/Support/ARMTargetParser.def | 5 ++---
unittests/Support/TargetParserTest.cpp | 6 ++----
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from a6e89874ca Handle dependent class template names in class template argu [...]
new d4b76a11e2 [ARM] Alter test to account for change to armv6k default CPU
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test/Driver/arm-cortex-cpus.c | 4 ++--
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from b785fa54a16 Remove extra whitespace. NFC. (test commit)
new c2c10245561 [ARM] Allow execute only code on Cortex-m23
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lib/Target/ARM/ARMSubtarget.cpp | 6 ++++--
test/CodeGen/ARM/execute-only-big-stack-frame.ll | 2 ++
test/CodeGen/ARM/execute-only-section.ll | 1 +
test/CodeGen/ARM/execute-only.ll | 1 +
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from f2546843d5c [ARM][v8.5A] Add speculation barriers SSBB and PSSBB
new b785fa54a16 Remove extra whitespace. NFC. (test commit)
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lib/Target/AArch64/SVEInstrFormats.td | 2 +-
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from bd7c735b118 Daily bump.
new b9abfabb761 * config/sparc/sparc-protos.h (sparc_branch_cost): Declare [...]
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gcc/ChangeLog | 30 ++++++
gcc/config/sparc/sparc-protos.h | 1 +
gcc/config/sparc/sparc.c | 155 ++++++++++++++++++++--------
gcc/config/sparc/sparc.h | 39 +------
gcc/testsuite/ChangeLog | 11 ++
gcc/testsuite/gcc.target/sparc/20160229-1.c | 2 +-
gcc/testsuite/gcc.target/sparc/cbcond-2.c | 2 +-
gcc/testsuite/gcc.target/sparc/movcc-1.c | 2 +-
gcc/testsuite/gcc.target/sparc/movcc-2.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-3.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-4.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-5.c | 2 +-
gcc/testsuite/gcc.target/sparc/setcc-4.c | 2 +-
13 files changed, 168 insertions(+), 84 deletions(-)
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