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from dd439d4a14f [libgomp, nvptx] Fall back to cuLinkAddData/cuLinkCreate if [...]
new 4f61feff8ad Prevent internal aligned_alloc clashing with libc version
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libstdc++-v3/ChangeLog | 4 ++++
libstdc++-v3/libsupc++/new_opa.cc | 30 ++++++++++++++++++++----------
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from 8623ce59b5 [analyzer] Fix a typo in `RegionStore.txt`.
new 788e110680 [AST] Check described template at structural equivalence check.
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include/clang/AST/ASTStructuralEquivalence.h | 13 +-
lib/AST/ASTStructuralEquivalence.cpp | 257 ++++++++++++++-------------
unittests/AST/StructuralEquivalenceTest.cpp | 33 +++-
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from 2c34155a200 [RISCV] Add InstAlias definitions for add[w], and, xor, or, [...]
new 8a325745713 [TargetLowering] BuildUDIV - Add support for divide by one [...]
new 5e1abaf015b [RISCV] Add mnemonic alias: move, sbreak and scall.
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lib/CodeGen/SelectionDAG/TargetLowering.cpp | 15 ++--
lib/Target/RISCV/RISCVInstrInfo.td | 8 +++
test/CodeGen/X86/combine-udiv.ll | 104 +++++-----------------------
test/MC/RISCV/rvi-aliases-valid.s | 11 +++
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from d8dd02ff7 lld-link: Take /SUBSYSTEM into account for automatic /ENTRY d [...]
new afe77db96 Add missing REQUIRES x86 to tests.
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test/COFF/guardcf-align.s | 1 +
test/ELF/icf13.s | 1 +
test/ELF/icf15.s | 1 +
test/ELF/icf16.s | 1 +
test/ELF/icf17.s | 1 +
test/ELF/lto/libcall-archive.ll | 1 +
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from c1affcdede1 Add a CommandGuide for llvm-objdump
new 497f7d27c63 [ARM][NFC] Replaced tab-characters in test file vtrn.ll
new 2c34155a200 [RISCV] Add InstAlias definitions for add[w], and, xor, or, [...]
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lib/Target/RISCV/RISCVInstrInfo.td | 31 ++++++
test/CodeGen/ARM/vtrn.ll | 200 +++++++++++++++++-----------------
test/MC/RISCV/rv32i-aliases-invalid.s | 8 ++
test/MC/RISCV/rv32i-invalid.s | 2 +-
test/MC/RISCV/rv64i-aliases-invalid.s | 16 +++
test/MC/RISCV/rv64i-aliases-valid.s | 18 +++
test/MC/RISCV/rvi-aliases-valid.s | 38 +++++++
7 files changed, 212 insertions(+), 101 deletions(-)
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from 752da31e957 [InstCombine] fold fneg into constant operand of fmul/fdiv
new c1affcdede1 Add a CommandGuide for llvm-objdump
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docs/CommandGuide/index.rst | 1 +
docs/CommandGuide/llvm-objdump.rst | 115 +++++++++++++++++++++++++++++++++++++
docs/conf.py | 3 +
3 files changed, 119 insertions(+)
create mode 100644 docs/CommandGuide/llvm-objdump.rst
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from 44efdbe4a [Coverage] Ignore 'unused' functions with non-zero execution counts
new c0d857c24 [libFuzzer] Optimize handle unstable checks by reducing iterations
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lib/fuzzer/FuzzerLoop.cpp | 15 +++++----------
lib/fuzzer/FuzzerTracePC.cpp | 18 ++++++++++++++----
lib/fuzzer/FuzzerTracePC.h | 4 ++--
3 files changed, 21 insertions(+), 16 deletions(-)
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from 7c8903b8f0b Fix Docbook markup for table entry
new 2f11a9ffd06 [AArch64] Add HXT Phecda core support
new cd3d21c58d3 [libgomp, nvptx] Note that cuGetErrorString is in CUDA_VERS [...]
new 143979be19d [libgomp, nvptx] Remove hard-coded const in nvptx_open_device
new 3912f4add59 [libgomp, nvptx] Allow cuGetErrorString to be NULL
new dd439d4a14f [libgomp, nvptx] Fall back to cuLinkAddData/cuLinkCreate if [...]
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gcc/ChangeLog | 6 ++++
gcc/config/aarch64/aarch64-cores.def | 3 ++
gcc/config/aarch64/aarch64-tune.md | 2 +-
gcc/doc/invoke.texi | 2 +-
libgomp/ChangeLog | 27 ++++++++++++++++++
libgomp/plugin/cuda-lib.def | 4 ++-
libgomp/plugin/plugin-nvptx.c | 54 ++++++++++++++++++++++++++----------
7 files changed, 81 insertions(+), 17 deletions(-)
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from cee64098465 [X86][SSE] PR38477 test is more cleanly tested with udiv in [...]
new 752da31e957 [InstCombine] fold fneg into constant operand of fmul/fdiv
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lib/Transforms/InstCombine/InstCombineAddSub.cpp | 17 +++++++++++++--
test/Transforms/InstCombine/fneg.ll | 27 ++++++++----------------
test/Transforms/InstCombine/fsub.ll | 10 ++++-----
3 files changed, 29 insertions(+), 25 deletions(-)
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from 98bb3fb6304 [TargetLowering] Remove APInt divisor argument from BuildEx [...]
new cee64098465 [X86][SSE] PR38477 test is more cleanly tested with udiv in [...]
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test/CodeGen/X86/combine-udiv.ll | 188 ++++++++++++++++-----------------------
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