Tcwg-commits July 2018

tcwg-commits@lists.linaro.org

5 participants
3004 discussions

[llvm] branch master updated (7f233b7000a -> 7e2280c100b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 7f233b7000a [docs] Update GoldPlugin documentation new 9f006d32f1b [llvm-readobj] Generic -string-dump option new 461ab257e2f [ScheduleDAG] Fix unfolding of SUnits to already existent nodes. new 7e2280c100b [DebugInfo] Dwarfv5: Avoid unnecessary base_address specifi [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 28 ++++++--- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 48 ++++++++------ test/CodeGen/X86/pr37916.ll | 44 +++++++++++++ test/DebugInfo/X86/range_reloc.ll | 31 +++++++-- test/DebugInfo/X86/range_reloc_base.ll | 59 +++++++++++++++++ test/DebugInfo/X86/rnglists-nobase.ll | 87 -------------------------- test/tools/llvm-readobj/print-section.test | 8 +++ tools/llvm-readobj/ELFDumper.cpp | 72 --------------------- tools/llvm-readobj/ObjDumper.cpp | 65 +++++++++++++++++++ tools/llvm-readobj/ObjDumper.h | 4 +- tools/llvm-readobj/llvm-readobj.cpp | 4 +- 11 files changed, 255 insertions(+), 195 deletions(-) create mode 100644 test/CodeGen/X86/pr37916.ll create mode 100644 test/DebugInfo/X86/range_reloc_base.ll delete mode 100644 test/DebugInfo/X86/rnglists-nobase.ll create mode 100644 test/tools/llvm-readobj/print-section.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[clang] branch master updated (70cf0f619e -> 43cba1e10e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 70cf0f619e [CodeComplete] Allow getDeclaration on RK_Pattern result. new 43cba1e10e Support implicit _Atomic struct load / store The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Sema/Sema.cpp | 1 + test/CodeGen/atomic-ops.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[lld] branch master updated (870c53029 -> a70d96c0b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 870c53029 Fix `ld.lld --help` message. new a70d96c0b Look for an entry point function if /nodefaultlib is given. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: COFF/Driver.cpp | 17 +++++++++++++++++ .../{entry-inference32.test => entry-inference3.test} | 8 ++++---- 2 files changed, 21 insertions(+), 4 deletions(-) copy test/COFF/{entry-inference32.test => entry-inference3.test} (80%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[gcc] branch aarch64/sve-acle-branch updated (90760b6c94d -> 2cf41714735)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch aarch64/sve-acle-branch in repository gcc. from 90760b6c94d [ARC] Update ARCHS scheduling rules. new aa2cc3da524 [gen/AArch64] Generate helpers for substituting iterator va [...] new 9c5a508b57a [AArch64] Add support for 16-bit FMOV immediates new 2cf41714735 [SVE ACLE] Add initial support for arm_sve.h The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/c/c-decl.c | 10 + gcc/c/c-objc-common.c | 23 +- gcc/c/c-objc-common.h | 2 + gcc/c/c-tree.h | 1 + gcc/config.gcc | 6 +- gcc/config/aarch64/aarch64-builtins.c | 261 ++-- gcc/config/aarch64/aarch64-c.c | 49 + gcc/config/aarch64/aarch64-protos.h | 49 +- gcc/config/aarch64/aarch64-simd.md | 12 +- gcc/config/aarch64/aarch64-sve-builtins.c | 1543 ++++++++++++++++++++ gcc/config/aarch64/aarch64-sve-builtins.def | 70 + gcc/config/aarch64/aarch64-sve.md | 405 ++++- gcc/config/aarch64/aarch64.c | 648 +++----- gcc/config/aarch64/aarch64.md | 14 +- .../{powerpcspe/750cl.h => aarch64/arm_sve.h} | 17 +- gcc/config/aarch64/atomics.md | 24 +- gcc/config/aarch64/iterators.md | 17 +- gcc/config/aarch64/t-aarch64 | 9 + gcc/cp/cp-objcp-common.h | 2 + gcc/cp/cp-tree.h | 1 + gcc/cp/decl.c | 51 +- gcc/cp/error.c | 25 +- gcc/doc/md.texi | 123 +- gcc/doc/sourcebuild.texi | 52 + gcc/gencodes.c | 32 +- gcc/genemit.c | 93 ++ gcc/genflags.c | 35 + gcc/gimplify.c | 7 +- gcc/ira-lives.c | 59 +- gcc/langhooks-def.h | 2 + gcc/langhooks.c | 61 +- gcc/langhooks.h | 11 + gcc/read-md.c | 5 +- gcc/read-md.h | 55 + gcc/read-rtl.c | 211 ++- gcc/simplify-rtx.c | 45 +- .../aarch64/sve-acle/aarch64-sve-acle-asm.exp} | 54 +- .../aarch64/sve-acle/aarch64-sve-acle.exp} | 24 +- .../aarch64/sve-acle/general-c++/add_1.C | 9 + .../aarch64/sve-acle/general-c++/add_2.C | 21 + .../aarch64/sve-acle/general-c++/add_3.C | 20 + .../aarch64/sve-acle/general-c++/conversion_1.C | 20 + .../aarch64/sve-acle/general-c++/func_redef_1.c | 5 + .../aarch64/sve-acle/general-c++/func_redef_2.c | 5 + .../aarch64/sve-acle/general-c++/func_redef_3.c | 7 + .../aarch64/sve-acle/general-c++/func_redef_4.c | 9 + .../aarch64/sve-acle/general-c++/func_redef_5.c | 15 + .../aarch64/sve-acle/general-c++/func_redef_6.c | 5 + .../aarch64/sve-acle/general-c++/func_redef_7.c | 15 + .../aarch64/sve-acle/general-c++/mangle_1.C | 29 + .../aarch64/sve-acle/general-c++/mangle_2.C | 27 + .../aarch64/sve-acle/general-c++/mangle_3.C | 18 + .../aarch64/sve-acle/general-c++/type_redef_1.c | 5 + .../aarch64/sve-acle/general-c++/type_redef_2.c | 5 + .../aarch64/sve-acle/general-c++/type_redef_3.c | 5 + .../aarch64/sve-acle/general-c++/type_redef_4.c | 5 + .../aarch64/sve-acle/general-c++/type_redef_5.c | 5 + .../aarch64/sve-acle/general-c++/type_redef_6.c | 6 + .../gcc.target/aarch64/f16_mov_immediate_1.c | 6 +- .../gcc.target/aarch64/f16_mov_immediate_2.c | 4 +- .../gcc.target/aarch64/f16_mov_immediate_3.c | 2 + .../gcc.target/aarch64/f16_mov_immediate_4.c | 14 + .../aarch64-sve-acle-asm.exp} | 48 +- .../aarch64-sve-acle.exp} | 21 +- .../gcc.target/aarch64/sve-acle/asm/add_f16.c | 672 +++++++++ .../aarch64/sve-acle/asm/add_f16_notrap.c | 645 ++++++++ .../gcc.target/aarch64/sve-acle/asm/add_f32.c | 699 +++++++++ .../aarch64/sve-acle/asm/add_f32_notrap.c | 645 ++++++++ .../gcc.target/aarch64/sve-acle/asm/add_f64.c | 726 +++++++++ .../aarch64/sve-acle/asm/add_f64_notrap.c | 645 ++++++++ .../gcc.target/aarch64/sve-acle/asm/add_s16.c | 398 +++++ .../gcc.target/aarch64/sve-acle/asm/add_s32.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/add_s64.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/add_s8.c | 315 ++++ .../gcc.target/aarch64/sve-acle/asm/add_u16.c | 398 +++++ .../gcc.target/aarch64/sve-acle/asm/add_u32.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/add_u64.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/add_u8.c | 315 ++++ .../gcc.target/aarch64/sve-acle/asm/ptrue.c | 41 + .../gcc.target/aarch64/sve-acle/asm/sub_f16.c | 672 +++++++++ .../aarch64/sve-acle/asm/sub_f16_notrap.c | 672 +++++++++ .../gcc.target/aarch64/sve-acle/asm/sub_f32.c | 699 +++++++++ .../aarch64/sve-acle/asm/sub_f32_notrap.c | 699 +++++++++ .../gcc.target/aarch64/sve-acle/asm/sub_f64.c | 726 +++++++++ .../aarch64/sve-acle/asm/sub_f64_notrap.c | 726 +++++++++ .../gcc.target/aarch64/sve-acle/asm/sub_s16.c | 398 +++++ .../gcc.target/aarch64/sve-acle/asm/sub_s32.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/sub_s64.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/sub_s8.c | 315 ++++ .../gcc.target/aarch64/sve-acle/asm/sub_u16.c | 398 +++++ .../gcc.target/aarch64/sve-acle/asm/sub_u32.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/sub_u64.c | 447 ++++++ .../gcc.target/aarch64/sve-acle/asm/sub_u8.c | 315 ++++ .../gcc.target/aarch64/sve-acle/asm/subr_f16.c | 536 +++++++ .../aarch64/sve-acle/asm/subr_f16_notrap.c | 536 +++++++ .../gcc.target/aarch64/sve-acle/asm/subr_f32.c | 563 +++++++ .../aarch64/sve-acle/asm/subr_f32_notrap.c | 563 +++++++ .../gcc.target/aarch64/sve-acle/asm/subr_f64.c | 590 ++++++++ .../aarch64/sve-acle/asm/subr_f64_notrap.c | 590 ++++++++ .../gcc.target/aarch64/sve-acle/asm/subr_s16.c | 345 +++++ .../gcc.target/aarch64/sve-acle/asm/subr_s32.c | 365 +++++ .../gcc.target/aarch64/sve-acle/asm/subr_s64.c | 365 +++++ .../gcc.target/aarch64/sve-acle/asm/subr_s8.c | 315 ++++ .../gcc.target/aarch64/sve-acle/asm/subr_u16.c | 345 +++++ .../gcc.target/aarch64/sve-acle/asm/subr_u32.c | 365 +++++ .../gcc.target/aarch64/sve-acle/asm/subr_u64.c | 365 +++++ .../gcc.target/aarch64/sve-acle/asm/subr_u8.c | 315 ++++ .../aarch64/sve-acle/asm/test_sve_acle.h | 114 ++ .../gcc.target/aarch64/sve-acle/general-c/add_1.c | 12 + .../gcc.target/aarch64/sve-acle/general-c/add_2.c | 14 + .../aarch64/sve-acle/general-c/func_redef_1.c | 5 + .../aarch64/sve-acle/general-c/func_redef_2.c | 5 + .../aarch64/sve-acle/general-c/func_redef_3.c | 5 + .../aarch64/sve-acle/general-c/func_redef_4.c | 9 + .../aarch64/sve-acle/general-c/func_redef_5.c | 21 + .../aarch64/sve-acle/general-c/func_redef_6.c | 5 + .../aarch64/sve-acle/general-c/type_redef_1.c | 5 + .../aarch64/sve-acle/general-c/type_redef_2.c | 5 + .../aarch64/sve-acle/general-c/type_redef_3.c | 5 + .../aarch64/sve-acle/general-c/type_redef_4.c | 5 + .../aarch64/sve-acle/general-c/type_redef_5.c | 5 + .../aarch64/sve-acle/general-c/type_redef_6.c | 6 + .../aarch64/sve-acle/general-c/type_redef_7.c | 7 + .../gcc.target/aarch64/sve-acle/general/add_1.c | 13 + .../aarch64/sve-acle/general/double_pragma_1.c | 7 + .../gcc.target/aarch64/sve/cond_arith_3.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/single_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_4.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/vcond_12.c | 6 +- gcc/testsuite/lib/gcc-defs.exp | 15 +- gcc/testsuite/lib/scanasm.exp | 158 ++ gcc/tree-ssa-sccvn.c | 1 + 134 files changed, 24918 insertions(+), 814 deletions(-) create mode 100644 gcc/config/aarch64/aarch64-sve-builtins.c create mode 100644 gcc/config/aarch64/aarch64-sve-builtins.def copy gcc/config/{powerpcspe/750cl.h => aarch64/arm_sve.h} (77%) copy gcc/testsuite/{gcc.target/aarch64/sve/aarch64-sve.exp => g++.target/aarch64/s [...] copy gcc/testsuite/{gcc.target/aarch64/sve/aarch64-sve.exp => g++.target/aarch64/s [...] create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/add_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/add_2.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/add_3.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/conversion_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_1.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_2.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_3.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_4.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_5.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_6.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/func_redef_7.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/mangle_1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/mangle_2.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/mangle_3.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/type_redef_1.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/type_redef_2.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/type_redef_3.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/type_redef_4.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/type_redef_5.c create mode 100644 gcc/testsuite/g++.target/aarch64/sve-acle/general-c++/type_redef_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_4.c copy gcc/testsuite/gcc.target/aarch64/{sve/aarch64-sve.exp => sve-acle/aarch64-sve [...] copy gcc/testsuite/gcc.target/aarch64/{sve/aarch64-sve.exp => sve-acle/aarch64-sve [...] create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_f16_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_f32_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_f64_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/add_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/ptrue.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_f16_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_f32_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_f64_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/sub_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_f16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_f16_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_f32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_f32_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_f64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_f64_notrap.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_s16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_s32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_s64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_s8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_u16.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_u32.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_u64.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/subr_u8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/asm/test_sve_acle.h create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/add_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/add_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/func_redef_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/func_redef_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/func_redef_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/func_redef_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/func_redef_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/func_redef_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general-c/type_redef_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/add_1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve-acle/general/double_pragma_1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[libcxx] branch master updated (ffbb91bb6 -> f1f54dc0f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository libcxx. from ffbb91bb6 Address "always inline function is not always inlinable" warn [...] new f1f54dc0f Update the synopsis for <chrono> for C++20. No functional change. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/chrono | 492 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 492 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[gcc] branch aarch64/sve-acle-branch created (now 90760b6c94d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch aarch64/sve-acle-branch in repository gcc. at 90760b6c94d [ARC] Update ARCHS scheduling rules. No new revisions were added by this update. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[gcc] branch gcc-8-branch updated (43f638e8bc2 -> 75d20a02b4f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gcc-8-branch in repository gcc. from 43f638e8bc2 PR c++/86480 - nested variadic lambda and constexpr if. new 75d20a02b4f Backport from trunk. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 12 +++ gcc/c-family/ChangeLog | 6 ++ gcc/c-family/c-warn.c | 8 ++ gcc/calls.c | 84 +++++++++++++-- gcc/doc/invoke.texi | 3 + gcc/testsuite/ChangeLog | 6 ++ gcc/testsuite/c-c++-common/attr-nonstring-8.c | 147 ++++++++++++++++++++++++++ gcc/tree-ssa-strlen.c | 33 ++++-- gcc/tree-ssa-strlen.h | 1 + 9 files changed, 283 insertions(+), 17 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/attr-nonstring-8.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[lld] branch master updated (8a1ed003a -> 870c53029)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 8a1ed003a [ELF] - Stop silently producing a broken .eh_frame_hdr. new 870c53029 Fix `ld.lld --help` message. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/Options.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

[llvm] branch master updated (19723d91b87 -> 7f233b7000a)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 19723d91b87 [RegAlloc][NFC] Fix the help string of the option "huge-siz [...] new 7f233b7000a [docs] Update GoldPlugin documentation The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: docs/GoldPlugin.rst | 47 ++++++++++++++++++++++++++++++----------------- 1 file changed, 30 insertions(+), 17 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[llvm] branch master updated (baea3f05000 -> 19723d91b87)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from baea3f05000 [llvm-objdump] Add -demangle (-C) option new 19723d91b87 [RegAlloc][NFC] Fix the help string of the option "huge-siz [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/RegAllocGreedy.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 4 months

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Tcwg-commits July 2018