Tcwg-commits June 2018

tcwg-commits@lists.linaro.org

6 participants
1203 discussions

[lld] branch master updated (6f89a931a -> 2dfb29d69)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 6f89a931a [ELF] Assign RF_EXEC rank even if --no-rosegment or SECTIONS [...] new 2dfb29d69 [PPC64] Thread-local storage general-dynamic to initial-exec [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/Arch/PPC64.cpp | 53 +++++++++++++++++++++++ ELF/InputSection.cpp | 8 ++++ ELF/Relocations.h | 1 + test/ELF/ppc64-gd-to-ie.s | 104 ++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 166 insertions(+) create mode 100644 test/ELF/ppc64-gd-to-ie.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[gcc] branch gcc-7-branch updated (17f7fa838fd -> b136964fd00)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gcc-7-branch in repository gcc. from 17f7fa838fd S/390: Fix mtune default. new b136964fd00 gcc/ChangeLog: The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 9 ++++++++- gcc/config/rs6000/rs6000-c.c | 2 +- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/powerpc/builtins-1.c | 3 +++ 4 files changed, 20 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[llvm] branch master updated (737191dd296 -> a2ba13d7317)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 737191dd296 ConstantFold: Don't fold global address vs. null for addrsp [...] new a2ba13d7317 AMDGPU: Add pass to lower kernel arguments to loads The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/AMDGPU.h | 4 + lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 267 ++++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 11 + lib/Target/AMDGPU/CMakeLists.txt | 1 + test/CodeGen/AMDGPU/GlobalISel/smrd.ll | 24 +- test/CodeGen/AMDGPU/add_i64.ll | 2 +- test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll | 2 +- test/CodeGen/AMDGPU/and.ll | 6 +- test/CodeGen/AMDGPU/ashr.v2i16.ll | 30 +- test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll | 16 +- .../AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.ll | 33 + test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll | 38 +- test/CodeGen/AMDGPU/basic-branch.ll | 3 +- test/CodeGen/AMDGPU/bfe-patterns.ll | 36 +- test/CodeGen/AMDGPU/bfi_int.ll | 22 +- test/CodeGen/AMDGPU/br_cc.f16.ll | 30 +- test/CodeGen/AMDGPU/branch-relaxation.ll | 2 +- test/CodeGen/AMDGPU/code-object-v3.ll | 4 +- test/CodeGen/AMDGPU/ctlz.ll | 4 +- test/CodeGen/AMDGPU/ctlz_zero_undef.ll | 4 +- test/CodeGen/AMDGPU/ctpop.ll | 6 +- test/CodeGen/AMDGPU/ctpop16.ll | 4 +- test/CodeGen/AMDGPU/ctpop64.ll | 6 +- test/CodeGen/AMDGPU/extract_vector_elt-f16.ll | 15 +- test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 31 +- test/CodeGen/AMDGPU/extract_vector_elt-i8.ll | 99 +- test/CodeGen/AMDGPU/fabs.f16.ll | 7 +- test/CodeGen/AMDGPU/fabs.f64.ll | 8 +- test/CodeGen/AMDGPU/fabs.ll | 14 +- test/CodeGen/AMDGPU/fadd.f16.ll | 38 +- test/CodeGen/AMDGPU/fcmp.f16.ll | 60 +- test/CodeGen/AMDGPU/fcopysign.f16.ll | 4 +- test/CodeGen/AMDGPU/fcopysign.f32.ll | 11 +- test/CodeGen/AMDGPU/fcopysign.f64.ll | 16 +- test/CodeGen/AMDGPU/fma.ll | 2 +- test/CodeGen/AMDGPU/fmin_legacy.ll | 10 +- test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 8 +- test/CodeGen/AMDGPU/fmul.f16.ll | 66 +- test/CodeGen/AMDGPU/fneg-fabs.f16.ll | 5 +- test/CodeGen/AMDGPU/fneg-fabs.f64.ll | 7 +- test/CodeGen/AMDGPU/fneg-fabs.ll | 4 +- test/CodeGen/AMDGPU/fneg.f64.ll | 6 +- test/CodeGen/AMDGPU/frame-index-amdgiz.ll | 21 +- test/CodeGen/AMDGPU/fsub.f16.ll | 60 +- test/CodeGen/AMDGPU/global_smrd.ll | 27 +- test/CodeGen/AMDGPU/half.ll | 109 +- .../AMDGPU/hsa-metadata-kernel-code-props.ll | 32 +- test/CodeGen/AMDGPU/imm.ll | 98 +- test/CodeGen/AMDGPU/immv216.ll | 4 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 142 +-- test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 95 +- test/CodeGen/AMDGPU/kernel-args.ll | 130 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll | 10 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.ll | 54 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 9 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll | 20 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll | 16 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll | 77 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 24 +- .../AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll | 3 +- test/CodeGen/AMDGPU/llvm.ceil.f16.ll | 16 +- test/CodeGen/AMDGPU/llvm.cos.f16.ll | 29 +- test/CodeGen/AMDGPU/llvm.dbg.value.ll | 8 +- test/CodeGen/AMDGPU/llvm.floor.f16.ll | 14 +- test/CodeGen/AMDGPU/llvm.fma.f16.ll | 64 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 70 +- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 55 +- test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 74 +- test/CodeGen/AMDGPU/llvm.rint.f16.ll | 14 +- test/CodeGen/AMDGPU/llvm.sin.f16.ll | 33 +- test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 14 +- test/CodeGen/AMDGPU/load-select-ptr.ll | 4 +- test/CodeGen/AMDGPU/lower-kernargs.ll | 1286 ++++++++++++++++++++ test/CodeGen/AMDGPU/lshr.v2i16.ll | 30 +- test/CodeGen/AMDGPU/madak.ll | 4 +- test/CodeGen/AMDGPU/madmk.ll | 2 +- test/CodeGen/AMDGPU/max.ll | 14 +- test/CodeGen/AMDGPU/min.ll | 41 +- test/CodeGen/AMDGPU/missing-store.ll | 2 +- .../AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll | 2 +- test/CodeGen/AMDGPU/mul.i16.ll | 3 +- test/CodeGen/AMDGPU/mul.ll | 19 +- test/CodeGen/AMDGPU/mul_int24.ll | 2 +- test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 18 +- test/CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- test/CodeGen/AMDGPU/no-shrink-extloads.ll | 8 +- test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll | 2 +- test/CodeGen/AMDGPU/operand-spacing.ll | 18 +- test/CodeGen/AMDGPU/or.ll | 18 +- test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 261 ++-- .../CodeGen/AMDGPU/reduce-store-width-alignment.ll | 3 +- test/CodeGen/AMDGPU/sad.ll | 36 +- test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll | 15 +- test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll | 15 +- test/CodeGen/AMDGPU/select-i1.ll | 10 +- test/CodeGen/AMDGPU/select-opt.ll | 5 +- test/CodeGen/AMDGPU/select.f16.ll | 46 +- test/CodeGen/AMDGPU/setcc-opt.ll | 14 +- test/CodeGen/AMDGPU/sgpr-control-flow.ll | 24 +- test/CodeGen/AMDGPU/shl.ll | 4 +- test/CodeGen/AMDGPU/shl.v2i16.ll | 4 +- test/CodeGen/AMDGPU/shl_add_constant.ll | 18 +- test/CodeGen/AMDGPU/sign_extend.ll | 1 + test/CodeGen/AMDGPU/smed3.ll | 4 +- test/CodeGen/AMDGPU/sminmax.ll | 2 +- test/CodeGen/AMDGPU/sminmax.v2i16.ll | 50 +- test/CodeGen/AMDGPU/smrd.ll | 4 +- test/CodeGen/AMDGPU/sra.ll | 8 +- test/CodeGen/AMDGPU/srl.ll | 4 +- test/CodeGen/AMDGPU/store-weird-sizes.ll | 6 +- test/CodeGen/AMDGPU/sub.ll | 6 +- test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 25 +- test/CodeGen/AMDGPU/trunc-store-i1.ll | 31 +- test/CodeGen/AMDGPU/trunc.ll | 16 +- test/CodeGen/AMDGPU/udivrem.ll | 2 +- test/CodeGen/AMDGPU/umed3.ll | 4 +- test/CodeGen/AMDGPU/unaligned-load-store.ll | 2 +- test/CodeGen/AMDGPU/uniform-cfg.ll | 17 +- test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 79 +- test/CodeGen/AMDGPU/v_cndmask.ll | 25 +- test/CodeGen/AMDGPU/v_mac_f16.ll | 14 +- test/CodeGen/AMDGPU/v_madak_f16.ll | 6 +- test/CodeGen/AMDGPU/valu-i1.ll | 2 +- test/CodeGen/AMDGPU/xor.ll | 40 +- test/CodeGen/AMDGPU/zero_extend.ll | 44 +- 130 files changed, 3111 insertions(+), 1539 deletions(-) create mode 100644 lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp create mode 100644 test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.ll create mode 100644 test/CodeGen/AMDGPU/lower-kernargs.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[gcc] branch master updated (7d804d50a38 -> b0872d0e3d8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 7d804d50a38 gcc/testsuite/ChangeLog: new b0872d0e3d8 * testsuite/experimental/algorithm/sample-2.cc: Add [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libstdc++-v3/ChangeLog | 6 ++++++ libstdc++-v3/testsuite/experimental/algorithm/sample-2.cc | 2 ++ libstdc++-v3/testsuite/experimental/algorithm/shuffle.cc | 2 ++ 3 files changed, 10 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[gcc] branch master updated (41548eeeffc -> 7d804d50a38)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 41548eeeffc 2018-06-26 Aaron Sawdey <acsawdey(a)linux.ibm.com> new 7d804d50a38 gcc/testsuite/ChangeLog: The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/powerpc/builtins-1.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[llvm] branch master updated (99917384c89 -> 737191dd296)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 99917384c89 [Local] Add a convenient insertReplacementDbgValues overload, NFC new 93ae5a35afc LoopUnroll: Allow analyzing intrinsic call costs new e64a8288ae1 [ConstantRange] Add support of mul in makeGuaranteedNoWrapRegion. new 9253369f66e [Debugify] Don't treat missing dbg.values as an error (PR37942) new 8d224a36c1c Use a variable to appease a no-asserts bot, NFC new 737191dd296 ConstantFold: Don't fold global address vs. null for addrsp [...] The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/IR/ConstantFold.cpp | 9 +- lib/IR/ConstantRange.cpp | 58 +++++++++++++ lib/Transforms/Scalar/LoopUnrollPass.cpp | 9 +- lib/Transforms/Utils/Local.cpp | 1 + test/Assembler/ConstantExprNoFold.ll | 11 +++ test/DebugInfo/debugify.ll | 2 +- .../constant-fold-address-space-pointer.ll | 4 +- .../LoopUnroll/AMDGPU/unroll-cost-call.ll | 77 +++++++++++++++++ tools/opt/Debugify.cpp | 3 +- unittests/IR/ConstantRangeTest.cpp | 99 ++++++++++++++++++++++ 10 files changed, 263 insertions(+), 10 deletions(-) create mode 100644 test/Transforms/LoopUnroll/AMDGPU/unroll-cost-call.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[compiler-rt] branch master updated (7073422f2 -> 45aa866d1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from 7073422f2 [libFuzzer] Do not turn unittest warnings into errors. new 45aa866d1 CFI: Print DSO names for failed cross-DSO icalls The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/ubsan/ubsan_handlers.cc | 15 ++++++++++++++ lib/ubsan/ubsan_handlers_cxx.cc | 25 +++++++++++++++-------- test/cfi/cross-dso-diagnostic.cpp | 42 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+), 8 deletions(-) create mode 100644 test/cfi/cross-dso-diagnostic.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[llvm] branch master updated (67cc73d7b24 -> 99917384c89)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 67cc73d7b24 [DAGCombiner] Don't accept -1 sdiv divisors in sdiv-by-pow2 [...] new 6b3e4d2fb7a [Hexagon] Add a "generic" cpu new 6a78ba2a8c2 [Local] Sink salvageDI's early exit into helper functions, NFC new 99917384c89 [Local] Add a convenient insertReplacementDbgValues overload, NFC The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/Transforms/Utils/Local.h | 5 ++++ lib/Target/Hexagon/Hexagon.td | 4 +++ lib/Target/Hexagon/HexagonSubtarget.cpp | 1 + .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp | 1 + .../Hexagon/TargetInfo/HexagonTargetInfo.cpp | 2 +- lib/Transforms/InstCombine/InstCombineCasts.cpp | 6 +--- lib/Transforms/Utils/Local.cpp | 33 ++++++++++++++++------ test/CodeGen/Hexagon/generic-cpu.ll | 7 +++++ 8 files changed, 45 insertions(+), 14 deletions(-) create mode 100644 test/CodeGen/Hexagon/generic-cpu.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[compiler-rt] branch master updated (fb37d5690 -> 7073422f2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from fb37d5690 Mark mfcall.cpp as UNSUPPORTED: win32. new a66272fc1 [libFuzzer] Mark several tests UNSUPPORTED for aarch64. new 7073422f2 [libFuzzer] Do not turn unittest warnings into errors. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/fuzzer/tests/CMakeLists.txt | 1 - test/fuzzer/coverage.test | 1 + test/fuzzer/fuzzer-printcovpcs.test | 1 + test/fuzzer/print-func.test | 2 +- test/fuzzer/target-function.test | 3 ++- test/fuzzer/trace-malloc-threaded.test | 2 +- test/fuzzer/value-profile-div.test | 1 + 7 files changed, 7 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

[glibc] branch master updated (06ab719d30 -> 05598a0907)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 06ab719d30 Fix Linux fcntl OFD locks for non-LFS architectures (BZ#20251) new 05598a0907 In sem_open.c, pad was not initialized when __HAVE_64B_ATOM [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++++ nptl/sem_open.c | 5 +++-- 2 files changed, 8 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 5 months

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Tcwg-commits June 2018