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from 0c5b8db803 [CMake] Support passing FUCHSIA_SDK as the only variable
new 6c38f66892 Add regression test for PR37935.
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from 0093dbb5fc2 [llvm-mca] Avoid calling method update() on instructions th [...]
new 823c169bec7 Build TaskQueueTest in threads=on builds, fixes regression [...]
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from 5a9de5f2 [clangd] Do not show namespace comments.
new bd7d071d [clangd] Sema ranking tweaks: downrank keywords and injected names.
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from a62a0a38355 [X86][SSE] Include MIN_SIGNED element in non-uniform SDIV p [...]
new 0093dbb5fc2 [llvm-mca] Avoid calling method update() on instructions th [...]
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tools/llvm-mca/Instruction.cpp | 21 ++++++++++++++-------
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from 8a57afce61d [DAGCombiner] visitSDIV - simplify pow2 handling. NFCI.
new a62a0a38355 [X86][SSE] Include MIN_SIGNED element in non-uniform SDIV p [...]
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test/CodeGen/X86/combine-sdiv.ll | 42 ++++++++++++++++------------------------
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from 988e5b9752d [DAGCombiner] Fold SDIV(%X, MIN_SIGNED) -> SELECT(%X == MIN [...]
new 8a57afce61d [DAGCombiner] visitSDIV - simplify pow2 handling. NFCI.
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from bab25aa442c add support for --disable-gcov
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new cdb0b9c458e Add std::__is_byte<std::byte> specialization
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gcc/tree-inline.c | 36 ++++++++---------------------
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from c628c3437c3 [arm] Add support for Arm Cortex-A76
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gcc/ChangeLog | 7 +++++++
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gcc/doc/install.texi | 4 ++++
libgcc/ChangeLog | 6 ++++++
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from 8dbef94dbeb Add SIMD to REG pattern for movhf without armv8.2-a support [...]
new c628c3437c3 [arm] Add support for Arm Cortex-A76
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gcc/config/arm/arm-tune.md | 5 +++--
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gcc/doc/invoke.texi | 6 +++---
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