Tcwg-commits May 2018

tcwg-commits@lists.linaro.org

5 participants
2008 discussions

[binutils-gdb] branch master updated (85e26832a0 -> 82cd47d5d1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 85e26832a0 Add -Wimplicit-fallthrough new 82cd47d5d1 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[binutils-gdb] branch gdb-8.1-branch updated (30f074c82e -> 198cb09f9b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gdb-8.1-branch in repository binutils-gdb. from 30f074c82e Automatic date update in version.in new 198cb09f9b Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[binutils-gdb] branch binutils-2_30-branch updated (eb66c76237 -> 7c06f27ad1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch binutils-2_30-branch in repository binutils-gdb. from eb66c76237 Automatic date update in version.in new 7c06f27ad1 Automatic date update in version.in The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch roland/8/pr77609 updated (add23aae95f -> b0ec820fd82)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch roland/8/pr77609 in repository gcc. discards add23aae95f PR other/77609: Let the assembler choose ELF section types [...] adds 9a4acdbd2f1 Daily bump. adds 52c9eee1ae4 Update .po files. adds b41d3149d20 PR libstdc++/85632 fix wraparound in filesystem::space adds b3857795640 PR libstdc++/84769 qualify call to std::get<0> adds 95eb7235305 Daily bump. adds 9df54074b1f PR ada/85540 * init.c (__gnat_handle_vms_condition): Add [...] adds 1c17eaefe16 PR ada/85635 * link.c (BSD platforms): Add missing backslash. adds b819e339696 PR libstdc++/85642 fix is_nothrow_default_constructible<opt [...] adds 0f6f1eaf1df * uk.po: Update. adds 99ec8a8a9d5 [arm] PR target/82518: Return false in ARRAY_MODE_SUPPORTED [...] adds b673a0a5c6c [AArch64] PR target/85512: Tighten SIMD right shift immedia [...] adds 1abefaf006d PR go/85630 * Makefile.am (CHECK_ENV): Set GOCACHE. (ECH [...] adds b3a001f0f30 cmd/go: on AIX, pass -X64 first when invoking ar adds 1781033e9a7 PR c++/85305 - pack in lambda init-capture. adds 8e2586b0d19 Daily bump. new b0ec820fd82 PR other/77609: Let the assembler choose ELF section types [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (add23aae95f) \ N -- N -- N refs/heads/roland/8/pr77609 (b0ec820fd82) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 11 +- gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 10 + gcc/ada/init.c | 2 +- gcc/ada/link.c | 2 +- gcc/config/aarch64/constraints.md | 4 +- gcc/cp/ChangeLog | 7 + gcc/cp/parser.c | 8 +- gcc/po/ChangeLog | 10 + gcc/po/be.po | 7576 +++++++++---------- gcc/po/da.po | 7656 +++++++++---------- gcc/po/de.po | 7709 ++++++++++---------- gcc/po/el.po | 7590 +++++++++---------- gcc/po/es.po | 7705 +++++++++---------- gcc/po/fi.po | 7618 +++++++++---------- gcc/po/fr.po | 7706 +++++++++---------- gcc/po/hr.po | 7573 +++++++++---------- gcc/po/id.po | 7647 +++++++++---------- gcc/po/ja.po | 7625 +++++++++---------- gcc/po/nl.po | 7602 +++++++++---------- gcc/po/ru.po | 7667 +++++++++---------- gcc/po/sr.po | 7643 +++++++++---------- gcc/po/sv.po | 7706 +++++++++---------- gcc/po/tr.po | 7653 +++++++++---------- gcc/po/uk.po | 7620 +++++++++---------- gcc/po/vi.po | 7640 +++++++++---------- gcc/po/zh_CN.po | 7649 +++++++++---------- gcc/po/zh_TW.po | 7637 +++++++++---------- gcc/testsuite/ChangeLog | 9 + gcc/testsuite/g++.dg/cpp1z/fold-lambda2.C | 8 + gcc/testsuite/lib/target-supports.exp | 2 +- gotools/ChangeLog | 7 + gotools/Makefile.am | 4 +- gotools/Makefile.in | 6 +- libgo/go/cmd/go/internal/work/gccgo.go | 2 +- libstdc++-v3/ChangeLog | 28 + libstdc++-v3/include/std/optional | 401 +- libstdc++-v3/include/std/variant | 2 +- libstdc++-v3/src/filesystem/ops.cc | 7 +- libstdc++-v3/src/filesystem/std-ops.cc | 7 +- .../testsuite/20_util/optional/cons/85642.cc | 63 + .../testsuite/20_util/optional/cons/value_neg.cc | 6 +- .../testsuite/27_io/filesystem/operations/space.cc | 9 + .../filesystem/operations/space.cc | 23 +- 44 files changed, 74578 insertions(+), 71284 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/fold-lambda2.C create mode 100644 libstdc++-v3/testsuite/20_util/optional/cons/85642.cc copy libstdc++-v3/testsuite/{27_io => experimental}/filesystem/operations/space.cc (75%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch roland/7/pr77609 updated (db6087c7f8a -> 8a8f8e1247e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch roland/7/pr77609 in repository gcc. discards db6087c7f8a PR other/77609: Let the assembler choose ELF section types [...] adds 2aca509ffff Daily bump. adds e31c5bbd8fc PR libstdc++/85632 fix wraparound in filesystem::space adds ba094d456bb PR libstdc++/84769 qualify call to std::get<0> adds 2bcbbb7b840 Daily bump. adds 30535fcc28d Daily bump. new 8a8f8e1247e PR other/77609: Let the assembler choose ELF section types [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (db6087c7f8a) \ N -- N -- N refs/heads/roland/7/pr77609 (8a8f8e1247e) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 2 +- gcc/DATESTAMP | 2 +- libstdc++-v3/ChangeLog | 10 +++++++ libstdc++-v3/include/std/variant | 2 +- libstdc++-v3/src/filesystem/ops.cc | 7 +++-- .../filesystem/operations/{status.cc => space.cc} | 32 ++++++++++------------ 6 files changed, 32 insertions(+), 23 deletions(-) copy libstdc++-v3/testsuite/experimental/filesystem/operations/{status.cc => space [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch master updated (19b20a5c437 -> db7548a2771)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 19b20a5c437 [nvptx] Add workaround for subsequent bar.syncs new db7548a2771 PR other/77609: Let the assembler choose ELF section types [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 13 +++++++++++++ gcc/varasm.c | 41 ++++++++++++++++++++++++++++++++--------- 2 files changed, 45 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (c353ad5eeba -> 722cccb8cf0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from c353ad5eeba [MC] Remove unused MCOI::GenericOperandType new 722cccb8cf0 [globalisel] Remove redundant -global-isel option from test [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir | 4 ++-- test/CodeGen/AArch64/GlobalISel/combine-anyext-crash.mir | 2 +- .../AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir | 2 +- test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-add.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-and.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir | 2 +- .../AArch64/GlobalISel/legalize-cmpxchg-with-success.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-combines.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-constant.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-div.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-ext.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-extload.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-fneg.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-gep.mir | 2 +- .../AArch64/GlobalISel/legalize-ignore-non-generic.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-mul.mir | 2 +- .../AArch64/GlobalISel/legalize-nonpowerof2eltsvec.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-or.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-phi.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-pow.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-property.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-rem.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-sextload.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-shift.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-simple.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-sub.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-undef.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-xor.mir | 2 +- test/CodeGen/AArch64/GlobalISel/legalize-zextload.mir | 2 +- test/CodeGen/AArch64/GlobalISel/localizer.mir | 2 +- test/CodeGen/AArch64/GlobalISel/machine-cse-mid-pipeline.mir | 2 +- test/CodeGen/AArch64/GlobalISel/reg-bank-128bit.mir | 2 +- test/CodeGen/AArch64/GlobalISel/regbankselect-dbg-value.mir | 2 +- test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-atomicrmw.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-binop.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-bitcast.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-br.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-bswap.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-cbz.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-constant.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-dbg-value.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-extload.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-fma.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-fp-casts.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-imm.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-implicit-def.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-insert-extract.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-int-ext.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir | 2 +- .../AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir | 2 +- .../AArch64/GlobalISel/select-intrinsic-aarch64-sdiv.mir | 2 +- .../AArch64/GlobalISel/select-intrinsic-crypto-aesmc.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-load.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-mul.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-muladd.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-neon-vcvtfxu2fp.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-phi.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-pr32733.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-property.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-sextload.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-store.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-trap.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-trunc.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-xor.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select-zextload.mir | 2 +- test/CodeGen/AArch64/GlobalISel/select.mir | 6 +++--- test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir | 6 +++--- test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir | 2 +- .../AMDGPU/GlobalISel/legalize-extract-vector-elt.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-gep.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 2 +- .../CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-load.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir | 2 +- .../AMDGPU/GlobalISel/regbankselect-amdgcn-exp-compr.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir | 4 ++-- .../AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir | 2 +- .../AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir | 4 ++-- .../AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect-maxnum.mir | 4 ++-- .../CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-minnum.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir | 4 ++-- test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir | 2 +- test/CodeGen/ARM/GlobalISel/arm-instruction-select-cmp.mir | 2 +- .../CodeGen/ARM/GlobalISel/arm-instruction-select-combos.mir | 2 +- test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir | 2 +- test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir | 8 ++++---- test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir | 6 +++--- test/CodeGen/ARM/GlobalISel/arm-legalize-vfp4.mir | 8 ++++---- test/CodeGen/ARM/GlobalISel/arm-legalizer.mir | 2 +- test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 2 +- test/CodeGen/ARM/GlobalISel/arm-select-globals-pic.mir | 8 ++++---- test/CodeGen/ARM/GlobalISel/arm-select-globals-ropi-rwpi.mir | 12 ++++++------ test/CodeGen/ARM/GlobalISel/arm-select-globals-static.mir | 8 ++++---- test/CodeGen/ARM/GlobalISel/select-pr35926.mir | 2 +- test/CodeGen/Mips/GlobalISel/instruction-select/add.mir | 2 +- test/CodeGen/Mips/GlobalISel/legalizer/add.mir | 2 +- test/CodeGen/Mips/GlobalISel/regbankselect/add.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-add-v128.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-add-v256.mir | 6 +++--- test/CodeGen/X86/GlobalISel/legalize-add-v512.mir | 6 +++--- test/CodeGen/X86/GlobalISel/legalize-add.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-brcond.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-cmp.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-constant.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-ext.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-fadd-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-fdiv-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-fmul-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-fpext-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-fsub-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-gep.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-insert-vec256.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-insert-vec512.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-mul-v128.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-mul-v256.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-mul-v512.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-phi.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-sub-v128.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-sub-v256.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-sub.mir | 2 +- test/CodeGen/X86/GlobalISel/legalize-trunc.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-undef.mir | 4 ++-- test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/regbankselect-AVX512.mir | 4 ++-- test/CodeGen/X86/GlobalISel/regbankselect-X32.mir | 4 ++-- test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-GV.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-add-v128.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-add-v256.mir | 6 +++--- test/CodeGen/X86/GlobalISel/select-add-v512.mir | 2 +- test/CodeGen/X86/GlobalISel/select-add-x32.mir | 2 +- test/CodeGen/X86/GlobalISel/select-add.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-and-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-ashr-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-blsi.mir | 2 +- test/CodeGen/X86/GlobalISel/select-blsr.mir | 2 +- test/CodeGen/X86/GlobalISel/select-br.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-brcond.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-cmp.mir | 2 +- test/CodeGen/X86/GlobalISel/select-constant.mir | 2 +- test/CodeGen/X86/GlobalISel/select-copy.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir | 2 +- test/CodeGen/X86/GlobalISel/select-ext.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-extract-vec256.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-extract-vec512.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-fadd-scalar.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-fconstant.mir | 10 +++++----- test/CodeGen/X86/GlobalISel/select-fdiv-scalar.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-fmul-scalar.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-fpext-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-fsub-scalar.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-gep.mir | 2 +- test/CodeGen/X86/GlobalISel/select-inc.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-insert-vec256.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-insert-vec512.mir | 2 +- .../X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir | 2 +- test/CodeGen/X86/GlobalISel/select-leaf-constant.mir | 2 +- test/CodeGen/X86/GlobalISel/select-lshr-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir | 2 +- test/CodeGen/X86/GlobalISel/select-memop-scalar.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-memop-v128.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-memop-v256.mir | 6 +++--- test/CodeGen/X86/GlobalISel/select-memop-v512.mir | 2 +- test/CodeGen/X86/GlobalISel/select-merge-vec256.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-merge-vec512.mir | 2 +- test/CodeGen/X86/GlobalISel/select-mul-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-mul-vec.mir | 2 +- test/CodeGen/X86/GlobalISel/select-or-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-phi.mir | 2 +- test/CodeGen/X86/GlobalISel/select-shl-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/select-sub-v128.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-sub-v256.mir | 6 +++--- test/CodeGen/X86/GlobalISel/select-sub-v512.mir | 2 +- test/CodeGen/X86/GlobalISel/select-sub.mir | 8 ++++---- test/CodeGen/X86/GlobalISel/select-trunc.mir | 2 +- test/CodeGen/X86/GlobalISel/select-undef.mir | 2 +- test/CodeGen/X86/GlobalISel/select-unmerge-vec256.mir | 4 ++-- test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir | 2 +- test/CodeGen/X86/GlobalISel/select-xor-scalar.mir | 2 +- test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-legalize-GV.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-legalize-sdiv.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir | 2 +- test/CodeGen/X86/GlobalISel/x86-select-sdiv.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-legalize-inttoptr.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-legalize-ptrtoint.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-legalize-sdiv.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-legalize-zext.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-select-inttoptr.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-select-ptrtoint.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-select-sdiv.mir | 2 +- test/CodeGen/X86/GlobalISel/x86_64-select-zext.mir | 2 +- 260 files changed, 374 insertions(+), 374 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (9de4e7f7794 -> c353ad5eeba)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 9de4e7f7794 Simplify LLVM_ATTRIBUTE_USED call sites. new b1f8c095b15 [MIRPraser] Improve error checking for typed immediate operands new 2cc8a8f7a4b [globalisel] Update GlobalISel emitter to match new represe [...] new c353ad5eeba [MC] Remove unused MCOI::GenericOperandType The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 13 ++ .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 84 +++++++- include/llvm/MC/MCInstrDesc.h | 5 +- .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 15 +- lib/CodeGen/MIRParser/MIParser.cpp | 19 +- lib/Target/AArch64/AArch64InstructionSelector.cpp | 6 +- lib/Target/AArch64/AArch64LegalizerInfo.cpp | 35 +++- .../AArch64/GlobalISel/legalize-extload.mir | 5 +- .../AArch64/GlobalISel/legalize-sextload.mir | 5 +- .../AArch64/GlobalISel/legalize-zextload.mir | 5 +- .../AArch64/GlobalISel/select-atomicrmw.mir | 36 ++-- test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir | 4 +- test/CodeGen/AArch64/GlobalISel/select-extload.mir | 48 +++++ test/CodeGen/AArch64/GlobalISel/select-load.mir | 110 +++++----- .../CodeGen/AArch64/GlobalISel/select-sextload.mir | 47 +++++ .../GlobalISel/select-with-no-legality-check.mir | 15 +- .../CodeGen/AArch64/GlobalISel/select-zextload.mir | 46 +++++ .../typed-immediate-operand-invalid0.mir | 13 ++ .../typed-immediate-operand-invalid1.mir | 13 ++ test/TableGen/GlobalISelEmitter.td | 99 +++++---- utils/TableGen/GlobalISelEmitter.cpp | 224 ++++++++++++--------- 21 files changed, 597 insertions(+), 250 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/select-extload.mir create mode 100644 test/CodeGen/AArch64/GlobalISel/select-sextload.mir create mode 100644 test/CodeGen/AArch64/GlobalISel/select-zextload.mir create mode 100644 test/CodeGen/MIR/WebAssembly/typed-immediate-operand-invalid0.mir create mode 100644 test/CodeGen/MIR/WebAssembly/typed-immediate-operand-invalid1.mir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (fe26f48c1eb -> 9de4e7f7794)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from fe26f48c1eb [DAGCombiner] Masked merge: don't touch "not" xor's. new 9de4e7f7794 Simplify LLVM_ATTRIBUTE_USED call sites. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Support/Signals.cpp | 11 +++-------- lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 4 ++-- lib/Transforms/Utils/LowerSwitch.cpp | 7 ++----- 3 files changed, 7 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[clang] branch master updated (cc6fab91bb -> 85ba0ebee1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from cc6fab91bb Add -target to address errors in test from r331592 new 85ba0ebee1 Disallow pointers to const in __sync_fetch_and_xxx. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/clang/Basic/DiagnosticSemaKinds.td | 2 ++ lib/Sema/SemaChecking.cpp | 6 ++++++ test/Sema/builtins.c | 5 +++++ 3 files changed, 13 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

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