Tcwg-commits May 2018

tcwg-commits@lists.linaro.org

5 participants
2008 discussions

[gcc] branch gcc-8-branch updated (1ed91ae6815 -> 384dfb099e4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gcc-8-branch in repository gcc. from 1ed91ae6815 [arm] PR target/85658 Fix operator precedence errors in par [...] new 384dfb099e4 Tighten condition in vect/pr85586.c (PR 85654) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.dg/vect/pr85586.c | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch master updated (6b402264cb4 -> 7b790875e57)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 6b402264cb4 2018-05-08 Paolo Carlini <paolo.carlini(a)oracle.com> new 7b790875e57 Tighten condition in vect/pr85586.c (PR 85654) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.dg/vect/pr85586.c | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (21150634b02 -> 91ba6e73386)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 21150634b02 [X86] Add SchedWriteFTest/SchedWriteVecTest TEST scheduler classes new 91ba6e73386 [AArch64][SVE] Asm: Support for LD1R load-and-replicate sca [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AArch64/AArch64InstrFormats.td | 26 +++++++++++ lib/Target/AArch64/AArch64SVEInstrInfo.td | 19 ++++++++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 12 +++++ lib/Target/AArch64/SVEInstrFormats.td | 37 ++++++++++++++- test/MC/AArch64/SVE/ld1rb-diagnostics.s | 23 +++++++++ test/MC/AArch64/SVE/ld1rb.s | 56 ++++++++++++++++++++++ test/MC/AArch64/SVE/ld1rd-diagnostics.s | 57 +++++++++++++++++++++++ test/MC/AArch64/SVE/ld1rd.s | 20 ++++++++ test/MC/AArch64/SVE/ld1rh-diagnostics.s | 47 +++++++++++++++++++ test/MC/AArch64/SVE/ld1rh.s | 44 +++++++++++++++++ test/MC/AArch64/SVE/ld1rsb-diagnostics.s | 32 +++++++++++++ test/MC/AArch64/SVE/ld1rsb.s | 44 +++++++++++++++++ test/MC/AArch64/SVE/ld1rsh-diagnostics.s | 42 +++++++++++++++++ test/MC/AArch64/SVE/ld1rsh.s | 32 +++++++++++++ test/MC/AArch64/SVE/ld1rsw-diagnostics.s | 47 +++++++++++++++++++ test/MC/AArch64/SVE/ld1rsw.s | 20 ++++++++ test/MC/AArch64/SVE/ld1rw-diagnostics.s | 52 +++++++++++++++++++++ test/MC/AArch64/SVE/ld1rw.s | 32 +++++++++++++ 18 files changed, 641 insertions(+), 1 deletion(-) create mode 100644 test/MC/AArch64/SVE/ld1rb-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rb.s create mode 100644 test/MC/AArch64/SVE/ld1rd-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rd.s create mode 100644 test/MC/AArch64/SVE/ld1rh-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rh.s create mode 100644 test/MC/AArch64/SVE/ld1rsb-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rsb.s create mode 100644 test/MC/AArch64/SVE/ld1rsh-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rsh.s create mode 100644 test/MC/AArch64/SVE/ld1rsw-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rsw.s create mode 100644 test/MC/AArch64/SVE/ld1rw-diagnostics.s create mode 100644 test/MC/AArch64/SVE/ld1rw.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch master updated (23b45f9a0b9 -> 6b402264cb4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 23b45f9a0b9 Backport of RISC-V support for libffi new 6b402264cb4 2018-05-08 Paolo Carlini <paolo.carlini(a)oracle.com> The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/g++.dg/cpp0x/deleted14.C | 10 ++++++++++ 2 files changed, 15 insertions(+) create mode 100644 gcc/testsuite/g++.dg/cpp0x/deleted14.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch gcc-8-branch updated (dafa8eecba2 -> 1ed91ae6815)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gcc-8-branch in repository gcc. from dafa8eecba2 2018-05-08 Richard Biener <rguenther(a)suse.de> new 1ed91ae6815 [arm] PR target/85658 Fix operator precedence errors in par [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 10 ++++++++++ gcc/config/arm/parsecpu.awk | 19 ++++++++++--------- 2 files changed, 20 insertions(+), 9 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (5a886bf8e67 -> 21150634b02)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 5a886bf8e67 [mips] Mark various memory instructions as being in microMI [...] new 21150634b02 [X86] Add SchedWriteFTest/SchedWriteVecTest TEST scheduler classes The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/X86/X86InstrSSE.td | 20 ++++++++--------- lib/Target/X86/X86SchedBroadwell.td | 36 ++++++++---------------------- lib/Target/X86/X86SchedHaswell.td | 36 ++++++++---------------------- lib/Target/X86/X86SchedSandyBridge.td | 37 ++++++------------------------- lib/Target/X86/X86SchedSkylakeClient.td | 37 ++++++------------------------- lib/Target/X86/X86SchedSkylakeServer.td | 39 ++++++--------------------------- lib/Target/X86/X86Schedule.td | 10 +++++++++ lib/Target/X86/X86ScheduleAtom.td | 4 ++++ lib/Target/X86/X86ScheduleBtVer2.td | 28 ++++------------------- lib/Target/X86/X86ScheduleSLM.td | 4 ++++ lib/Target/X86/X86ScheduleZnver1.td | 19 ++++------------ 11 files changed, 75 insertions(+), 195 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch master updated (30dd727b610 -> 23b45f9a0b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 30dd727b610 [AArch64] Predicated SVE comparison folds new 833ce006a5f [arm] PR target/85658 Fix operator precedence errors in par [...] new 23b45f9a0b9 Backport of RISC-V support for libffi The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 10 + gcc/config/arm/parsecpu.awk | 19 +- libffi/ChangeLog | 9 + libffi/Makefile.am | 2 + libffi/Makefile.in | 25 +- libffi/configure.host | 5 + libffi/src/riscv/ffi.c | 445 ++++++++++++++++++++++++++++++++++ libffi/src/{arm => riscv}/ffitarget.h | 49 ++-- libffi/src/riscv/sysv.S | 214 ++++++++++++++++ 9 files changed, 742 insertions(+), 36 deletions(-) create mode 100644 libffi/src/riscv/ffi.c copy libffi/src/{arm => riscv}/ffitarget.h (70%) create mode 100644 libffi/src/riscv/sysv.S -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (3372396f708 -> 5a886bf8e67)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 3372396f708 [AArch64] Disallow vector operand if FPR128 Q register is r [...] new 5a886bf8e67 [mips] Mark various memory instructions as being in microMI [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/Mips/MicroMipsInstrInfo.td | 19 +++++----- test/MC/Mips/micromips-loadstore-instructions.s | 46 +++++++++++++++++++++++-- 2 files changed, 53 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[gcc] branch master updated (b293e19f8a1 -> 30dd727b610)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from b293e19f8a1 [AArch64] Use UNSPEC_MERGE_PTRUE for comparisons new a6b3f63991b 2018-05-08 Paolo Carlini <paolo.carlini(a)oracle.com> new 30dd727b610 [AArch64] Predicated SVE comparison folds The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 9 + gcc/config/aarch64/aarch64-sve.md | 120 ++++++++++++ gcc/testsuite/ChangeLog | 14 ++ gcc/testsuite/g++.dg/cpp0x/sfinae62.C | 41 ++++ gcc/testsuite/gcc.target/aarch64/sve/vcond_6.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve/vcond_7.c | 216 +++++++++++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/vcond_7_run.c | 40 ++++ 7 files changed, 448 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/sfinae62.C create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vcond_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vcond_7_run.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

[llvm] branch master updated (f100a5dc31e -> 3372396f708)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from f100a5dc31e [mips] Correct clo/clz predicates new 3372396f708 [AArch64] Disallow vector operand if FPR128 Q register is r [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AArch64/AArch64InstrFormats.td | 62 +++--- lib/Target/AArch64/AArch64InstrInfo.td | 342 +++++++++++++++--------------- lib/Target/AArch64/AArch64RegisterInfo.td | 27 ++- test/MC/AArch64/basic-a64-diagnostics.s | 95 +++++++++ 4 files changed, 320 insertions(+), 206 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 6 months

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Tcwg-commits May 2018