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from a6fd92b057 x86-64: Don't mask out R_X86_64_converted_reloc_bit
new 2008a0dbe3 Display all DWARF 5 language names
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binutils/ChangeLog | 5 +++++
binutils/dwarf.c | 10 ++++++++++
2 files changed, 15 insertions(+)
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from b7d1036581 [OPENMP, NVPTX] Fix codegen for the teams reduction.
new 7c95be23cf [HIP] define __CUDA_ARCH_=1 for amdgcn targets
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lib/Basic/Targets.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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from 11ac674b8a2 [X86] Attempt to model basic arithmetic instructions in the [...]
new 7261c3dd260 [X86] Remove InstRWs for basic arithmetic instructions from [...]
new 3a4f359302b [InstCombine] add test for fsub+fneg with extra use; NFC
new 04f5112d699 [AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* [...]
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lib/Target/AMDGPU/SOPInstructions.td | 21 ++++
lib/Target/X86/X86SchedSandyBridge.td | 68 +-----------
test/MC/AMDGPU/sop1.s | 171 +++++++++++++++++++-----------
test/MC/Disassembler/AMDGPU/sop1_gfx9.txt | 34 ++++++
test/Transforms/InstCombine/fsub.ll | 15 +++
5 files changed, 181 insertions(+), 128 deletions(-)
create mode 100644 test/MC/Disassembler/AMDGPU/sop1_gfx9.txt
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from 1c1630d37c4 [InstCombine] add potential calloc tests and regenerate che [...]
new b41985cc636 [CostModel][X86] Regenerate bit count cost tests with updat [...]
new b4cde9307b5 [X86] Merge itineraries for CLC, CMC, and STC.
new 5a864681b87 [X86] Add an extra store address cycle to WriteRMW in the S [...]
new 11ac674b8a2 [X86] Attempt to model basic arithmetic instructions in the [...]
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lib/Target/X86/X86InstrArithmetic.td | 27 +-
lib/Target/X86/X86InstrInfo.td | 6 +-
lib/Target/X86/X86SchedBroadwell.td | 72 +--
lib/Target/X86/X86SchedHaswell.td | 72 +--
lib/Target/X86/X86SchedSandyBridge.td | 6 +-
lib/Target/X86/X86SchedSkylakeClient.td | 72 +--
lib/Target/X86/X86SchedSkylakeServer.td | 72 +--
lib/Target/X86/X86Schedule.td | 5 +-
lib/Target/X86/X86ScheduleAtom.td | 4 +-
test/Analysis/CostModel/X86/ctlz.ll | 807 ++++++++++++++++++++++++--------
test/Analysis/CostModel/X86/ctpop.ll | 370 +++++++++++----
test/Analysis/CostModel/X86/cttz.ll | 685 ++++++++++++++++++++-------
test/CodeGen/X86/schedule-x86_32.ll | 40 +-
test/CodeGen/X86/schedule-x86_64.ll | 798 +++++++++++++++----------------
14 files changed, 1889 insertions(+), 1147 deletions(-)
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from 85b0c0c8f0c [GlobalOpt] Fix support for casts in ctors.
new 2f648b3d190 [CostModel][X86] Regenerate vector shuffle cost tests with [...]
new 1c1630d37c4 [InstCombine] add potential calloc tests and regenerate che [...]
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.../CostModel/X86/alternate-shuffle-cost.ll | 565 ++++++++++++++-------
test/Analysis/CostModel/X86/shuffle-broadcast.ll | 303 ++++++-----
test/Analysis/CostModel/X86/shuffle-reverse.ll | 335 +++++++-----
test/Analysis/CostModel/X86/shuffle-single-src.ll | 455 +++++++++--------
test/Analysis/CostModel/X86/shuffle-two-src.ll | 486 ++++++++++--------
test/Transforms/InstCombine/memset-1.ll | 80 ++-
6 files changed, 1345 insertions(+), 879 deletions(-)
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unknown user pushed a change to branch master
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from b8b9458165 Fix typos in clang
new b7d1036581 [OPENMP, NVPTX] Fix codegen for the teams reduction.
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lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 44 ++++++--------
test/OpenMP/nvptx_parallel_codegen.cpp | 8 +--
test/OpenMP/nvptx_target_codegen.cpp | 24 ++++----
test/OpenMP/nvptx_target_printf_codegen.c | 6 +-
test/OpenMP/nvptx_target_teams_codegen.cpp | 8 +--
test/OpenMP/nvptx_teams_reduction_codegen.cpp | 88 +++++++++++++--------------
6 files changed, 86 insertions(+), 92 deletions(-)
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from 5f3a8825937 [CostModel][X86] Regenerate bswap/bitreverse cost tests wit [...]
new 730ed467c72 [AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions
new 85b0c0c8f0c [GlobalOpt] Fix support for casts in ctors.
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lib/Target/AMDGPU/SMInstructions.td | 28 ++++++++++
lib/Transforms/Utils/Evaluator.cpp | 6 ++-
test/MC/AMDGPU/smem.s | 16 ++++++
test/MC/Disassembler/AMDGPU/smem_vi.txt | 12 +++++
test/Transforms/GlobalOpt/static-const-bitcast.ll | 62 +++++++++++++++++++++++
5 files changed, 123 insertions(+), 1 deletion(-)
create mode 100644 test/Transforms/GlobalOpt/static-const-bitcast.ll
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from 05de7ec01ba [llvm-mca] Do not separate iterations with a newline in the [...]
new 029b9c23255 [ARC] Add <.f> suffix for F32_GEN4_{DOP|SOP}.
new 5f3a8825937 [CostModel][X86] Regenerate bswap/bitreverse cost tests wit [...]
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lib/Target/ARC/ARCInstrInfo.td | 36 ++-
test/Analysis/CostModel/X86/bitreverse.ll | 469 ++++++++++++++++++++++--------
test/Analysis/CostModel/X86/bswap.ll | 133 ++++++---
test/MC/Disassembler/ARC/alu.txt | 24 ++
4 files changed, 498 insertions(+), 164 deletions(-)
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from 4a97068b4ce PR c++/85242 - ICE with class definition in template parm.
new 71f5258ba6f C++: suggest missing headers for implicit use of "std" (PR [...]
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gcc/cp/ChangeLog | 13 +++
gcc/cp/name-lookup.c | 93 ++++++++++++++++---
gcc/testsuite/ChangeLog | 5 ++
.../g++.dg/lookup/missing-std-include-7.C | 100 +++++++++++++++++++++
4 files changed, 197 insertions(+), 14 deletions(-)
create mode 100644 gcc/testsuite/g++.dg/lookup/missing-std-include-7.C
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from 46037d2543c [CostModel][X86] Regenerate integer division/remainder test [...]
new 8e98b842553 [CostModel][X86] Regenerate integer extension/truncation co [...]
new 05de7ec01ba [llvm-mca] Do not separate iterations with a newline in the [...]
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test/Analysis/CostModel/X86/sse-itoi.ll | 503 ++++++++++++++-------
.../llvm-mca/AArch64/CortexA57/direct-branch.s | 15 +-
test/tools/llvm-mca/AArch64/Exynos/direct-branch.s | 6 +-
.../AArch64/Exynos/scheduler-queue-usage.s | 4 +-
test/tools/llvm-mca/X86/BtVer2/dot-product.s | 4 +-
test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s | 2 +-
test/tools/llvm-mca/X86/BtVer2/register-files-1.s | 11 +-
test/tools/llvm-mca/X86/BtVer2/register-files-2.s | 10 +-
test/tools/llvm-mca/X86/BtVer2/register-files-3.s | 2 +-
test/tools/llvm-mca/X86/BtVer2/register-files-4.s | 6 +-
tools/llvm-mca/TimelineView.cpp | 2 +-
11 files changed, 367 insertions(+), 198 deletions(-)
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