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from 0e5b4bc59ce AMDGPU/GlobalISel: Define instruction mapping for G_FPTOSI
new 738d9f98592 AMDGPU/GCN: Promote i16 ctpop
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Summary of changes:
lib/Target/AMDGPU/SIISelLowering.cpp | 1 +
lib/Target/AMDGPU/SIInstructions.td | 4 +
test/CodeGen/AMDGPU/ctpop16.ll | 334 +++++++++++++++++++++++++++++++++++
3 files changed, 339 insertions(+)
create mode 100644 test/CodeGen/AMDGPU/ctpop16.ll
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from 5e5d341c2 [WebAssembly] Simplify COMDAT handling.
new 992390fbd Update man page for long opts that accept = after r326506
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docs/ld.lld.1 | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
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from f3dbef61bdc AMDGPU/GlobalISel: Define instruction mapping for G_FMUL
new 3ec91dfb663 AMDGPU/GlobalISel: Define instruction mapping for G_FPTOUI
new 0e5b4bc59ce AMDGPU/GlobalISel: Define instruction mapping for G_FPTOSI
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Summary of changes:
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 2 ++
...egbankselect-bitcast.mir => regbankselect-fptosi.mir} | 16 ++++++++--------
...egbankselect-bitcast.mir => regbankselect-fptoui.mir} | 16 ++++++++--------
3 files changed, 18 insertions(+), 16 deletions(-)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-bitcast.mir => regbankselect-fp [...]
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-bitcast.mir => regbankselect-fp [...]
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from 24a5c742865 [InstCombine] Add more test case to fpextend.ll.
new f3dbef61bdc AMDGPU/GlobalISel: Define instruction mapping for G_FMUL
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lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 +
...gbankselect-fadd.mir => regbankselect-fmul.mir} | 32 +++++++++++-----------
2 files changed, 17 insertions(+), 16 deletions(-)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-fadd.mir => regbankselect-fmul. [...]
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from a4fcfa4da0 Add an option to disable tail-call optimization for escaping [...]
new 7d98e0d3fa Remove debugging code I accidentally committed in r326530.
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lib/Sema/SemaPseudoObject.cpp | 1 -
1 file changed, 1 deletion(-)
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from e0586d3d1f [analyzer] [tests] Again, make tests more resilient to chang [...]
new a4fcfa4da0 Add an option to disable tail-call optimization for escaping [...]
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include/clang/AST/Decl.h | 9 +++-
include/clang/Driver/Options.td | 2 +
include/clang/Frontend/CodeGenOptions.def | 2 +
lib/CodeGen/CGCall.cpp | 19 ++++++--
lib/Driver/ToolChains/Clang.cpp | 3 ++
lib/Frontend/CompilerInvocation.cpp | 2 +
lib/Sema/SemaExpr.cpp | 4 ++
lib/Sema/SemaExprObjC.cpp | 5 ++
lib/Sema/SemaPseudoObject.cpp | 1 +
.../CodeGenObjC/disable-tail-call-escaping-block.m | 54 ++++++++++++++++++++++
test/Driver/fno-escaping-block-tail-calls.c | 7 +++
11 files changed, 103 insertions(+), 5 deletions(-)
create mode 100644 test/CodeGenObjC/disable-tail-call-escaping-block.m
create mode 100644 test/Driver/fno-escaping-block-tail-calls.c
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from 808bfc8317 Always set dso_local in CodeGenModule::setDSOLocal.
new e0586d3d1f [analyzer] [tests] Again, make tests more resilient to chang [...]
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test/Analysis/MisusedMovedObject.cpp | 2 +-
test/Analysis/loop-unrolling.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
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from 6f9952dce35 AMDGPU/GlobalISel: Define instruction mapping for G_FADD
new 24a5c742865 [InstCombine] Add more test case to fpextend.ll.
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test/Transforms/InstCombine/fpextend.ll | 186 ++++++++++++++++++++++++++++++++
1 file changed, 186 insertions(+)
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from 5d3eb81ee5 [analyzer] Prevent crashing in NonNullParamChecker
new 808bfc8317 Always set dso_local in CodeGenModule::setDSOLocal.
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lib/CodeGen/CodeGenModule.cpp | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
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from c6e497a44fa [WebAssembly] Gather EH instructions in one place. NFC.
new 8f583a24ce7 AMDGPU/GlobalISel: Define instruction mapping for G_AND
new 95f12ebe5c1 AMDGPU/GlobalISel: Define instruction mapping for G_XOR
new 52088d0a5fb AMDGPU/GlobalISel: Define instruction mapping for G_SHL
new 6f9952dce35 AMDGPU/GlobalISel: Define instruction mapping for G_FADD
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Summary of changes:
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 7 ++++-
...{regbankselect-or.mir => regbankselect-and.mir} | 32 ++++++++++-----------
...regbankselect-or.mir => regbankselect-fadd.mir} | 33 +++++++++++-----------
...{regbankselect-or.mir => regbankselect-shl.mir} | 32 ++++++++++-----------
...{regbankselect-or.mir => regbankselect-xor.mir} | 32 ++++++++++-----------
5 files changed, 71 insertions(+), 65 deletions(-)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-and.mir} (70%)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-fadd.mi [...]
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-shl.mir} (70%)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-xor.mir} (70%)
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