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from 9a37922ee0 hurd: Add missing include
new 542c20a171 hurd: Rewrite __libc_cleanup_*
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ChangeLog | 9 +++++++++
sysdeps/mach/libc-lock.h | 47 ++++++++++++++++++++++++++++++-----------------
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from 0fdbc4caef4 [InstCombine] peek through unsigned FP casts for zero-equal [...]
new 867827c0f39 [LICM] Salvage DI from dying Instructions
new 4d1a7f6f3f3 [X86][Btver2] F16C instructions are performed on the JSTC f [...]
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lib/Target/X86/X86ScheduleBtVer2.td | 22 +++++++++++-----------
lib/Transforms/Scalar/LICM.cpp | 1 +
test/Transforms/LICM/sinking.ll | 4 ++++
test/tools/llvm-mca/X86/BtVer2/resources-f16c.s | 16 ++++++++--------
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from 2d1a94190f [dsymutil] Rename llvm-dsymutil -> dsymutil
new 88f530219f Resolve unused variable 'VR' warning in RetainCountChecker.cpp
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lib/StaticAnalyzer/Checkers/RetainCountChecker.cpp | 2 +-
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from 3cfd596c21d [llvm-mca] Allow the definition of multiple register files.
new 0fdbc4caef4 [InstCombine] peek through unsigned FP casts for zero-equal [...]
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lib/Transforms/InstCombine/InstCombineCompares.cpp | 9 ++++
.../InstCombine/cast-unsigned-icmp-eqcmp-0.ll | 52 ++++++----------------
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from e989b120444 [InstCombine] add nnan requirement for sqrt(x) * sqrt(y) -> [...]
new 3cfd596c21d [llvm-mca] Allow the definition of multiple register files.
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tools/llvm-mca/Dispatch.cpp | 183 +++++++++++++++++++++++++++++++++-----------
tools/llvm-mca/Dispatch.h | 166 ++++++++++++++++++++++++++--------------
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from dd28d4ba97 x86_64: Fix build with RTLD_PRIVATE_ERRNO defined to 1
new 9a37922ee0 hurd: Add missing include
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sysdeps/mach/hurd/cthreads.c | 1 +
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from d65aba275a9 [InstSimplify] loosen FMF for sqrt(X) * sqrt(X) --> X
new e989b120444 [InstCombine] add nnan requirement for sqrt(x) * sqrt(y) -> [...]
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.../InstCombine/InstCombineMulDivRem.cpp | 4 ++-
test/Transforms/InstCombine/fmul-sqrt.ll | 34 ++++++++++++++++------
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from d33d1f5f75d [X86][Btver2] Strip default latency/resource values. NFCI.
new d65aba275a9 [InstSimplify] loosen FMF for sqrt(X) * sqrt(X) --> X
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lib/Analysis/InstructionSimplify.cpp | 9 ++++---
test/Transforms/InstSimplify/fast-math.ll | 39 +++++++++++++++++++++++++++++--
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from 0d3d0f5f299 [X86][Btver2] SSE4A EXTRQ/INSERTQ instructions are performe [...]
new d33d1f5f75d [X86][Btver2] Strip default latency/resource values. NFCI.
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lib/Target/X86/X86ScheduleBtVer2.td | 17 +++++++----------
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from 3f5267c305c [X86][Btver2] Modelled float bitwise instructions as being [...]
new 0d3d0f5f299 [X86][Btver2] SSE4A EXTRQ/INSERTQ instructions are performe [...]
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lib/Target/X86/X86ScheduleBtVer2.td | 8 +++-----
test/tools/llvm-mca/X86/BtVer2/resources-sse4a.s | 8 ++++----
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