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from 3cf01d23dd1 [x86] put nops into the WriteNop class and customize for Jaguar
new e9aabdfb389 [X86] Generalize schedule classes to support multiple stages
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lib/Target/X86/X86SchedBroadwell.td | 146 ++++++++++----------------------
lib/Target/X86/X86SchedHaswell.td | 134 +++++++++--------------------
lib/Target/X86/X86SchedSandyBridge.td | 129 ++++++++++------------------
lib/Target/X86/X86SchedSkylakeClient.td | 124 +++++++++------------------
lib/Target/X86/X86SchedSkylakeServer.td | 124 +++++++++------------------
lib/Target/X86/X86ScheduleSLM.td | 113 +++++++++---------------
lib/Target/X86/X86ScheduleZnver1.td | 105 ++++++++++++-----------
test/CodeGen/X86/avx2-schedule.ll | 2 +-
8 files changed, 309 insertions(+), 568 deletions(-)
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from 911fac49 [clang-tidy] New check bugprone-unused-return-value
new 45fb9b20 run-clang-tidy: forward clang-tidy exit status
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clang-tidy/tool/run-clang-tidy.py | 14 ++++++++++----
test/clang-tidy/run-clang-tidy.cpp | 14 ++++++++++++++
test/lit.cfg | 5 +++++
3 files changed, 29 insertions(+), 4 deletions(-)
create mode 100644 test/clang-tidy/run-clang-tidy.cpp
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from 6bd41dfa71d TableGen: Explicitly forbid self-references to field members
new c27b35793b1 Changed createTemporaryFile without FD to actually create a file.
new 3cf01d23dd1 [x86] put nops into the WriteNop class and customize for Jaguar
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include/llvm/Support/FileSystem.h | 31 ++++++++++++++++++++++++++---
lib/Support/Path.cpp | 39 ++++++++++++++++++++++++++++++-------
lib/Target/X86/X86InstrFPStack.td | 6 +++---
lib/Target/X86/X86InstrInfo.td | 2 +-
lib/Target/X86/X86ScheduleBtVer2.td | 4 +++-
test/CodeGen/X86/schedule-x86_64.ll | 16 +++++++--------
test/CodeGen/X86/sse-schedule.ll | 4 ++--
test/CodeGen/X86/x87-schedule.ll | 4 ++--
8 files changed, 79 insertions(+), 27 deletions(-)
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from 2d4ee510b2 [ARM] Pass half or i16 types for NEON intrinsics
new 0bc7b41cbb Updated a usage of createTemporaryFile that does not expect [...]
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unittests/Tooling/ToolingTest.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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from 41fae9f61aa AMDGPU/GlobalISel: RegBankSelect for basic int ops
new ce04a4a4e7a TableGen: Remove the cast-from-string-to-variable-reference [...]
new b50f5594c5c TableGen: Move GenStrConcat to a helper function in BinOpInit
new a1c1c2357cf TableGen: Remove OpInit::Fold
new e0e26550486 TableGen: Only fold when some operand made resolve progress
new 0715b9ec565 TableGen: Explicitly test some cases of self-references and [...]
new c9cc57b52dc TableGen: Check the dynamic type of !cast<Rec>(string)
new 6bd41dfa71d TableGen: Explicitly forbid self-references to field members
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docs/TableGen/LangIntro.rst | 4 -
include/llvm/TableGen/Record.h | 29 +++++--
include/llvm/Target/TargetSelectionDAG.td | 20 ++---
lib/TableGen/Record.cpp | 133 ++++++++++++++----------------
lib/TableGen/TGParser.cpp | 44 ++++++----
lib/Target/AArch64/AArch64InstrFormats.td | 120 +++++++++++++--------------
lib/Target/AMDGPU/SMInstructions.td | 2 +-
lib/Target/PowerPC/PPCInstrInfo.td | 12 +--
lib/Target/SystemZ/SystemZOperands.td | 12 +--
test/TableGen/MultiClass-defm-fail.td | 2 +-
test/TableGen/cast-typeerror.td | 14 ++++
test/TableGen/self-reference-recursion.td | 9 ++
test/TableGen/self-reference-typeerror.td | 13 +++
test/TableGen/self-reference.td | 75 +++++++++++++++++
14 files changed, 306 insertions(+), 183 deletions(-)
create mode 100644 test/TableGen/cast-typeerror.td
create mode 100644 test/TableGen/self-reference-recursion.td
create mode 100644 test/TableGen/self-reference-typeerror.td
create mode 100644 test/TableGen/self-reference.td
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from 9a01c6e5228 2018-03-19 Richard Biener <rguenther(a)suse.de>
new 4aaa9b04321 [C++/84812] ICE with local fn decl
new 33ac517c520 2018-03-19 Richard Biener <rguenther(a)suse.de>
new a70faed768d 2018-03-19 Richard Biener <rguenther(a)suse.de>
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Summary of changes:
gcc/ChangeLog | 14 +++++++
gcc/cp/ChangeLog | 6 +++
gcc/cp/name-lookup.c | 7 +++-
gcc/testsuite/ChangeLog | 18 ++++++++
gcc/testsuite/g++.dg/lookup/pr84812.C | 18 ++++++++
gcc/testsuite/g++.dg/pr84933.C | 23 +++++++++++
gcc/testsuite/gcc.dg/tree-ssa/pr35286.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/pr84859.c | 22 ++++++++++
gcc/testsuite/gcc.dg/tree-ssa/split-path-6.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/split-path-7.c | 2 +-
gcc/tree-ssa-phiopt.c | 61 ++++++++++++++++++++++++----
gcc/tree-vrp.c | 9 +++-
12 files changed, 170 insertions(+), 14 deletions(-)
create mode 100644 gcc/testsuite/g++.dg/lookup/pr84812.C
create mode 100644 gcc/testsuite/g++.dg/pr84933.C
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr84859.c
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from 1df3767b190 [NFC] Fix minor typos in comments
new fe576409831 AMDGPU: Don't leave dead illegal VGPR->SGPR copies
new 41fae9f61aa AMDGPU/GlobalISel: RegBankSelect for basic int ops
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lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 1 +
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 ++
lib/Target/AMDGPU/SIInstrInfo.cpp | 7 ++++
...{regbankselect-or.mir => regbankselect-add.mir} | 33 +++++++++----------
...{regbankselect-or.mir => regbankselect-mul.mir} | 33 +++++++++----------
...{regbankselect-or.mir => regbankselect-sub.mir} | 33 +++++++++----------
test/CodeGen/AMDGPU/control-flow-fastregalloc.ll | 5 +--
test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 38 ++++++++++++++++++++--
8 files changed, 98 insertions(+), 55 deletions(-)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-add.mir} (64%)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-mul.mir} (64%)
copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-or.mir => regbankselect-sub.mir} (64%)
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from cae812cc14b [MergeICmps] Re-land 324317 "Enable the MergeICmps Pass by [...]
new 1df3767b190 [NFC] Fix minor typos in comments
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include/llvm/CodeGen/MachineValueType.h | 2 +-
include/llvm/CodeGen/ValueTypes.td | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
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from 2448ce21221 [llvm-mca] Add pipeline stall events.
new 5a0249de088 Stylish change. NFC
new e9c814d4ae5 [ARM] Support for v4f16 and v8f16 vectors
new cae812cc14b [MergeICmps] Re-land 324317 "Enable the MergeICmps Pass by [...]
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lib/CodeGen/StackColoring.cpp | 4 +--
lib/CodeGen/TargetPassConfig.cpp | 9 +++----
lib/Target/ARM/ARMCallingConv.h | 3 +++
lib/Target/ARM/ARMCallingConv.td | 16 +++++------
lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 ++
lib/Target/ARM/ARMISelLowering.cpp | 9 +++++--
lib/Target/ARM/ARMInstrNEON.td | 8 ++++++
test/CodeGen/ARM/fp16-intrinsic-vector-1op.ll | 39 +++++++++++++++++++++++++++
test/CodeGen/ARM/fp16-intrinsic-vector-2op.ll | 21 +++++++++++++++
test/CodeGen/Generic/llc-start-stop.ll | 6 ++---
test/CodeGen/PowerPC/memcmp-mergeexpand.ll | 22 +++++----------
test/CodeGen/X86/memcmp-mergeexpand.ll | 29 +++++---------------
12 files changed, 110 insertions(+), 58 deletions(-)
create mode 100644 test/CodeGen/ARM/fp16-intrinsic-vector-1op.ll
create mode 100644 test/CodeGen/ARM/fp16-intrinsic-vector-2op.ll
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from dc9a7c0c43b build_llvm_package.bat: Drop LLDB from the package.
new 2448ce21221 [llvm-mca] Add pipeline stall events.
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tools/llvm-mca/Backend.cpp | 8 ++++-
tools/llvm-mca/Backend.h | 11 ++----
tools/llvm-mca/BackendStatistics.cpp | 19 ++++-------
tools/llvm-mca/BackendStatistics.h | 21 +++++++-----
tools/llvm-mca/Dispatch.cpp | 48 +++++++++-----------------
tools/llvm-mca/Dispatch.h | 65 +++++-------------------------------
tools/llvm-mca/HWEventListener.h | 25 ++++++++++++++
7 files changed, 79 insertions(+), 118 deletions(-)
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