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from ed38187755 gc.exp: Remove extraneous LD flags from the personality test
new 4ee89e903d Replace the linear search in find_pc_sect_line with a binary [...]
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gdb/ChangeLog | 4 +
gdb/symtab.c | 22 ++---
gdb/testsuite/ChangeLog | 6 ++
gdb/testsuite/gdb.perf/template-breakpoints.cc | 97 ++++++++++++++++++++++
gdb/testsuite/gdb.perf/template-breakpoints.exp | 65 +++++++++++++++
.../{single-step.py => template-breakpoints.py} | 25 +++---
6 files changed, 195 insertions(+), 24 deletions(-)
create mode 100644 gdb/testsuite/gdb.perf/template-breakpoints.cc
create mode 100644 gdb/testsuite/gdb.perf/template-breakpoints.exp
copy gdb/testsuite/gdb.perf/{single-step.py => template-breakpoints.py} (53%)
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from c2cb8b033 Fix some tests for PPC64le architecture
new 9a1c0bfae [LLDB] Fix TestTargetXMLArch's expected arch
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.../test/functionalities/gdb_remote_client/TestTargetXMLArch.py | 2 +-
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from 45cd8b347fb [Hexagon] Fix division by zero in machine scheduler
new 41c8825da4f [AArch64][Falkor] Correct load/store increment scheduling details
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lib/Target/AArch64/AArch64SchedFalkorDetails.td | 96 +++++++++++++------------
1 file changed, 50 insertions(+), 46 deletions(-)
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from 8ce26eb802f [RISCV] Add codegen for RV32F floating point load/store
new 45cd8b347fb [Hexagon] Fix division by zero in machine scheduler
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lib/Target/Hexagon/HexagonMachineScheduler.cpp | 2 +-
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from 0d055e19c37 [llvm-mca] Use llvm::make_unique in a few places. NFC
new 8ce26eb802f [RISCV] Add codegen for RV32F floating point load/store
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lib/Target/RISCV/RISCVISelLowering.cpp | 26 +++++++++++
lib/Target/RISCV/RISCVISelLowering.h | 1 +
lib/Target/RISCV/RISCVInstrInfo.td | 24 +++++-----
lib/Target/RISCV/RISCVInstrInfoF.td | 9 ++++
lib/Target/RISCV/RISCVMCInstLower.cpp | 3 ++
test/CodeGen/RISCV/float-imm.ll | 27 +++++++++++
test/CodeGen/RISCV/float-mem.ll | 84 ++++++++++++++++++++++++++++++++++
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create mode 100644 test/CodeGen/RISCV/float-imm.ll
create mode 100644 test/CodeGen/RISCV/float-mem.ll
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from a07f460d529 [RISCV] Add codegen for RV32F arithmetic and conversion operations
new 0d055e19c37 [llvm-mca] Use llvm::make_unique in a few places. NFC
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tools/llvm-mca/Backend.cpp | 5 ++---
tools/llvm-mca/InstrBuilder.cpp | 30 +++++++++++++-----------------
tools/llvm-mca/InstrBuilder.h | 3 ++-
tools/llvm-mca/Instruction.h | 4 ++--
4 files changed, 19 insertions(+), 23 deletions(-)
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from ff6d4d64982 PR c++/84937 - ICE with class deduction and auto.
new ad3ff5d427b PR target/84990 * dwarf2asm.c (dw2_output_indirect_consta [...]
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gcc/ChangeLog | 6 ++++++
gcc/dwarf2asm.c | 6 ++++++
gcc/varasm.c | 7 -------
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from 38b58f1b4f4 [Hexagon] Improve scheduling based on register pressure
new a07f460d529 [RISCV] Add codegen for RV32F arithmetic and conversion operations
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lib/Target/RISCV/RISCVISelLowering.cpp | 53 ++++++++-
lib/Target/RISCV/RISCVInstrInfoF.td | 56 ++++++++++
test/CodeGen/RISCV/float-arith.ll | 190 +++++++++++++++++++++++++++++++++
test/CodeGen/RISCV/float-convert.ll | 72 +++++++++++++
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create mode 100644 test/CodeGen/RISCV/float-arith.ll
create mode 100644 test/CodeGen/RISCV/float-convert.ll
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from c35d7f78e Re-land: [lldb] Use vFlash commands when writing to target's [...]
new c2cb8b033 Fix some tests for PPC64le architecture
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.../test/expression_command/test/TestExprs2.py | 37 +++++++++++++++-------
.../functionalities/thread/jump/TestThreadJump.py | 6 ++--
packages/Python/lldbsuite/test/lldbtest.py | 7 ++++
.../test/tools/lldb-mi/data/TestMiData.py | 4 +--
4 files changed, 39 insertions(+), 15 deletions(-)
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from f548c428af6 PR target/84845 * config/aarch64/aarch64.md (*aarch64_reg [...]
new 755cdd1aba0 2018-03-20 Richard Biener <rguenther(a)suse.de>
new ff6d4d64982 PR c++/84937 - ICE with class deduction and auto.
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gcc/cp/ChangeLog | 7 ++++++-
gcc/cp/pt.c | 17 +++++++++++++++--
gcc/testsuite/g++.dg/cpp1z/class-deduction51.C | 11 +++++++++++
libgomp/ChangeLog | 5 +++++
libgomp/testsuite/libgomp.graphite/force-parallel-4.c | 7 +++++--
5 files changed, 42 insertions(+), 5 deletions(-)
create mode 100644 gcc/testsuite/g++.dg/cpp1z/class-deduction51.C
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