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from 43e7c1ccf9e [X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for a [...]
new 6c93e2af214 [X86] Add PR33747 test case
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Summary of changes:
test/CodeGen/X86/pr33747.ll | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 test/CodeGen/X86/pr33747.ll
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from 8d295d41b32 fix test/CodeGen/X86/fixup-sfb.ll test failure after commit [...]
new 43e7c1ccf9e [X86][SSE] Enable SMIN/SMAX/UMIN/UMAX custom lowering for a [...]
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Summary of changes:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 19 +
lib/Target/X86/X86ISelLowering.cpp | 55 +-
test/CodeGen/X86/combine-smax.ll | 7 +-
test/CodeGen/X86/combine-smin.ll | 6 +-
test/CodeGen/X86/combine-umax.ll | 6 +-
test/CodeGen/X86/combine-umin.ll | 7 +-
test/CodeGen/X86/horizontal-reduce-smax.ll | 273 +-
test/CodeGen/X86/horizontal-reduce-smin.ll | 325 +-
test/CodeGen/X86/horizontal-reduce-umax.ll | 613 +--
test/CodeGen/X86/horizontal-reduce-umin.ll | 581 +-
test/CodeGen/X86/i64-to-float.ll | 60 +-
test/CodeGen/X86/psubus.ll | 1159 ++--
test/CodeGen/X86/vec_minmax_sint.ll | 764 ++-
test/CodeGen/X86/vec_minmax_uint.ll | 911 ++--
test/CodeGen/X86/vector-trunc-packus.ll | 3893 +++++++-------
test/CodeGen/X86/vector-trunc-ssat.ll | 4151 +++++++--------
test/CodeGen/X86/vector-trunc-usat.ll | 2658 +++++-----
test/CodeGen/X86/vselect-minmax.ll | 7968 ++++++++++++----------------
18 files changed, 10787 insertions(+), 12669 deletions(-)
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from fa2037abb8f [X86] Reduce Store Forward Block issues in HW
new 8d295d41b32 fix test/CodeGen/X86/fixup-sfb.ll test failure after commit [...]
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test/CodeGen/X86/fixup-sfb.ll | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
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from 35542ad55d8 [X86] Don't make 512-bit vectors legal when preferred vecto [...]
new fa2037abb8f [X86] Reduce Store Forward Block issues in HW
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lib/Target/X86/CMakeLists.txt | 1 +
lib/Target/X86/X86.h | 3 +
lib/Target/X86/X86FixupSFB.cpp | 558 ++++++++++++++
lib/Target/X86/X86TargetMachine.cpp | 1 +
test/CodeGen/X86/fixup-sfb.ll | 1373 +++++++++++++++++++++++++++++++++++
5 files changed, 1936 insertions(+)
create mode 100644 lib/Target/X86/X86FixupSFB.cpp
create mode 100644 test/CodeGen/X86/fixup-sfb.ll
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from fab5e4d91a8 [X86] Remove setOperationAction lines for promoting vXi1 SI [...]
new 35542ad55d8 [X86] Don't make 512-bit vectors legal when preferred vecto [...]
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lib/Target/X86/X86ISelLowering.cpp | 60 ++-
lib/Target/X86/X86Subtarget.cpp | 4 +-
lib/Target/X86/X86Subtarget.h | 17 +-
lib/Target/X86/X86TargetMachine.cpp | 21 +-
test/CodeGen/X86/required-vector-width.ll | 628 ++++++++++++++++++++++++++++++
5 files changed, 705 insertions(+), 25 deletions(-)
create mode 100644 test/CodeGen/X86/required-vector-width.ll
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from a7d13fbe246 [SelectionDAG] Remove TargetLowering::getConstTrueVal. Use [...]
new fab5e4d91a8 [X86] Remove setOperationAction lines for promoting vXi1 SI [...]
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lib/Target/X86/X86ISelLowering.cpp | 26 --------------------------
1 file changed, 26 deletions(-)
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from 33e861c4893 [X86] Remove some redundant qualifications from the setOper [...]
new a7d13fbe246 [SelectionDAG] Remove TargetLowering::getConstTrueVal. Use [...]
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include/llvm/CodeGen/TargetLowering.h | 4 ----
lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 5 +++--
lib/CodeGen/SelectionDAG/TargetLowering.cpp | 10 ----------
3 files changed, 3 insertions(+), 16 deletions(-)
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from cd0b6313606 [X86][SSE] Add SMIN/SMAX combine test
new 33e861c4893 [X86] Remove some redundant qualifications from the setOper [...]
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lib/Target/X86/X86ISelLowering.cpp | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
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from 823dd6222 Use RelType instead of uint32_t in DynamicReloc. NFC
new 4bccfb2f7 Fixed extra ‘;’ warning
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ELF/ICF.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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