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from 2bf0b13 Added workaround for the gcc bug 80916.
new 7f8fef5 [zorg] Cleanup unnecessary options for ARM and AArch64 bots
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buildbot/osuosl/master/config/builders.py | 38 ++++++++-----------------------
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from d00dd7dc5e Remove bfd stub function casts.
new 75cdede099 Add -z noseparate-code to ld-elf tests
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ld/ChangeLog | 8 ++++++++
ld/testsuite/ld-elf/pr19162.d | 2 +-
ld/testsuite/ld-elf/textaddr1.d | 2 +-
ld/testsuite/ld-elf/textaddr2.d | 2 +-
ld/testsuite/ld-elf/textaddr4.d | 2 +-
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from f2663db126 [clang-format] Enable google text proto formatting in R"proto('s
new 95f8295f51 [Coroutines] Use target-agnostic size_t in test
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unknown user pushed a change to branch master
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from 5a73d351720 gcc/ PR target/83831 * config/rx/rx.c (rx_fuse_in_memory_ [...]
new ad0959559ad combine: Fix problem with RTL checking
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gcc/ChangeLog | 6 ++++++
gcc/combine.c | 7 ++++++-
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from 1dc4a4ed028 2018-02-16 Richard Biener <rguenther(a)suse.de>
new 18a7d8073e6 PR c++/84045 - ICE with typedef and noexcept. * except.c [...]
new 76d7e125d09 PR c++/83227 - C++17 ICE with init-list derived-to-base co [...]
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gcc/cp/ChangeLog | 9 +++++++++
gcc/cp/call.c | 9 +++++----
gcc/cp/except.c | 4 ++++
gcc/testsuite/g++.dg/cpp0x/initlist98.C | 17 +++++++++++++++++
gcc/testsuite/g++.dg/cpp0x/noexcept32.C | 14 ++++++++++++++
5 files changed, 49 insertions(+), 4 deletions(-)
create mode 100644 gcc/testsuite/g++.dg/cpp0x/initlist98.C
create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept32.C
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from 4a6c533c4e9 2018-02-16 Richard Biener <rguenther(a)suse.de>
new 5a73d351720 gcc/ PR target/83831 * config/rx/rx.c (rx_fuse_in_memory_ [...]
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from 15adae8bbeb 2018-02-16 Richard Biener <rguenther(a)suse.de>
new 4a6c533c4e9 2018-02-16 Richard Biener <rguenther(a)suse.de>
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gcc/ChangeLog | 11 +++++++++++
gcc/config/i386/i386.c | 25 ++++++++++++++++++++++++-
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from 7735c733573 [SelectionDAG] Add initial SimplifyDemandedVectorElts suppo [...]
new 63623d97024 [mips] Remove codegen support from some 16 bit instructions
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lib/Target/Mips/MicroMips32r6InstrInfo.td | 17 +--
test/CodeGen/Mips/llvm-ir/and.ll | 36 +++---
test/CodeGen/Mips/llvm-ir/ashr.ll | 149 +++++++++++--------------
test/CodeGen/Mips/llvm-ir/lshr.ll | 178 ++++++++++++++----------------
test/CodeGen/Mips/llvm-ir/or.ll | 36 +++---
test/CodeGen/Mips/llvm-ir/shl.ll | 154 ++++++++++++--------------
test/CodeGen/Mips/llvm-ir/xor.ll | 32 +++---
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from 7efefc330 Re-enable lang/objc/modules/TestObjCModules
new f606fe182 Shorten socket names in TestPlatformProcessConnect
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