Tcwg-commits December 2018

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (b9ccd69ad -> d63ee0290)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards b9ccd69ad gcc-acf6ca2a97694176ffccef9fc2baf50990391639: all new d63ee0290 binutils-fe554d200d1befdc3bddc9e14f8593ea3446c351: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b9ccd69ad) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 124 +- 3-build_abe-binutils/console.log | 3789 +- 3-build_abe-binutils/revision | 2 +- 4-build_abe-stage1/console.log | 4239 +- 5-count_linux_objs/console.log | 320679 +++++++++++++++++----------------- console.log | 331127 ++++++++++++++++++------------------ distance-to-baseline | 2 +- jenkins/build-name | 2 +- jenkins/manifest.sh | 6 +- trigger-bisect-on-failure | 6 +- 10 files changed, 329915 insertions(+), 330061 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (444a108ec5b -> 7eed46bcf76)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/llvm-monorepo. from 444a108ec5b Regenerate knownbits test. NFCI. adds ca6339b50d5 [TargetLowering] Add ISD::AND handling to SimplifyDemandedV [...] adds 4dcd1eab2d4 [OpenCL] Add generic AS to 'this' pointer adds 55883643f63 ELF: Simplify program header iteration adds fd775d48ef5 [clang-fuzzer] Add explicit dependency on clangSerializatio [...] adds ac838e07e5d [CUDA][OPENMP][NVPTX]Improve logic of the debug info support. adds 2dfe55e183a Revert "[OpenCL] Add generic AS to 'this' pointer" adds cd169dba140 Remove TODO leftover from my devleopment branch adds 2317e242f54 [AggressiveInstCombine] add tests for rotates with branch; NFC adds 678bc60a719 [mips] Enable using of integrated assembler in all cases. adds 4b0c5a57a8d [mips] Enable using of integrated assembler in all cases. adds 392d582085c ELF: Clean up section type computation adds 0ea51686cbf [AMDGPU] Extend the SI Load/Store optimizer to combine more [...] adds 260e3fc9515 [ExprConstant] Improve memchr/memcmp for type mismatch and [...] adds bd5d5f75913 Basic: make `int_least64_t` and `int_fast64_t` match on Darwin adds 58f7c3e95fa [SampleFDO] Extend profile-sample-accurate option to cover [...] adds db72ed6c2b8 [ast] CreateParameterDeclaration should use an appropriate [...] adds b00d5b7d834 Make clang::CallGraph look into template instantiations adds ea24d28e9de [Driver] Add support for -fembed-bitcode for assembly file adds ca3457d3c10 [Unroll/UnrollAndJam/Vectorizer/Distribute] Add followup lo [...] adds d12379ed0f9 [gn build] Add all non-test build files for lld adds f4491d87cb8 [x86] allow 8-bit adds to be promoted by convertToThreeAddr [...] adds c869b859913 [docs] Use correct ending quotes. adds d6faeff0e57 [gn build] Merge r348944 adds 68e8bb45ae7 [LV] Fix signed/unsigned comparison warning. adds 92d17913d1c Change CallGraph print to show the fully qualified name adds 358a1f3c6b0 NFC: fix compiler warning about code never being executed w [...] adds 5e0ec275777 [NVPTX] do not rely on cached subtarget info. If a module h [...] adds 9ac8fa36d1e [SelectionDAG] Add a generic isSplatValue function adds 20cec729928 llvm-dwarfdump: Dump array dimensions in stringified type names adds 7332e8a4319 Update for an llvm-dwarfdump change in output adds c0cabd9bad6 [X86] Added missing constant pool checks. NFCI. adds 26cd6087db7 [ConstantFold] Use getMinSignedBits for APInt in isIndexInR [...] adds 9485512e069 Fix Wdocumentation warning. NFCI. adds 428a4a098b1 [X86] Emit SBB instead of SETCC_CARRY from LowerSELECT. Bre [...] adds db1d6815852 DebugInfo/DWARF: Refactor getAttributeValueAsReferencedDie [...] adds 39ed2fc050c DebugInfo/DWARF: Refactor type dumping to dump types, rathe [...] adds b0ae061bdc1 DebugInfo/DWARF: Improve dumping of pointers to members ('i [...] adds 33f99e2bc9d [AMDGPU] Emit MessagePack HSA Metadata for v3 code object adds eb7d9b2362d DebugInfo/DWARF: Pretty print subroutine types adds ca1ca0e9b83 [X86] Added missing constant pool checks. NFCI. adds d5440ab36bc [test] [filesystems] Extend FreeBSD tv_sec==-1 workaround t [...] adds cca2337ba25 [test] [filesystems] NetBSD can do symlink permissions too adds 9bbaece3b73 Teach __builtin_unpredictable to work through implicit casts. adds 8382ae67744 Support: use internal `call_once` on PPC64le adds d05809c9ddb [AMDGPU] Support for "uniform-work-group-size" attribute adds 62a8eb17e76 [X86] Move stack folding test for MULX to a MIR test. Add a [...] adds 14561e39488 [test] [depr.c.headers] XFAIL uchar.h on NetBSD adds ae753b0ffca Fix for llvm-dwarfdump changes for subroutine types adds 7f839ebcd18 [X86] Don't emit MULX by default with BMI2 adds be15564fd49 [globalisel] Rename GISelChangeObserver's erasedInstr() to [...] adds 1a1467706d7 [AST] Store "UsesADL" information in CallExpr. adds 75a1f218585 Declares __cpu_model as dso local adds b1e85546373 [hwasan] Verify Android TLS slot at startup. adds dc89d8f4a24 [PhaseOrdering] add test for funnel shift (rotate); NFC adds 9ca28be3822 Avoid code duplication in the SEH version of UnwindCursor:: [...] adds 03887f09c77 Revert "Declares __cpu_model as dso local" adds af8443a984c [hwasan] Android: Switch from TLS_SLOT_TSAN(8) to TLS_SLOT_ [...] adds 85e02baff32 Switch Android from TLS_SLOT_TSAN(8) to TLS_SLOT_SANITIZER(6) adds f6c05b5e66b [llvm-objcopy] Change Segment::Type from uint64_t to uint32_t adds 9ae04482dc6 [hwasan] Link ubsan_cxx to shared runtime library. adds 6cb10801c8f [InstCombine] Fix negative GEP offset evaluation for 32-bit [...] adds 825f23134f7 [LoopDeletion] Update debug values after loop deletion. adds ddb48432c9b [WebAssembly] Update dylink section parsing adds f96a1daa9c9 [WebAssembly] Add "needed" list to dylink section adds e44cf5eecbc Emit a proper diagnostic when attempting to forward inalloc [...] adds f302f33cc24 [globalisel] Add GISelChangeObserver::changingInstr() adds 3e514ccdb87 [gn build] Fix defines define on Windows adds 147a5a151eb [libcxx] Add assertion in deque::pop_back when popping from [...] adds 84102c30050 [Support] Fix FileNameLength passed to SetFileInformationByHandle adds c873ef0b8ed [NFC] Small code cleanups in utility. adds fbd4ac95667 [test] Add a set of test for constant folding deopt operand [...] adds 1335d6f5569 [LoopUtils] Prefer a set over a map. NFCI. adds 9b3531b1b7e [analyzer] RunLoopAutoreleaseLeakChecker: Come up with a te [...] adds e758097411e Remove unused Args parameter from EmitFunctionBody, NFC adds 1492b28db33 Revert r348645 - "[MemCpyOpt] memset->memcpy forwarding wit [...] adds ec6cc3feedc [AMDGPU] Simplify negated condition adds dc42bf76a24 [clang] Add AST matcher for block expressions 🔍 adds 64cbba589eb [AMDGPU] Fix build failure adds e6c879b1f18 [AMDGPU] Fix build failure, second attempt adds 082725ade79 [X86] Remove assert leftover from when i1 was a legal type. [...] adds 1297f5eaa57 Portable Python script across Python version adds 6ef63879a21 Portable Python script across Python version adds b81dadb2990 Portable Python script across Python version adds cbd42419025 AMDGPU/GlobalISel: Test cleanups adds ce22d0f4dad AMDGPU/GlobalISel: RegBankSelect some simple operations adds 05e99d9127e Fix missing C++ mode comment in header adds 61610b437ba AMDGPU/GlobalISel: Legalize f64 fadd/fmul adds 45f373579c4 [asan] Don't check ODR violations for particular types of globals adds 464e06839f7 [CodeGen] Allow mempcy/memset to generate small overlapping [...] adds b87ffdfc41f Fix for bugzilla https://bugs.llvm.org/show_bug.cgi?id=39970 adds 281a76a3aa8 Add new interceptors for vis(3) API in NetBSD adds 19d64647c27 [OpenCL] Add generic AS to 'this' pointer adds d1471eec360 Fix for clang interface update adds 5825966ab1a Add a new interceptors for cdbr(3) and cdbw(3) API from NetBSD adds 99cb597e987 [AArch64] Catch some more CMN opportunities. adds 222f7f3427b [RISCV] Add support for the various RISC-V FMA instruction [...] adds 34367fec071 [ELF][AArch64] Fix adrp to undefined weak reference. adds 30c5d54b32e [TargetLowering] Add ISD::ROTL/ROTR vector expansion adds c24a5393333 [ARM GlobalISel] Support exts and truncs for Thumb2 adds 3f4bdf9bf49 Classify tests in lit/Modules adds e6639abf39c [DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early [...] adds 720a8b99ac8 [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have fla [...] adds 914a814af4e [NFC][PowerPC] add verify-machineinstrs check adds 14932effb96 [clangd] Move the utility function to anonymous namespace, NFC. adds 98dba600ca1 [clangd] Avoid emitting Queued status when we are able to a [...] adds 7eed46bcf76 [clangd] Refine the way of checking a declaration is refere [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/TUScheduler.cpp | 8 +- clang-tools-extra/clangd/Threading.cpp | 9 + clang-tools-extra/clangd/Threading.h | 1 + clang-tools-extra/clangd/XRefs.cpp | 22 +- clang-tools-extra/clangd/index/Background.cpp | 65 +- .../unittests/clangd/TUSchedulerTests.cpp | 2 - clang-tools-extra/unittests/clangd/XRefsTests.cpp | 47 + clang/docs/LibASTMatchersReference.html | 30 + clang/include/clang/AST/CanonicalType.h | 2 +- clang/include/clang/AST/DeclCXX.h | 5 +- clang/include/clang/AST/Expr.h | 21 +- clang/include/clang/AST/ExprCXX.h | 24 +- clang/include/clang/AST/Stmt.h | 3 + clang/include/clang/AST/Type.h | 54 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 30 + clang/include/clang/Analysis/CallGraph.h | 1 + clang/include/clang/Basic/DiagnosticASTKinds.td | 2 + clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Driver/ToolChain.h | 5 + clang/include/clang/Sema/Overload.h | 13 +- clang/include/clang/Sema/Sema.h | 34 +- clang/lib/AST/ASTContext.cpp | 5 +- clang/lib/AST/ASTDumper.cpp | 13 +- clang/lib/AST/ASTImporter.cpp | 5 +- clang/lib/AST/DeclCXX.cpp | 15 +- clang/lib/AST/Expr.cpp | 15 +- clang/lib/AST/ExprConstant.cpp | 155 ++- clang/lib/AST/ItaniumMangle.cpp | 5 +- clang/lib/AST/MicrosoftMangle.cpp | 2 +- clang/lib/AST/Type.cpp | 16 +- clang/lib/AST/TypePrinter.cpp | 6 +- clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 1 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 + clang/lib/Analysis/CallGraph.cpp | 2 +- clang/lib/Basic/Targets/OSTargets.h | 9 + clang/lib/CodeGen/CGCall.cpp | 21 +- clang/lib/CodeGen/CGClass.cpp | 14 +- clang/lib/CodeGen/CGDebugInfo.cpp | 6 +- clang/lib/CodeGen/CGDeclCXX.cpp | 5 +- clang/lib/CodeGen/CGExpr.cpp | 2 +- clang/lib/CodeGen/CGValue.h | 5 +- clang/lib/CodeGen/CodeGenFunction.cpp | 7 +- clang/lib/CodeGen/CodeGenFunction.h | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 8 + clang/lib/Driver/ToolChains/Cuda.cpp | 79 +- clang/lib/Driver/ToolChains/Cuda.h | 2 + clang/lib/Driver/ToolChains/Gnu.cpp | 11 +- clang/lib/Index/USRGeneration.cpp | 3 +- clang/lib/Parse/ParseCXXInlineMethods.cpp | 2 +- clang/lib/Parse/ParseDecl.cpp | 17 +- clang/lib/Parse/ParseOpenMP.cpp | 2 +- clang/lib/Sema/SemaCodeComplete.cpp | 12 +- clang/lib/Sema/SemaDecl.cpp | 11 +- clang/lib/Sema/SemaDeclCXX.cpp | 8 +- clang/lib/Sema/SemaExpr.cpp | 27 +- clang/lib/Sema/SemaExprCXX.cpp | 11 +- clang/lib/Sema/SemaLambda.cpp | 10 +- clang/lib/Sema/SemaOverload.cpp | 99 +- clang/lib/Sema/SemaTemplate.cpp | 2 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 5 +- clang/lib/Sema/SemaTemplateInstantiate.cpp | 10 +- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 10 +- clang/lib/Sema/SemaType.cpp | 30 +- clang/lib/Sema/TreeTransform.h | 13 +- clang/lib/Serialization/ASTReader.cpp | 2 +- clang/lib/Serialization/ASTReaderStmt.cpp | 1 + clang/lib/Serialization/ASTWriter.cpp | 2 +- clang/lib/Serialization/ASTWriterStmt.cpp | 1 + clang/test/AST/ast-dump-expr.cpp | 43 + .../Checkers/RunLoopAutoreleaseLeakChecker.m | 49 +- .../{debug-CallGraph.c => debug-CallGraph.cpp} | 22 +- clang/test/CodeGen/asan-static-odr.cpp | 17 + clang/test/CodeGen/builtin-unpredictable.c | 12 +- clang/test/CodeGenCXX/inalloca-lambda.cpp | 11 + clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl | 154 +++ .../CodeGenOpenCLCXX/template-address-spaces.cl | 15 +- clang/test/Driver/cuda-dwarf-2.cu | 30 +- clang/test/Driver/embed-bitcode.s | 12 + clang/test/Driver/openmp-offload-gpu.c | 31 +- clang/test/Import/call-expr/Inputs/F.cpp | 10 + clang/test/Import/call-expr/test.cpp | 8 + .../Misc/backend-optimization-failure-nodbg.cpp | 2 +- clang/test/Misc/backend-optimization-failure.cpp | 2 +- clang/test/Preprocessor/init.c | 24 +- clang/test/SemaCXX/constexpr-string.cpp | 198 ++- .../test/SemaOpenCLCXX/address-space-templates.cl | 4 +- clang/tools/clang-fuzzer/handle-cxx/CMakeLists.txt | 1 + clang/tools/driver/cc1as_main.cpp | 23 + clang/tools/libclang/CIndex.cpp | 2 +- clang/tools/scan-view/bin/scan-view | 11 +- .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 4 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 34 + clang/utils/analyzer/SATestBuild.py | 7 +- compiler-rt/lib/asan/asan_globals.cc | 13 +- compiler-rt/lib/hwasan/CMakeLists.txt | 1 + compiler-rt/lib/hwasan/hwasan.cc | 2 + compiler-rt/lib/hwasan/hwasan.h | 2 + compiler-rt/lib/hwasan/hwasan_linux.cc | 17 + .../sanitizer_common_interceptors.inc | 450 ++++++ compiler-rt/lib/sanitizer_common/sanitizer_linux.h | 10 +- .../sanitizer_platform_interceptors.h | 2 + .../sanitizer_platform_limits_netbsd.cc | 3 + .../sanitizer_platform_limits_netbsd.h | 38 + .../test/asan/TestCases/Linux/odr_indicators.cc | 26 + compiler-rt/test/hwasan/TestCases/cfi.cc | 18 + .../test/sanitizer_common/TestCases/NetBSD/cdb.cc | 134 ++ .../test/sanitizer_common/TestCases/NetBSD/vis.cc | 245 ++++ libcxx/include/deque | 9 +- .../sequences/deque/pop_back_empty.pass.cpp} | 21 +- .../sequences/vector/pop_back_empty.pass.cpp} | 21 +- .../test/std/depr/depr.c.headers/uchar_h.pass.cpp | 1 + .../fs.op.last_write_time/last_write_time.pass.cpp | 2 +- .../fs.op.permissions/permissions.pass.cpp | 2 +- libunwind/src/Registers.hpp | 18 +- libunwind/src/UnwindCursor.hpp | 108 +- lld/ELF/InputSection.cpp | 4 +- lld/test/ELF/aarch64-undefined-weak.s | 2 +- lld/test/wasm/debuginfo.test | 4 +- lld/wasm/Writer.cpp | 1 + lldb/include/lldb/Symbol/ClangASTContext.h | 3 +- lldb/lit/Modules/{ => ELF}/build-id-case.yaml | 2 - .../lit/Modules/{ => ELF}/compressed-sections.yaml | 2 + .../duplicate-section.yaml} | 0 .../{elf-many-sections.s => ELF/many-sections.s} | 0 .../section-types.yaml} | 47 +- lldb/lit/Modules/{ => ELF}/short-build-id.yaml | 0 lldb/lit/Modules/{ => MachO}/lc_build_version.yaml | 0 .../{ => MachO}/lc_build_version_notools.yaml | 0 lldb/lit/Modules/{ => MachO}/lc_version_min.yaml | 0 lldb/lit/Modules/MachO/subsections.yaml | 5 + .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 283 +--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h | 16 +- .../Plugins/Process/elf-core/ProcessElfCore.cpp | 39 +- .../Plugins/Process/elf-core/ProcessElfCore.h | 4 +- .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 5 +- .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 4 +- .../source/Plugins/SymbolFile/PDB/PDBASTParser.cpp | 3 +- .../Plugins/SymbolFile/PDB/SymbolFilePDB.cpp | 7 +- lldb/source/Symbol/ClangASTContext.cpp | 8 +- lldb/source/Utility/FileSpec.cpp | 2 +- lldb/source/Utility/Stream.cpp | 4 +- lldb/source/Utility/StringList.cpp | 2 +- lldb/source/Utility/StructuredData.cpp | 6 +- lldb/source/Utility/TildeExpressionResolver.cpp | 2 +- lldb/source/Utility/UUID.cpp | 4 +- lldb/tools/lldb-test/lldb-test.cpp | 1 + llvm/docs/LangRef.rst | 123 ++ llvm/docs/Passes.rst | 5 + llvm/docs/TransformMetadata.rst | 441 ++++++ llvm/docs/index.rst | 1 + .../llvm/BinaryFormat/AMDGPUMetadataVerifier.h | 70 + llvm/include/llvm/BinaryFormat/ELF.h | 8 +- llvm/include/llvm/BinaryFormat/Wasm.h | 1 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 1 - .../llvm/CodeGen/GlobalISel/GISelChangeObserver.h | 8 +- .../GlobalISel/LegalizationArtifactCombiner.h | 2 +- llvm/include/llvm/CodeGen/SelectionDAG.h | 12 + llvm/include/llvm/CodeGen/TargetLowering.h | 6 + llvm/include/llvm/DebugInfo/DWARF/DWARFDie.h | 1 + llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/LinkAllPasses.h | 1 + llvm/include/llvm/Object/Wasm.h | 2 + llvm/include/llvm/ObjectYAML/WasmYAML.h | 1 + llvm/include/llvm/Support/AMDGPUMetadata.h | 15 + llvm/include/llvm/Support/Threading.h | 3 +- llvm/include/llvm/Transforms/Scalar.h | 7 + .../llvm/Transforms/Scalar/WarnMissedTransforms.h | 38 + llvm/include/llvm/Transforms/Utils/LoopUtils.h | 71 + llvm/include/llvm/Transforms/Utils/UnrollLoop.h | 23 +- .../Vectorize/LoopVectorizationLegality.h | 7 +- llvm/lib/Analysis/LoopInfo.cpp | 18 +- llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 6 - llvm/lib/Analysis/ProfileSummaryInfo.cpp | 9 +- llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp | 324 +++++ llvm/lib/BinaryFormat/CMakeLists.txt | 1 + llvm/lib/CodeGen/GlobalISel/Combiner.cpp | 12 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 5 +- llvm/lib/CodeGen/GlobalISel/Legalizer.cpp | 17 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 23 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 45 +- .../lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 12 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 104 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 61 + llvm/lib/DebugInfo/DWARF/DWARFDie.cpp | 67 +- llvm/lib/IR/ConstantFold.cpp | 2 +- llvm/lib/Object/WasmObjectFile.cpp | 6 + llvm/lib/ObjectYAML/WasmYAML.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 2 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Support/Windows/Path.inc | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 5 + .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 68 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 63 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 2 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 576 +++++++- llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 108 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 24 +- llvm/lib/Target/AMDGPU/AMDGPUPTNote.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 4 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 32 +- llvm/lib/Target/AMDGPU/BUFInstructions.td | 41 + llvm/lib/Target/AMDGPU/LLVMBuild.txt | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 157 ++- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 28 +- llvm/lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt | 2 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 680 +++++---- .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 124 ++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 57 + llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 6 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 43 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 18 + llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 27 +- llvm/lib/Target/ARM/ARMLegalizerInfo.cpp | 6 +- .../lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 22 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 20 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 24 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h | 3 - llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 7 +- llvm/lib/Target/PowerPC/PPCInstrInfo.td | 7 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfoD.td | 16 + llvm/lib/Target/RISCV/RISCVInstrInfoF.td | 16 + llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 66 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 86 +- llvm/lib/Target/X86/X86InstrArithmetic.td | 6 +- llvm/lib/Target/X86/X86InstrCompiler.td | 15 + llvm/lib/Target/X86/X86InstrInfo.cpp | 25 +- llvm/lib/Target/X86/X86InstrInfo.h | 4 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 4 + .../Transforms/InstCombine/InstCombineCompares.cpp | 8 +- .../Instrumentation/AddressSanitizer.cpp | 8 +- .../Instrumentation/HWAddressSanitizer.cpp | 4 +- llvm/lib/Transforms/Scalar/CMakeLists.txt | 1 + llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 50 +- .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 77 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 41 +- llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp | 5 + llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp | 46 +- llvm/lib/Transforms/Scalar/Scalar.cpp | 1 + .../lib/Transforms/Scalar/WarnMissedTransforms.cpp | 144 ++ llvm/lib/Transforms/Utils/LoopUnroll.cpp | 7 +- llvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp | 15 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 35 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 288 +++- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 73 +- llvm/test/CodeGen/AArch64/arm64-memcpy-inline.ll | 12 +- llvm/test/CodeGen/AArch64/cmp-to-cmn.ll | 399 ++++++ .../CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 14 +- .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 14 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir | 14 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 31 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 31 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 17 +- .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 13 +- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 23 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 10 +- .../AMDGPU/GlobalISel/regbankselect-anyext.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-bswap.mir | 31 + .../GlobalISel/regbankselect-ctlz-zero-undef.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-ctlz.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-ctpop.mir | 31 + .../GlobalISel/regbankselect-cttz-zero-undef.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-cttz.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-ptrtoint.mir | 31 + .../AMDGPU/GlobalISel/regbankselect-sext.mir | 31 + .../AMDGPU/annotate-kernel-features-hsa-call.ll | 50 +- .../AMDGPU/attr-amdgpu-flat-work-group-size-v3.ll | 145 ++ llvm/test/CodeGen/AMDGPU/code-object-v3.ll | 5 +- llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 6 +- llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll | 3 +- .../AMDGPU/hsa-metadata-deduce-ro-arg-v3.ll | 33 + .../AMDGPU/hsa-metadata-enqueu-kernel-v3.ll | 101 ++ .../AMDGPU/hsa-metadata-from-llvm-ir-full-v3.ll | 1453 ++++++++++++++++++++ .../CodeGen/AMDGPU/hsa-metadata-hidden-args-v3.ll | 72 + llvm/test/CodeGen/AMDGPU/hsa-metadata-images-v3.ll | 95 ++ .../hsa-metadata-invalid-ocl-version-1-v3.ll | 11 + .../hsa-metadata-invalid-ocl-version-2-v3.ll | 12 + .../hsa-metadata-invalid-ocl-version-3-v3.ll | 12 + .../AMDGPU/hsa-metadata-kernel-code-props-v3.ll | 146 ++ llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 6 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll | 30 + .../CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll | 65 +- .../CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll | 114 ++ llvm/test/CodeGen/AMDGPU/merge-stores.ll | 25 +- .../AMDGPU/optimize-negated-cond-exec-masking.mir | 465 +++++++ llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll | 75 + llvm/test/CodeGen/AMDGPU/store-global.ll | 3 +- llvm/test/CodeGen/AMDGPU/store-v3i64.ll | 3 +- .../AMDGPU/uniform-work-group-attribute-missing.ll | 18 + .../uniform-work-group-nested-function-calls.ll | 24 + ...orm-work-group-prevent-attribute-propagation.ll | 25 + .../uniform-work-group-propagate-attribute.ll | 33 + .../AMDGPU/uniform-work-group-recursion-test.ll | 37 + .../test/CodeGen/AMDGPU/uniform-work-group-test.ll | 35 + .../CodeGen/ARM/GlobalISel/arm-legalize-exts.mir | 79 ++ .../CodeGen/ARM/GlobalISel/thumb-select-exts.mir | 288 ++++ llvm/test/CodeGen/ARM/memcpy-inline.ll | 7 +- llvm/test/CodeGen/ARM/memcpy-ldm-stm.ll | 14 +- llvm/test/CodeGen/NVPTX/nofunc.ll | 15 + llvm/test/CodeGen/PowerPC/jaggedstructs.ll | 6 +- llvm/test/CodeGen/PowerPC/sj-ctr-loop.ll | 2 +- llvm/test/CodeGen/PowerPC/sjlj.ll | 23 +- llvm/test/CodeGen/PowerPC/structsinmem.ll | 3 +- llvm/test/CodeGen/PowerPC/structsinregs.ll | 3 +- llvm/test/CodeGen/RISCV/alu32.ll | 6 +- llvm/test/CodeGen/RISCV/double-arith.ll | 119 ++ llvm/test/CodeGen/RISCV/double-intrinsics.ll | 120 +- llvm/test/CodeGen/RISCV/float-arith.ll | 79 ++ llvm/test/CodeGen/RISCV/float-intrinsics.ll | 104 +- llvm/test/CodeGen/SystemZ/vec-trunc-to-i1.ll | 22 +- llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll | 5 +- .../CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 5 +- llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll | 4 +- llvm/test/CodeGen/X86/bmi2-x86_64.ll | 8 +- llvm/test/CodeGen/X86/bmi2.ll | 12 +- .../CodeGen/X86/copysign-constant-magnitude.ll | 8 +- llvm/test/CodeGen/X86/fixup-bw-copy.ll | 3 +- llvm/test/CodeGen/X86/fshr.ll | 4 +- llvm/test/CodeGen/X86/i128-mul.ll | 502 +++---- llvm/test/CodeGen/X86/iabs.ll | 6 +- llvm/test/CodeGen/X86/known-bits-vector.ll | 8 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 28 +- llvm/test/CodeGen/X86/memcpy-from-string.ll | 3 +- llvm/test/CodeGen/X86/memset-2.ll | 3 +- llvm/test/CodeGen/X86/memset-zero.ll | 42 +- llvm/test/CodeGen/X86/mul-constant-i8.ll | 4 +- llvm/test/CodeGen/X86/mulx32.ll | 8 +- llvm/test/CodeGen/X86/mulx64.ll | 8 +- llvm/test/CodeGen/X86/popcnt.ll | 4 +- llvm/test/CodeGen/X86/pr23664.ll | 4 +- llvm/test/CodeGen/X86/pr35636.ll | 20 +- llvm/test/CodeGen/X86/pr35972.ll | 1 + llvm/test/CodeGen/X86/rotate4.ll | 4 +- llvm/test/CodeGen/X86/scheduler-backtracking.ll | 69 +- llvm/test/CodeGen/X86/select.ll | 46 +- llvm/test/CodeGen/X86/shl-crash-on-legalize.ll | 1 + llvm/test/CodeGen/X86/stack-folding-bmi2.ll | 14 - llvm/test/CodeGen/X86/stack-folding-bmi2.mir | 103 ++ llvm/test/CodeGen/X86/unaligned-load.ll | 73 +- llvm/test/CodeGen/X86/vector-compare-any_of.ll | 175 ++- llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll | 15 +- .../AddressSanitizer/do-not-touch-odr-global.ll | 2 + .../AddressSanitizer/global_metadata.ll | 2 +- .../AddressSanitizer/local_alias.ll | 11 +- .../AddressSanitizer/odr-check-ignore.ll | 17 + .../AddressSanitizer/win-string-literal.ll | 2 +- .../Instrumentation/HWAddressSanitizer/prologue.ll | 4 +- llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s | 96 ++ llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s | 67 + .../MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s | 42 + llvm/test/MC/AMDGPU/hsa-v3.s | 56 + llvm/test/MC/WebAssembly/dwarfdump.ll | 4 +- llvm/test/ObjectYAML/wasm/dylink_section.yaml | 4 + llvm/test/Other/new-pm-defaults.ll | 1 + llvm/test/Other/new-pm-thinlto-defaults.ll | 1 + llvm/test/Other/opt-O2-pipeline.ll | 4 + llvm/test/Other/opt-O3-pipeline.ll | 4 + llvm/test/Other/opt-Os-pipeline.ll | 4 + llvm/test/Other/opt-hot-cold-split.ll | 4 + .../Transforms/AggressiveInstCombine/rotate.ll | 191 +++ .../Transforms/CodeGenPrepare/section-samplepgo.ll | 29 + .../Transforms/CorrelatedValuePropagation/deopt.ll | 142 ++ llvm/test/Transforms/InstCombine/pr39908.ll | 49 + llvm/test/Transforms/LoopDeletion/diundef.ll | 75 + .../Transforms/LoopDistribute/disable_nonforced.ll | 50 + .../LoopDistribute/disable_nonforced_enable.ll | 51 + llvm/test/Transforms/LoopDistribute/followup.ll | 66 + .../distribution-remarks-missed.ll | 99 ++ .../unrollandjam-remarks-missed.ll | 99 ++ .../unrolling-remarks-missed.ll | 99 ++ .../vectorization-remarks-missed.ll | 113 ++ .../Transforms/LoopUnroll/disable_nonforced.ll | 29 + .../LoopUnroll/disable_nonforced_count.ll | 30 + .../LoopUnroll/disable_nonforced_enable.ll | 30 + .../LoopUnroll/disable_nonforced_full.ll | 32 + llvm/test/Transforms/LoopUnroll/followup.ll | 63 + .../LoopUnrollAndJam/disable_nonforced.ll | 50 + .../LoopUnrollAndJam/disable_nonforced_count.ll | 52 + .../LoopUnrollAndJam/disable_nonforced_enable.ll | 52 + llvm/test/Transforms/LoopUnrollAndJam/followup.ll | 66 + llvm/test/Transforms/LoopUnrollAndJam/pragma.ll | 2 +- .../X86/vectorization-remarks-missed.ll | 15 +- .../Transforms/LoopVectorize/disable_nonforced.ll | 29 + .../LoopVectorize/disable_nonforced_enable.ll | 29 + llvm/test/Transforms/LoopVectorize/followup.ll | 43 + .../Transforms/LoopVectorize/no_array_bounds.ll | 6 +- llvm/test/Transforms/LoopVectorize/no_switch.ll | 12 +- .../MemCpyOpt/memset-memcpy-oversized.ll | 8 +- llvm/test/Transforms/PhaseOrdering/rotate.ll | 49 + llvm/test/Transforms/SCCP/apint-bigint2.ll | 12 +- .../tools/llvm-dwarfdump/X86/prettyprint_types.s | 238 ++++ llvm/tools/llvm-objcopy/ELF/Object.h | 12 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 75 +- llvm/tools/obj2yaml/wasm2yaml.cpp | 1 + llvm/tools/yaml2obj/yaml2wasm.cpp | 4 + .../CodeGen/GlobalISel/LegalizerHelperTest.cpp | 3 +- llvm/utils/gn/build/BUILD.gn | 4 +- llvm/utils/gn/build/libs/xml/BUILD.gn | 2 +- llvm/utils/gn/secondary/BUILD.gn | 2 +- llvm/utils/gn/secondary/lld/COFF/BUILD.gn | 44 + llvm/utils/gn/secondary/lld/Common/BUILD.gn | 28 + llvm/utils/gn/secondary/lld/ELF/BUILD.gn | 64 + llvm/utils/gn/secondary/lld/MinGW/BUILD.gn | 21 + .../gn/secondary/lld/include/lld/Common/BUILD.gn | 26 + llvm/utils/gn/secondary/lld/lib/Core/BUILD.gn | 20 + llvm/utils/gn/secondary/lld/lib/Driver/BUILD.gn | 24 + .../gn/secondary/lld/lib/ReaderWriter/BUILD.gn | 17 + .../secondary/lld/lib/ReaderWriter/MachO/BUILD.gn | 33 + .../secondary/lld/lib/ReaderWriter/YAML/BUILD.gn | 11 + llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn | 16 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 32 + .../secondary/llvm/lib/Transforms/Scalar/BUILD.gn | 1 + openmp/runtime/test/api/omp_in_parallel.c | 5 + openmp/runtime/test/flush/omp_flush.c | 5 + openmp/runtime/test/ompt/misc/api_calls_places.c | 2 +- openmp/runtime/test/parallel/omp_nested.c | 2 + openmp/runtime/test/tasking/omp_task.c | 3 + openmp/runtime/test/tasking/omp_taskyield.c | 3 + .../worksharing/for/kmp_sch_simd_runtime_api.c | 3 +- .../worksharing/for/kmp_sch_simd_runtime_guided.c | 3 +- .../worksharing/for/kmp_sch_simd_runtime_static.c | 3 +- openmp/runtime/test/worksharing/for/omp_doacross.c | 2 + 428 files changed, 14365 insertions(+), 2624 deletions(-) rename clang/test/Analysis/{debug-CallGraph.c => debug-CallGraph.cpp} (76%) create mode 100644 clang/test/CodeGen/asan-static-odr.cpp create mode 100644 clang/test/CodeGenCXX/inalloca-lambda.cpp create mode 100644 clang/test/CodeGenOpenCLCXX/addrspace-of-this.cl create mode 100644 clang/test/Driver/embed-bitcode.s create mode 100644 clang/test/Import/call-expr/Inputs/F.cpp create mode 100644 clang/test/Import/call-expr/test.cpp create mode 100644 compiler-rt/test/asan/TestCases/Linux/odr_indicators.cc create mode 100644 compiler-rt/test/hwasan/TestCases/cfi.cc create mode 100644 compiler-rt/test/sanitizer_common/TestCases/NetBSD/cdb.cc create mode 100644 compiler-rt/test/sanitizer_common/TestCases/NetBSD/vis.cc copy libcxx/test/{std/depr/depr.c.headers/uchar_h.pass.cpp => libcxx/containers/se [...] copy libcxx/test/{std/depr/depr.c.headers/uchar_h.pass.cpp => libcxx/containers/se [...] rename lldb/lit/Modules/{ => ELF}/build-id-case.yaml (96%) rename lldb/lit/Modules/{ => ELF}/compressed-sections.yaml (92%) rename lldb/lit/Modules/{elf-duplicate-section.yaml => ELF/duplicate-section.yaml} (100%) rename lldb/lit/Modules/{elf-many-sections.s => ELF/many-sections.s} (100%) rename lldb/lit/Modules/{elf-section-types.yaml => ELF/section-types.yaml} (56%) rename lldb/lit/Modules/{ => ELF}/short-build-id.yaml (100%) rename lldb/lit/Modules/{ => MachO}/lc_build_version.yaml (100%) rename lldb/lit/Modules/{ => MachO}/lc_build_version_notools.yaml (100%) rename lldb/lit/Modules/{ => MachO}/lc_version_min.yaml (100%) create mode 100644 llvm/docs/TransformMetadata.rst create mode 100644 llvm/include/llvm/BinaryFormat/AMDGPUMetadataVerifier.h create mode 100644 llvm/include/llvm/Transforms/Scalar/WarnMissedTransforms.h create mode 100644 llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp create mode 100644 llvm/lib/Transforms/Scalar/WarnMissedTransforms.cpp create mode 100644 llvm/test/CodeGen/AArch64/cmp-to-cmn.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bswap.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-undef.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-undef.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir create mode 100644 llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-deduce-ro-arg-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueu-kernel-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-images-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-2-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll create mode 100644 llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir create mode 100644 llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll create mode 100644 llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll create mode 100644 llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll create mode 100644 llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-p [...] create mode 100644 llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll create mode 100644 llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll create mode 100644 llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll create mode 100644 llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-exts.mir create mode 100644 llvm/test/CodeGen/ARM/GlobalISel/thumb-select-exts.mir create mode 100644 llvm/test/CodeGen/NVPTX/nofunc.ll create mode 100644 llvm/test/CodeGen/X86/stack-folding-bmi2.mir create mode 100644 llvm/test/Instrumentation/AddressSanitizer/odr-check-ignore.ll create mode 100644 llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s create mode 100644 llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s create mode 100644 llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s create mode 100644 llvm/test/Transforms/AggressiveInstCombine/rotate.ll create mode 100644 llvm/test/Transforms/CorrelatedValuePropagation/deopt.ll create mode 100644 llvm/test/Transforms/InstCombine/pr39908.ll create mode 100644 llvm/test/Transforms/LoopDeletion/diundef.ll create mode 100644 llvm/test/Transforms/LoopDistribute/disable_nonforced.ll create mode 100644 llvm/test/Transforms/LoopDistribute/disable_nonforced_enable.ll create mode 100644 llvm/test/Transforms/LoopDistribute/followup.ll create mode 100644 llvm/test/Transforms/LoopTransformWarning/distribution-remarks- [...] create mode 100644 llvm/test/Transforms/LoopTransformWarning/unrollandjam-remarks- [...] create mode 100644 llvm/test/Transforms/LoopTransformWarning/unrolling-remarks-missed.ll create mode 100644 llvm/test/Transforms/LoopTransformWarning/vectorization-remarks [...] create mode 100644 llvm/test/Transforms/LoopUnroll/disable_nonforced.ll create mode 100644 llvm/test/Transforms/LoopUnroll/disable_nonforced_count.ll create mode 100644 llvm/test/Transforms/LoopUnroll/disable_nonforced_enable.ll create mode 100644 llvm/test/Transforms/LoopUnroll/disable_nonforced_full.ll create mode 100644 llvm/test/Transforms/LoopUnroll/followup.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/disable_nonforced.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/disable_nonforced_count.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/disable_nonforced_enable.ll create mode 100644 llvm/test/Transforms/LoopUnrollAndJam/followup.ll create mode 100644 llvm/test/Transforms/LoopVectorize/disable_nonforced.ll create mode 100644 llvm/test/Transforms/LoopVectorize/disable_nonforced_enable.ll create mode 100644 llvm/test/Transforms/LoopVectorize/followup.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/rotate.ll create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s create mode 100644 llvm/utils/gn/secondary/lld/COFF/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/Common/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/ELF/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/MinGW/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/include/lld/Common/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/lib/Core/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/lib/Driver/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/lib/ReaderWriter/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/lib/ReaderWriter/MachO/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/lib/ReaderWriter/YAML/BUILD.gn create mode 100644 llvm/utils/gn/secondary/lld/tools/lld/BUILD.gn create mode 100644 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7 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (b35c294be -> 817d65cd5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards b35c294be llvm-444a108ec5b624098681460ff351ca0eaf0cec96: 18987 new 817d65cd5 llvm-7eed46bcf765ecba62e47e772726431b91bae988: 18987 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b35c294be) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-m [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 124 +- 2-build_llvm/console.log | 9109 ++++++++++++++++----------------- 2-build_llvm/revision | 2 +- 3-count_linux_objs/console.log | 1351 ++--- console.log | 10552 ++++++++++++++++++++------------------- distance-to-baseline | 2 +- jenkins/build-name | 2 +- jenkins/manifest.sh | 4 +- trigger-bisect-on-failure | 4 +- 9 files changed, 10615 insertions(+), 10535 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[llvm] branch master updated (82ad560a7e4 -> 77a2bc81a9b)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 82ad560a7e4 revert rL349051: [DAGCombiner] after simplifying demanded e [...] new 77a2bc81a9b [X86][SSE] Add SSE vector imm/var shift support to Simplify [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/X86/X86ISelLowering.cpp | 15 +++++++++ test/CodeGen/X86/known-signbits-vector.ll | 8 ++--- test/CodeGen/X86/packss.ll | 52 ++++++++++++------------------- test/CodeGen/X86/vector-idiv-v2i32.ll | 48 ++++++++++++++-------------- test/CodeGen/X86/vector-reduce-smax.ll | 27 +++++++--------- test/CodeGen/X86/vector-reduce-smin.ll | 27 +++++++--------- 6 files changed, 84 insertions(+), 93 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[glibc] branch master updated (f21e8f8ca4 -> ade8b817fe)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from f21e8f8ca4 Fix rwlock stall with PREFER_WRITER_NONRECURSIVE_NP (bug 23861) new ade8b817fe x86: Add Hygon Dhyana support. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 5 +++++ sysdeps/x86/cpu-features.c | 5 +++-- 2 files changed, 8 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[llvm] branch master updated (0de7068d4e7 -> 82ad560a7e4)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 0de7068d4e7 Recommit r349041: [tblgen][disasm] Separate encodings from [...] new 82ad560a7e4 revert rL349051: [DAGCombiner] after simplifying demanded e [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 +------ test/CodeGen/X86/extractelement-load.ll | 3 ++- test/CodeGen/X86/insertps-combine.ll | 5 +++-- test/CodeGen/X86/masked_load.ll | 2 +- test/CodeGen/X86/masked_store.ll | 2 +- test/CodeGen/X86/shrink_vmul-widen.ll | 6 ++++++ test/CodeGen/X86/vec_extract-sse4.ll | 8 ++++++-- test/CodeGen/X86/vector-reduce-mul-widen.ll | 2 ++ test/CodeGen/X86/vector-reduce-mul.ll | 10 +++++++++- 9 files changed, 31 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[binutils-gdb] branch master updated (fe554d200d -> 0903806253)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from fe554d200d Automatic date update in version.in new 0903806253 Move aarch64 CIE code to aarch64 backend The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/ChangeLog | 4 ++++ binutils/dwarf.c | 2 ++ gas/ChangeLog | 14 ++++++++++++++ gas/config/tc-aarch64.h | 37 +++++++++++++++++++++++++++++++++++++ gas/dw2gencfi.c | 22 ++++++++++++++++------ gas/dw2gencfi.h | 10 +++------- 6 files changed, 76 insertions(+), 13 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[llvm] branch master updated (d2cb9435c71 -> 0de7068d4e7)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from d2cb9435c71 [X86][SSE] Fix all remaining modulo vector rotation amounts [...] new 0de7068d4e7 Recommit r349041: [tblgen][disasm] Separate encodings from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: utils/TableGen/FixedLenDecoderEmitter.cpp | 88 ++++++++++++++++++------------- 1 file changed, 51 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig updated (cf0adaf68f3 -> b4cd9edf00f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig in repository toolchain/gcc. from cf0adaf68f3 2018-12-11 Steven G. Kargl <kargl(a)gcc.gnu.org> adds 3beb7a76985 gcc/ Backport from mainline 2018-12-07 Peter Bergner <b [...] adds 65152aad633 Daily bump. adds c56359a3cbf Backport from mainline 2018-12-11 Eric Botcazou <ebotca [...] adds 90366472018 S/390: Use VEC_INEXACT/VEC_NOINEXACT instead of magic numbers. adds b4cd9edf00f S/390: Fix zvector vec_double builtin No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 42 +++++++++++++++++++++- gcc/DATESTAMP | 2 +- gcc/config/rs6000/rs6000.c | 10 +++++- gcc/config/rs6000/vxworks.h | 13 ++++++- gcc/config/s390/s390-builtins.def | 4 +-- gcc/config/s390/vx-builtins.md | 12 +++---- gcc/doc/invoke.texi | 12 ++++--- gcc/testsuite/ChangeLog | 19 ++++++++++ .../gcc.target/powerpc/{pr87496.c => pr87496-1.c} | 2 +- gcc/testsuite/gcc.target/powerpc/pr87496-2.c | 9 +++++ gcc/testsuite/gcc.target/powerpc/pr87496-3.c | 8 +++++ .../gcc.target/s390/zvector/vec-double-1.c | 12 +++++++ .../gcc.target/s390/zvector/vec-double-2.c | 12 +++++++ 13 files changed, 140 insertions(+), 17 deletions(-) rename gcc/testsuite/gcc.target/powerpc/{pr87496.c => pr87496-1.c} (94%) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr87496-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr87496-3.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-double-1.c create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-double-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig updated (109b1c7c2 -> e90f6d553)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 109b1c7c2 gcc-cf0adaf68f3d1b3d5817818e77586bf1618c6fd2: all new e90f6d553 gcc-b4cd9edf00ff4e549ce257e7a5fd7cb6162d75d9: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (109b1c7c2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 1-reset_artifacts/console.log | 64 +- 2-prepare_abe/console.log | 2 + 3-build_abe-binutils/console.log | 3438 ++++++++--------- 4-build_abe-stage1/console.log | 4297 ++++++++++----------- 4-build_abe-stage1/revision | 2 +- 5-count_linux_objs/console.log | 137 +- console.log | 7854 +++++++++++++++++++------------------- distance-to-baseline | 2 +- jenkins/build-name | 2 +- jenkins/manifest.sh | 4 +- trigger-bisect-on-failure | 4 +- 11 files changed, 8069 insertions(+), 7737 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

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Tcwg-commits December 2018