Tcwg-commits December 2018

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13285 discussions

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig updated (884b49e3a9 -> 67bb16f345)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allmodconfig in repository toolchain/binutils-gdb. from 884b49e3a9 opcodes/riscv: Hide '.L0 ' fake symbols adds 7fb45a6895 sim/opcodes: Allow use of out of tree cgen source directory adds 23ebf37881 sim/cris: Fix references to cgen cpu directory adds bb6bf75e7a PowerPC @l, @h and @ha warnings, plus VLE e_li adds 9da0a9988d gold: Provide more failed archive member info in error message adds 67bb16f345 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 ++++ bfd/elf32-ppc.c | 28 +++++++++++----- bfd/version.h | 2 +- gas/ChangeLog | 6 ++++ gas/config/tc-ppc.c | 88 ++++++++++++++++++++++++++++++------------------- gold/ChangeLog | 5 +++ gold/archive.cc | 13 ++++++-- include/ChangeLog | 4 +++ include/opcode/ppc.h | 5 +++ opcodes/ChangeLog | 6 ++++ opcodes/configure | 14 +++++--- opcodes/configure.ac | 14 +++++--- sim/ChangeLog | 12 +++++++ sim/common/acinclude.m4 | 16 ++++++--- sim/cris/ChangeLog | 5 +++ sim/cris/Makefile.in | 18 +++++----- sim/cris/configure | 16 ++++++--- sim/frv/configure | 16 ++++++--- sim/iq2000/configure | 16 ++++++--- sim/lm32/configure | 16 ++++++--- sim/m32r/configure | 16 ++++++--- sim/or1k/configure | 16 ++++++--- sim/sh64/configure | 16 ++++++--- 23 files changed, 253 insertions(+), 102 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig updated (884b49e3a9 -> 67bb16f345)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allyesconfig in repository toolchain/binutils-gdb. from 884b49e3a9 opcodes/riscv: Hide '.L0 ' fake symbols adds 7fb45a6895 sim/opcodes: Allow use of out of tree cgen source directory adds 23ebf37881 sim/cris: Fix references to cgen cpu directory adds bb6bf75e7a PowerPC @l, @h and @ha warnings, plus VLE e_li adds 9da0a9988d gold: Provide more failed archive member info in error message adds 67bb16f345 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 ++++ bfd/elf32-ppc.c | 28 +++++++++++----- bfd/version.h | 2 +- gas/ChangeLog | 6 ++++ gas/config/tc-ppc.c | 88 ++++++++++++++++++++++++++++++------------------- gold/ChangeLog | 5 +++ gold/archive.cc | 13 ++++++-- include/ChangeLog | 4 +++ include/opcode/ppc.h | 5 +++ opcodes/ChangeLog | 6 ++++ opcodes/configure | 14 +++++--- opcodes/configure.ac | 14 +++++--- sim/ChangeLog | 12 +++++++ sim/common/acinclude.m4 | 16 ++++++--- sim/cris/ChangeLog | 5 +++ sim/cris/Makefile.in | 18 +++++----- sim/cris/configure | 16 ++++++--- sim/frv/configure | 16 ++++++--- sim/iq2000/configure | 16 ++++++--- sim/lm32/configure | 16 ++++++--- sim/m32r/configure | 16 ++++++--- sim/or1k/configure | 16 ++++++--- sim/sh64/configure | 16 ++++++--- 23 files changed, 253 insertions(+), 102 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[binutils-gdb] branch master updated (67bb16f345 -> af03af8f55)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 67bb16f345 Automatic date update in version.in new af03af8f55 Synchronize libiberty with gcc and add --no-recruse-limit op [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/ChangeLog | 34 ++++ binutils/NEWS | 11 ++ binutils/addr2line.c | 19 +- binutils/cxxfilt.c | 14 +- binutils/doc/binutils.texi | 89 ++++++++- binutils/nm.c | 27 ++- binutils/objdump.c | 22 ++- binutils/prdbg.c | 6 +- binutils/stabs.c | 10 +- binutils/testsuite/binutils-all/cxxfilt.exp | 44 +++++ binutils/testsuite/config/default.exp | 6 + include/ChangeLog | 5 + include/demangle.h | 14 ++ libiberty/ChangeLog | 65 +++++++ libiberty/config.in | 3 + libiberty/configure | 4 +- libiberty/configure.ac | 4 +- libiberty/cp-demangle.c | 68 +++++-- libiberty/cp-demangle.h | 3 + libiberty/cplus-dem.c | 40 ++++- libiberty/pex-unix.c | 268 ++++++++++++++++------------ 21 files changed, 607 insertions(+), 149 deletions(-) create mode 100644 binutils/testsuite/binutils-all/cxxfilt.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (884b49e3a9 -> 67bb16f345)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/binutils-gdb. from 884b49e3a9 opcodes/riscv: Hide '.L0 ' fake symbols adds 7fb45a6895 sim/opcodes: Allow use of out of tree cgen source directory adds 23ebf37881 sim/cris: Fix references to cgen cpu directory adds bb6bf75e7a PowerPC @l, @h and @ha warnings, plus VLE e_li adds 9da0a9988d gold: Provide more failed archive member info in error message adds 67bb16f345 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 ++++ bfd/elf32-ppc.c | 28 +++++++++++----- bfd/version.h | 2 +- gas/ChangeLog | 6 ++++ gas/config/tc-ppc.c | 88 ++++++++++++++++++++++++++++++------------------- gold/ChangeLog | 5 +++ gold/archive.cc | 13 ++++++-- include/ChangeLog | 4 +++ include/opcode/ppc.h | 5 +++ opcodes/ChangeLog | 6 ++++ opcodes/configure | 14 +++++--- opcodes/configure.ac | 14 +++++--- sim/ChangeLog | 12 +++++++ sim/common/acinclude.m4 | 16 ++++++--- sim/cris/ChangeLog | 5 +++ sim/cris/Makefile.in | 18 +++++----- sim/cris/configure | 16 ++++++--- sim/frv/configure | 16 ++++++--- sim/iq2000/configure | 16 ++++++--- sim/lm32/configure | 16 ++++++--- sim/m32r/configure | 16 ++++++--- sim/or1k/configure | 16 ++++++--- sim/sh64/configure | 16 ++++++--- 23 files changed, 253 insertions(+), 102 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[clang-tools-extra] branch master updated (23aa1f10 -> 7d024cb8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang-tools-extra. from 23aa1f10 [clangd] Remove the test that sometimes deadlocks new 7d024cb8 [clang-tidy] Remove duplicated getText implementation, NFC The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tidy/readability/RedundantStringCStrCheck.cpp | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig updated (884b49e3a9 -> 67bb16f345)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allyesconfig in repository toolchain/binutils-gdb. from 884b49e3a9 opcodes/riscv: Hide '.L0 ' fake symbols adds 7fb45a6895 sim/opcodes: Allow use of out of tree cgen source directory adds 23ebf37881 sim/cris: Fix references to cgen cpu directory adds bb6bf75e7a PowerPC @l, @h and @ha warnings, plus VLE e_li adds 9da0a9988d gold: Provide more failed archive member info in error message adds 67bb16f345 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 7 ++++ bfd/elf32-ppc.c | 28 +++++++++++----- bfd/version.h | 2 +- gas/ChangeLog | 6 ++++ gas/config/tc-ppc.c | 88 ++++++++++++++++++++++++++++++------------------- gold/ChangeLog | 5 +++ gold/archive.cc | 13 ++++++-- include/ChangeLog | 4 +++ include/opcode/ppc.h | 5 +++ opcodes/ChangeLog | 6 ++++ opcodes/configure | 14 +++++--- opcodes/configure.ac | 14 +++++--- sim/ChangeLog | 12 +++++++ sim/common/acinclude.m4 | 16 ++++++--- sim/cris/ChangeLog | 5 +++ sim/cris/Makefile.in | 18 +++++----- sim/cris/configure | 16 ++++++--- sim/frv/configure | 16 ++++++--- sim/iq2000/configure | 16 ++++++--- sim/lm32/configure | 16 ++++++--- sim/m32r/configure | 16 ++++++--- sim/or1k/configure | 16 ++++++--- sim/sh64/configure | 16 ++++++--- 23 files changed, 253 insertions(+), 102 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig updated (bf9201ee0e -> 384d2d7eee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allmodconfig in repository toolchain/binutils-gdb. from bf9201ee0e Automatic date update in version.in adds 384d2d7eee Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[llvm] branch master updated (a4079af794a -> ddbf742258f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from a4079af794a [yaml2obj] format some codes NFC. new ddbf742258f Fix gcc7.3 -Wparentheses warning. NFCI. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/Hexagon/HexagonInstrInfo.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[clang] branch master updated (f09e30f7cc -> 4989c6df62)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from f09e30f7cc [PowerPC] VSX register support for inline assembly new 4989c6df62 Add a AArch64 triple to tiny codemodel test. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/CodeGen/codemodels.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 11 months

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (b7c57d7fca1 -> 63a2b595e51)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-monorepo. from b7c57d7fca1 [X86][NFC] Convert memcpy/memset tests to update_llc_test_checks. adds 13cf0050716 [clangd] Update the test code adds 3319a0c0671 Make scripts/analyzer-project-deps compatible with python3 adds 9fea0eb4f2d [LLD][ELF] - Use auto. NFC. adds d934b4de315 Add new `__sanitizer_mz_default_zone()` API which returns t [...] adds edafd590f29 [ARM][NFC] Added extra arm-cgp test adds 5cb89f440f6 Test commit: Removed trailing space in .txt file. adds dd1177cebd3 Revert "[LoopSimplifyCFG] Delete dead in-loop blocks" adds 9a5378b57cc [libcxx] Make return value of array<T, 0>.data() checked on [...] adds 4065b474dbb Fix -Wcovered-switch-default warning. NFCI. adds b372959df13 [AMDGPU] Partial revert of rL348371: Turn on the DPP combin [...] adds 243165fea34 AMDGPU: Generate VALU ThreeOp Integer instructions adds c3a299be725 [ARM][NFC] Adding another test for armcgp adds 9cfcbfc12c1 [clangd] Remove the test that sometimes deadlocks adds c4192ee6304 [OPENMP][NVPTX]Fix __kmpc_flush to flush the memory per sys [...] adds efb0450d8b9 [OPENMP][NVPTX] Fix globalization of the mapped array sections. adds 3b984cb3600 [NFC][AArch64] Split out backend features adds 6c1f3694376 DAGCombiner::visitINSERT_VECTOR_ELT - pull out repeated VT. [...] adds 21d2d99fcf1 [DEBUGINFO, NVPTX]Emit last debugging directives. adds 158c6181483 [GVN] Don't perform scalar PRE on GEPs adds 91f88917a32 [DEBUGINFO, NVPTX] Disable emission of ',debug' option if o [...] adds c957dfc721a [X86] Refactored IsSplatVector to use switch. NFCI. adds a4025d35633 Support skewed stream arrays. adds 2b18f684465 [Sanitizer] getmntinfo support in FreeBSD adds 284c050543f [DAGCombiner] refactor function that hoists bitwise logic; NFCI adds 106cc7ffa52 Add another ArchSpec unit test. adds 9fb84cdd880 [gn build] Process .def.in files in llvm/Config and add lib [...] adds d40596341c3 [CUDA] Fix nvidia-cuda-toolkit detection on Ubuntu adds ae01a30dc19 [PDB] Move some code around. NFC. adds a8ec6b13c9c [x86] add test for hoistLogicOpWithSameOpcodeHands with ext [...] adds 32f048389f6 [libcxx] Add XFAILs for aligned allocation tests on AppleClang 9 adds bc2d0f22ca2 [DAGCombiner] don't hoist logic op if operands have other uses adds 66d8ae80afc [libcxx] Add checks for unique value of array<T, 0>.begin() [...] adds 5bcec9911b0 [AArch64] Fix Exynos predicate adds 09b9e4d6e31 [build.py] Embed the output file name in generated object f [...] adds 4838c5b35f1 Reapply "Adapt gcov to changes in CFE." adds a9636f1c834 Reapply "Avoid emitting redundant or unusable directories i [...] adds 69926a5978f Fix line endings in build.py adds 7ff69fcdf24 Allow forwarding -fdebug-compilation-dir to cc1as adds 8e243cdda3e [PowerPC] add tests for hoisting bitwise logic; NFC adds e76811b8ad4 Fix Wdocumentation warning. NFCI. adds 584b5996419 [DAGCombiner] don't hoist logic op if operands have other u [...] adds 778f0dfd4bf Fix the Xcode project build for the addition of NativePDB/D [...] adds d6e65ac8632 [libcxx] Fix incorrect XFAILs for chrono tests on old macos [...] adds 94a61ea16fb [OPENMP][NVPTX]Correct type casting for printf args + simpl [...] adds 7f7a66f919c [DagCombiner][X86] Simplify a ConcatVectors of a scalar_to_ [...] adds 6a62eb943f6 [DAGCombiner] reduce indent; NFC adds 82abd0da80c [test] Add missing cmake include for building libFuzzer alone adds d6862bff4e4 [libcxx] Always convert 'use_system_cxx_lib' to an absolute path adds cd6774859ae Implement WindowsDYLD::DidAttach for use with gdb-server attach adds 93f281d789d [pecoff] Implement ObjectFilePECOFF::GetDependedModules() adds 4d6ceeaae2b [libc++] Improve diagnostics for non-const comparators and [...] adds 205292f3184 [x86] add test for vector bitwise-logic-of-bswaps; NFC adds 9a7d1debf71 [analyzer] Fix an infinite recursion bug while checking par [...] adds 0f516a32c55 [attributes] Add an attribute os_consumes_this, with simila [...] adds 862c390d44c [analyzer] Rely on os_consumes_this attribute to signify th [...] adds 75bfa2556ea [DAGCombiner] don't group bswap with casts in logic hoisting fold adds 37a7fd28587 [X86] Directly create ADC/SBB nodes instead of using ADD/SU [...] adds 9f66a2cf804 [gn build] merge r348505. adds 5e89597c4d2 Run `git ls-files '*.gn' '*.gni' | xargs -n 1 gn format`. adds 66dc290b9ef [frontend][darwin] warn_stdlibcxx_not_found: supress warnin [...] adds 3debcabcb13 Use relative line offsets in test adds 1e2737cdbd0 [pecoff] Use PATH_MAX instead of MAX_PATH adds 476cf00dd42 Add more expected content to match in test adds 05fefd8ee18 [lit] Use the build.py script in the case-insensitive test adds ea0c8739376 NFC: Move VisitStmt code to dumpStmt adds c70aa6cc613 NFC: Move VisitExpr code to dumpStmt adds 18024c83a42 [DAGCombiner] more clean up in hoistLogicOpWithSameOpcodeHa [...] adds 970d12d97b5 [BDCE] Add tests for BDCE applied to vector instructions; NFC adds e5cd92a046c [DemandedBits][BDCE] Support vectors of integers adds 2404506e324 [DAGCombiner] don't bother saving a SDLoc for a node that's [...] adds 1b057a4f983 [llvm-tapi] Don't override SequenceTraits for std::string adds 8f8325032b7 [DAGCombiner] use root SDLoc for all nodes created by logic fold adds d1aa9f99180 Add test for InitListExpr adds 3aaf15d81c0 Host: remove Yield on Windows adds aa22524a776 Change the amount of data that Platform::PutFile will try t [...] adds c43f8cda385 Revert "[DemandedBits][BDCE] Support vectors of integers" adds 9838c0a362d Handle detecting exec for DynamicLoaderMacOS with older deb [...] adds 01538af9cba Revert "[llvm-tapi] Don't override SequenceTraits for std::string" adds e6f8150a27f Add SBInitializerOptions.h to the Xcode project. adds 382de1b47bb [CodeExtractor] Store outputs at the first valid insertion point adds af7e15f778d Re-land "[XRay] Move-only Allocator, FunctionCallTrie, and Array" adds 326b6f040f5 [llvm-mca] Improve test (NFC) adds 1d007b2540c [llvm-mca] Improve test (NFC) adds 50e568686df [PowerPC] Fix assert from machine verify pass that missing [...] adds 5de117f6e93 [LoopSimplifyCFG] Do not deal with loops with irreducible C [...] adds f2ec0bebe9a [XRay] Use preallocated memory for XRay profiling adds acd10ee101f Fix thunks returning memptrs via sret by emitting also scal [...] adds 9a7efcd2a21 [PM] Port LoadStoreVectorizer to the new pass manager. adds 8568dbb9bdf [IR] Don't assume all functions are 4 byte aligned adds be7bf234c17 [PowerPC] VSX register support for inline assembly adds 27ab53fd23a [CMake] Add support for NO_INSTALL_RPATH argument in llvm_a [...] adds ac6e2f009c6 [SelectionDAG] Don't pass on DemandedElts when handling SCA [...] adds b30dc5d8290 [X86] Add ivybridge to llvm-exegesis PFM counter mappings new f8aebc844ee [utils] Use operator "in" instead of bound function "has_key" new 63a2b595e51 Fix test/tools/llvm-mca/AArch64/Exynos/direct-branch.s on Mac The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../unittests/clangd/TUSchedulerTests.cpp | 27 -- clang/include/clang/Basic/Attr.td | 14 +- clang/include/clang/Basic/AttrDocs.td | 9 +- .../StaticAnalyzer/Core/RetainSummaryManager.h | 4 + clang/lib/AST/ASTDumper.cpp | 156 ++---- clang/lib/Basic/Targets/PPC.cpp | 30 ++ clang/lib/Basic/Targets/PPC.h | 2 + clang/lib/CodeGen/CGDebugInfo.cpp | 47 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 8 +- clang/lib/CodeGen/CGVTables.cpp | 3 +- clang/lib/CodeGen/CodeGenAction.cpp | 16 +- clang/lib/CodeGen/CodeGenFunction.cpp | 5 +- clang/lib/Driver/ToolChains/Clang.cpp | 3 + clang/lib/Driver/ToolChains/Cuda.cpp | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 8 +- clang/lib/Sema/SemaDeclAttr.cpp | 3 + .../StaticAnalyzer/Core/RetainSummaryManager.cpp | 5 +- clang/test/AST/ast-dump-decl.m | 6 +- clang/test/AST/ast-dump-stmt.cpp | 18 + clang/test/AST/dump.cpp | 24 +- clang/test/Analysis/osobject-retain-release.cpp | 28 ++ clang/test/CodeGen/debug-info-abspath.c | 15 + clang/test/CodeGen/debug-prefix-map.c | 18 +- clang/test/CodeGen/inline-asm-matching-ppc-vsx.c | 20 + clang/test/CodeGenCXX/thunk-returning-memptr.cpp | 27 ++ clang/test/Driver/integrated-as.s | 6 + clang/test/Frontend/warning-stdlibcxx-darwin.cpp | 1 + clang/test/Modules/module-debuginfo-prefix.m | 4 +- clang/test/OpenMP/nvptx_target_codegen.cpp | 71 ++- clang/test/Sema/attr-osobject.cpp | 8 +- compiler-rt/lib/fuzzer/tests/CMakeLists.txt | 2 + .../sanitizer_common_interceptors.inc | 4 + .../lib/sanitizer_common/sanitizer_malloc_mac.inc | 7 + .../sanitizer_platform_interceptors.h | 2 +- compiler-rt/lib/xray/CMakeLists.txt | 2 +- compiler-rt/lib/xray/tests/unit/allocator_test.cc | 22 + .../lib/xray/tests/unit/function_call_trie_test.cc | 30 ++ .../lib/xray/tests/unit/profile_collector_test.cc | 49 +- .../lib/xray/tests/unit/segmented_array_test.cc | 124 +++++ compiler-rt/lib/xray/xray_allocator.h | 96 +++- compiler-rt/lib/xray/xray_function_call_trie.h | 339 ++++++++----- compiler-rt/lib/xray/xray_profile_collector.cc | 241 ++++++---- compiler-rt/lib/xray/xray_profile_collector.h | 26 +- compiler-rt/lib/xray/xray_profiling.cc | 393 ++++++++++----- compiler-rt/lib/xray/xray_profiling_flags.inc | 5 +- compiler-rt/lib/xray/xray_segmented_array.h | 531 +++++++++++++++------ .../TestCases/{NetBSD => Posix}/getmntinfo.cc | 10 + libcxx/docs/UsingLibcxx.rst | 6 +- libcxx/include/__hash_table | 60 +-- libcxx/include/__tree | 30 +- libcxx/include/map | 5 +- libcxx/include/set | 2 + libcxx/include/unordered_map | 8 +- libcxx/include/unordered_set | 2 + .../associative/non_const_comparator.fail.cpp | 3 +- .../containers/unord/non_const_comparator.fail.cpp | 8 +- .../sequences/array/array.data/data.pass.cpp | 8 +- .../sequences/array/array.data/data_const.pass.cpp | 4 +- .../std/containers/sequences/array/begin.pass.cpp | 9 +- .../delete_align_val_t_replace.pass.cpp | 24 +- .../new.delete.array/new_align_val_t.pass.cpp | 24 +- .../new_align_val_t_nothrow.pass.cpp | 24 +- .../new_align_val_t_nothrow_replace.pass.cpp | 24 +- .../delete_align_val_t_replace.pass.cpp | 24 +- .../new.delete.single/new_align_val_t.pass.cpp | 24 +- .../new_align_val_t_nothrow.pass.cpp | 24 +- .../new_align_val_t_nothrow_replace.pass.cpp | 24 +- .../time.clock.hires/consistency.pass.cpp | 7 +- .../time.clock.steady/consistency.pass.cpp | 7 +- .../time.clock.system/consistency.pass.cpp | 7 +- libcxx/utils/libcxx/test/config.py | 1 + lld/COFF/PDB.cpp | 36 +- lld/ELF/ScriptParser.cpp | 2 +- lldb/include/lldb/Host/windows/windows.h | 1 + lldb/lit/Breakpoint/case-insensitive.test | 5 +- lldb/lit/BuildScript/modes.test | 10 +- lldb/lit/BuildScript/toolchain-clang-cl.test | 12 +- lldb/lit/BuildScript/toolchain-msvc.test | 12 +- lldb/lit/Modules/PECOFF/dep-modules.yaml | 170 +++++++ lldb/lit/Modules/PECOFF/export-dllfunc.yaml | 172 +++++++ lldb/lit/Modules/PECOFF/lit.local.cfg | 1 + lldb/lit/helper/build.py | 16 +- lldb/lldb.xcodeproj/project.pbxproj | 10 + lldb/scripts/analyze-project-deps.py | 38 +- .../MacOSX-DYLD/DynamicLoaderMacOS.cpp | 39 +- .../DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h | 6 + .../Windows-DYLD/DynamicLoaderWindowsDYLD.cpp | 36 +- .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 137 +++++- .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.h | 11 + .../Plugins/SymbolFile/NativePDB/CMakeLists.txt | 1 + .../NativePDB/DWARFLocationExpression.cpp | 170 +++++++ .../SymbolFile/NativePDB/DWARFLocationExpression.h | 34 ++ .../Plugins/SymbolFile/NativePDB/PdbIndex.cpp | 7 +- .../Plugins/SymbolFile/NativePDB/PdbUtil.cpp | 120 +++++ lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h | 5 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 248 +--------- lldb/source/Target/Platform.cpp | 2 +- lldb/tools/lldb-test/lldb-test.cpp | 24 +- lldb/unittests/Utility/ArchSpecTest.cpp | 9 +- llvm/cmake/modules/AddLLVM.cmake | 14 +- .../llvm/DebugInfo/CodeView/SymbolRecordHelpers.h | 57 +++ llvm/include/llvm/IR/DiagnosticInfo.h | 17 +- llvm/include/llvm/InitializePasses.h | 2 +- llvm/include/llvm/Support/BinaryStreamArray.h | 20 +- llvm/include/llvm/Support/BinaryStreamReader.h | 5 +- .../Transforms/Vectorize/LoadStoreVectorizer.h | 27 ++ llvm/lib/CodeGen/MachineOutliner.cpp | 2 - llvm/lib/CodeGen/README.txt | 4 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 251 +++++----- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +- llvm/lib/DebugInfo/CodeView/CMakeLists.txt | 3 +- llvm/lib/DebugInfo/CodeView/CVSymbolVisitor.cpp | 2 +- .../lib/DebugInfo/CodeView/SymbolRecordHelpers.cpp | 53 ++ .../lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | 11 +- llvm/lib/IR/ConstantFold.cpp | 9 +- llvm/lib/IR/DiagnosticInfo.cpp | 42 +- llvm/lib/Passes/PassBuilder.cpp | 1 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Target/AArch64/AArch64.td | 100 +++- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 17 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 18 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 77 ++- llvm/lib/Target/AArch64/AArch64Subtarget.h | 51 ++ llvm/lib/Target/AArch64/AArch64SystemOperands.td | 83 +++- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 41 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 47 ++ .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 10 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 3 + llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 21 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 26 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 76 ++- llvm/lib/Target/X86/X86InstrCompiler.td | 24 - llvm/lib/Target/X86/X86PfmCounters.td | 1 + .../Transforms/Instrumentation/GCOVProfiling.cpp | 29 +- llvm/lib/Transforms/Scalar/GVN.cpp | 10 + llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 82 ++-- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 24 +- .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 48 +- llvm/lib/Transforms/Vectorize/Vectorize.cpp | 2 +- .../Analysis/ConstantFolding/func-and-folding.ll | 27 ++ .../2004-03-07-FunctionAddressAlignment.ll | 16 - .../unfold-masked-merge-scalar-variablemask.ll | 12 +- llvm/test/CodeGen/AMDGPU/add3.ll | 171 +++++++ llvm/test/CodeGen/AMDGPU/add_shl.ll | 115 +++++ llvm/test/CodeGen/AMDGPU/and_or.ll | 112 +++++ .../computeKnownBits-scalar-to-vector-crash.ll | 11 + llvm/test/CodeGen/AMDGPU/or3.ll | 95 ++++ llvm/test/CodeGen/AMDGPU/shl_add.ll | 94 ++++ llvm/test/CodeGen/AMDGPU/shl_or.ll | 144 ++++++ llvm/test/CodeGen/AMDGPU/sibling-call.ll | 3 +- llvm/test/CodeGen/AMDGPU/vi-removed-intrinsics.ll | 2 +- llvm/test/CodeGen/AMDGPU/xor_add.ll | 94 ++++ llvm/test/CodeGen/ARM/CGP/arm-cgp-casts.ll | 57 +++ .../CodeGen/PowerPC/aantidep-inline-asm-use.ll | 2 +- llvm/test/CodeGen/PowerPC/cr-spills.ll | 2 +- llvm/test/CodeGen/PowerPC/ctr-cleanup.ll | 2 +- llvm/test/CodeGen/PowerPC/ctrloop-large-ec.ll | 2 +- llvm/test/CodeGen/PowerPC/ctrloop-udivti3.ll | 2 +- llvm/test/CodeGen/PowerPC/early-ret2.ll | 4 +- llvm/test/CodeGen/PowerPC/hoist-logic.ll | 71 +++ .../CodeGen/PowerPC/ifcvt-forked-bug-2016-08-08.ll | 2 +- llvm/test/CodeGen/PowerPC/merge-st-chain-op.ll | 2 +- llvm/test/CodeGen/PowerPC/negctr.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll | 4 +- llvm/test/CodeGen/PowerPC/ppc-vaarg-agg.ll | 2 +- llvm/test/CodeGen/PowerPC/pr16556.ll | 2 +- llvm/test/CodeGen/PowerPC/pr25157-peephole.ll | 4 +- llvm/test/CodeGen/PowerPC/pr25157.ll | 4 +- llvm/test/CodeGen/PowerPC/setcc-logic.ll | 8 +- llvm/test/CodeGen/PowerPC/stwu-sched.ll | 8 +- llvm/test/CodeGen/PowerPC/stwux.ll | 2 +- llvm/test/CodeGen/PowerPC/vsel-prom.ll | 2 +- llvm/test/CodeGen/PowerPC/vsx-fma-mutate-undef.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll | 2 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 4 +- llvm/test/CodeGen/X86/avx512-schedule.ll | 8 +- llvm/test/CodeGen/X86/avx512dq-mask-op.ll | 8 +- llvm/test/CodeGen/X86/bswap-vector.ll | 47 +- llvm/test/CodeGen/X86/bswap.ll | 54 ++- llvm/test/CodeGen/X86/combine-concatvectors.ll | 2 - llvm/test/CodeGen/X86/packss.ll | 6 +- .../X86/unfold-masked-merge-vector-variablemask.ll | 120 +++-- llvm/test/CodeGen/X86/vector-shift-ashr-128.ll | 6 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 24 +- llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll | 28 +- llvm/test/DebugInfo/NVPTX/debug-file-loc-only.ll | 48 ++ llvm/test/DebugInfo/PDB/module-bytes.test | 61 +-- llvm/test/MC/AArch64/armv8.2a-at.s | 10 +- llvm/test/MC/AArch64/armv8.2a-mmfr2.s | 6 - llvm/test/MC/AArch64/armv8.2a-persistent-memory.s | 7 +- llvm/test/MC/AArch64/armv8.3a-complex.s | 202 ++------ llvm/test/MC/AArch64/armv8.3a-complex_bad.s | 58 +++ llvm/test/MC/AArch64/armv8.3a-complex_missing.s | 103 ++++ llvm/test/MC/AArch64/armv8.3a-complex_nofp16.s | 37 ++ llvm/test/MC/AArch64/armv8.3a-complex_nofp16_bad.s | 34 ++ llvm/test/MC/AArch64/armv8.3a-js.s | 24 +- llvm/test/MC/AArch64/armv8.3a-signed-pointer.s | 339 +++++++------ llvm/test/MC/AArch64/armv8.4a-flag.s | 55 ++- llvm/test/MC/AArch64/armv8.4a-ldst.s | 117 ++--- llvm/test/MC/AArch64/armv8.4a-tlb.s | 99 ++-- llvm/test/MC/AArch64/armv8.4a-trace.s | 15 +- llvm/test/Transforms/BDCE/vectors.ll | 156 ++++++ llvm/test/Transforms/GVN/PRE/pre-gep-load.ll | 74 ++- .../AMDGPU/adjust-alloca-alignment.ll | 2 + .../LoadStoreVectorizer/AMDGPU/complex-index.ll | 3 +- .../LoadStoreVectorizer/AMDGPU/extended-index.ll | 1 + .../LoadStoreVectorizer/AMDGPU/gep-bitcast.ll | 1 + .../LoadStoreVectorizer/AMDGPU/insertion-point.ll | 1 + .../AMDGPU/interleaved-mayalias-store.ll | 1 + .../LoadStoreVectorizer/AMDGPU/invariant-load.ll | 1 + .../X86/codegenprepare-produced-address-math.ll | 2 + .../X86/compare-scev-by-complexity.ll | 1 + .../LoadStoreVectorizer/X86/correct-order.ll | 1 + .../LoadStoreVectorizer/X86/load-width.ll | 2 + .../LoadStoreVectorizer/X86/merge-tbaa.ll | 2 + .../LoadStoreVectorizer/X86/non-byte-size.ll | 1 + .../LoadStoreVectorizer/X86/preserve-order32.ll | 1 + .../LoadStoreVectorizer/X86/preserve-order64.ll | 1 + .../X86/subchain-interleaved.ll | 1 + .../LoadStoreVectorizer/X86/vector-scalar.ll | 1 + .../LoadStoreVectorizer/int_sideeffect.ll | 1 + .../LoopSimplifyCFG/constant-fold-branch.ll | 130 ++++- .../Transforms/LoopSimplifyCFG/irreducible_cfg.ll | 51 ++ .../llvm-mca/AArch64/CortexA57/shifted-register.s | 22 +- .../tools/llvm-mca/AArch64/Exynos/direct-branch.s | 11 +- .../Transforms/Utils/CodeExtractorTest.cpp | 68 +++ llvm/utils/UpdateTestChecks/common.py | 2 +- llvm/utils/benchmark/src/sysinfo.cc | 4 +- llvm/utils/gn/build/write_cmake_config.py | 25 +- llvm/utils/gn/secondary/BUILD.gn | 1 + .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 74 ++- .../secondary/llvm/lib/DebugInfo/CodeView/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn | 3 + llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn | 26 + openmp/libomptarget/deviceRTLs/nvptx/src/cancel.cu | 4 +- .../deviceRTLs/nvptx/src/data_sharing.cu | 69 +-- openmp/libomptarget/deviceRTLs/nvptx/src/debug.h | 30 +- .../libomptarget/deviceRTLs/nvptx/src/libcall.cu | 8 +- openmp/libomptarget/deviceRTLs/nvptx/src/loop.cu | 86 ++-- .../deviceRTLs/nvptx/src/omptarget-nvptx.cu | 2 +- .../libomptarget/deviceRTLs/nvptx/src/parallel.cu | 14 +- .../libomptarget/deviceRTLs/nvptx/src/reduction.cu | 7 +- .../libomptarget/deviceRTLs/nvptx/src/supporti.h | 7 +- openmp/libomptarget/deviceRTLs/nvptx/src/sync.cu | 6 +- openmp/libomptarget/deviceRTLs/nvptx/src/task.cu | 17 +- 247 files changed, 6541 insertions(+), 2470 deletions(-) create mode 100644 clang/test/CodeGen/debug-info-abspath.c create mode 100644 clang/test/CodeGen/inline-asm-matching-ppc-vsx.c create mode 100644 clang/test/CodeGenCXX/thunk-returning-memptr.cpp rename compiler-rt/test/sanitizer_common/TestCases/{NetBSD => Posix}/getmntinfo.cc (73%) create mode 100644 lldb/lit/Modules/PECOFF/dep-modules.yaml create mode 100644 lldb/lit/Modules/PECOFF/export-dllfunc.yaml create mode 100644 lldb/lit/Modules/PECOFF/lit.local.cfg create mode 100644 lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.cpp create mode 100644 lldb/source/Plugins/SymbolFile/NativePDB/DWARFLocationExpression.h create mode 100644 llvm/include/llvm/DebugInfo/CodeView/SymbolRecordHelpers.h create mode 100644 llvm/include/llvm/Transforms/Vectorize/LoadStoreVectorizer.h create mode 100644 llvm/lib/DebugInfo/CodeView/SymbolRecordHelpers.cpp create mode 100644 llvm/test/Analysis/ConstantFolding/func-and-folding.ll delete mode 100644 llvm/test/Assembler/2004-03-07-FunctionAddressAlignment.ll create mode 100644 llvm/test/CodeGen/AMDGPU/add3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/add_shl.ll create mode 100644 llvm/test/CodeGen/AMDGPU/and_or.ll create mode 100644 llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll create mode 100644 llvm/test/CodeGen/AMDGPU/or3.ll create mode 100644 llvm/test/CodeGen/AMDGPU/shl_add.ll create mode 100644 llvm/test/CodeGen/AMDGPU/shl_or.ll create mode 100644 llvm/test/CodeGen/AMDGPU/xor_add.ll create mode 100644 llvm/test/CodeGen/PowerPC/hoist-logic.ll create mode 100644 llvm/test/DebugInfo/NVPTX/debug-file-loc-only.ll delete mode 100644 llvm/test/MC/AArch64/armv8.2a-mmfr2.s create mode 100644 llvm/test/MC/AArch64/armv8.3a-complex_bad.s create mode 100644 llvm/test/MC/AArch64/armv8.3a-complex_missing.s create mode 100644 llvm/test/MC/AArch64/armv8.3a-complex_nofp16.s create mode 100644 llvm/test/MC/AArch64/armv8.3a-complex_nofp16_bad.s create mode 100644 llvm/test/Transforms/BDCE/vectors.ll create mode 100644 llvm/test/Transforms/LoopSimplifyCFG/irreducible_cfg.ll create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits December 2018