Tcwg-commits November 2018

tcwg-commits@lists.linaro.org

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9752 discussions

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allnoconfig updated (7a7e7a58e1 -> 80176fa35e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-next-allnoconfig in repository toolchain/binutils-gdb. from 7a7e7a58e1 Automatic date update in version.in adds 80176fa35e Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig updated (60bf7ce71ae -> 3e0e7d8b5b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-allyesconfig in repository toolchain/gcc. from 60bf7ce71ae 2018-11-09 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> adds 3e0e7d8b5b9 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (1e933856f34 -> 3bfaaaca6c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-monorepo. from 1e933856f34 [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr [...] adds 762612de08d [NFC] Add utility function for SafetyInfo updates for moveBefore adds 1b48fc32b48 [XRay] Improve FDR trace handling and error messaging adds 140e7074de0 [XRay] Add atomic fences around non-atomic reads and writes adds 21c99463a84 [XRay] Fix enter function tracing for record unwriting adds 174721be954 [XRay] Add a static assertion on size of metadata payload (NFC) adds 988a47c487d [XRay] Add a test for function id encoding/decoding (NFC) adds 723e2c61d29 [lldb] Fix signature in test to match rL346453 adds ea430d2cf42 [ARM] Small reorganisation in ARMParallelDSP adds e14abd1b6a0 [ARM] Enable mixed types in ARM CGP adds 7c53e8aa88e [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds cedab8cbffc [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX. adds 010a2a8a26e [CallSiteSplitting] Only record conditions up to the IDom(c [...] adds b66005f1065 [SelectionDAG] swap select_cc operands to enable folding adds 087fab3f498 [Tooling] Avoid diagnosing missing input files in an edge-c [...] adds f1c1b8c9688 [IPSCCP,PM] Preserve DT in the new pass manager. adds 68344e23d89 [llvm-mca] Use a small vector for instructions in the EntryStage. adds 716b2769ac7 [clangd] Make TestTU build with preamble, and fix the fallout. adds 5d6bfdd9fe9 [llvm-exegesis][NFC] Add a way to declare the default count [...] adds 2bde1dbc44d [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI. adds 24ffd701f13 [clang-cl] Add warning for /Zc:dllexportInlines- when the f [...] adds bc2f97c6b6b Revert r346483: [CallSiteSplitting] Only record conditions [...] adds 7274f3cfc08 [llvm-exegesis] Fix unit tests on PowerPC/AArch64. adds 1147f735880 [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag adds e7fd729d38d [MIPS GlobalISel] narrowScalar G_CONSTANT adds a18f367e343 [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432 adds c5fe2c0b4eb [RISCV] Avoid unnecessary XOR for seteq/setne 0 adds 8525790ec6b [x86] try to form broadcast before widening shuffle elements adds 3667f05fa1a [ARM] Don't promote i1 types in ARM CGP adds b7e9ec5f693 Revert "[VFS] Add "expand tilde" argument to getRealPath." adds 99af66aa4fb AMDGPU: Add testcase to demonstrate a condition with pre-ex [...] adds 76adc99d6c4 revert rL346478 adds 96bb3a56db9 [clangd] Don't treat top-level decls as "local" if they are [...] adds 16a498d61ac [SystemZ] Avoid inserting same value after replication adds b9b243759dd Resubmit "Fix bug in PE/COFF plugin." adds b89cbe785b3 [llvm-cov] Add lcov tracefile export format. adds 77670ca7069 [OPENMP][NVPTX]Allow to use shared memory for the target|te [...] adds 9457816f3cc Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no [...] adds e4464af240e [docs][statepoint] tweak a title adds ebb4aeb0d75 [CostModel] Add SK_ExtractSubvector handling to getInstruct [...] adds ee314e0d62f [NativePDB] Add support for bitfield records. adds e41c9b1e152 [Power9] Allow gpr callee saved spills in prologue to vecto [...] adds 7285ad9fb95 [docs][statepoint] Expand a bit on problems with mixing ref [...] adds 0546dc6976a [llvm-cov] Remove "default:" label in the switch covering a [...] adds fe7b75e5bf2 Fix -Wsign-compare warning adds ec144f39442 [WebAssembly] Respect `--no-mangle` in more locations adds 034461b4a7e [NativePDB] Fix completion of enum types. adds 490ddc5b44e [docs][statepoints] Reformulate open issues list adds 7634123d275 Annotate switch with LLVM_FALLTHROUGH adds dab692c9913 Use the correct address space when emitting the ctor function list adds 18fccafbec7 Introduce the _Clang scoped attribute token. adds 0a3951c61c7 Type safe version of MachinePassRegistry adds f58624d66ad [Hexagon] Place globals with explicit .sdata section in small data adds dfce0f047ab [clangd] Fix clang-tidy warnings. adds f6fc66cd0f7 Add missing include adds eb8082a6988 Driver: Make -fsanitize=shadow-call-stack compatible with - [...] adds 6f30daf8a99 Add missing include adds 7b03fd136fc [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx adds 5852473383e [llvm-strings] Fix whitespaces to match strings output. adds 0145d4376fa [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to [...] adds 4a07891c955 Add total function byte size and inline function byte size [...] adds 7e4949b3d3a [Hexagon] Implement noreturn optimization adds a29648c8329 [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC. adds 046667c9fa8 [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call adds f3b8cad9b1f [WebAssembly] Hotfix of WebAssemblyInstructionTableSize aft [...] adds 5c069385a7d [HIP] Remove useless sections in linked files adds f3080e73205 [Hexagon] Fix unused variable warning in release builds adds 27669fe71a8 [CostModel][X86] SK_ExtractSubvector is free if the subvect [...] adds 4254aa24dac [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bi [...] adds 4b007fcc9d2 [DWARFv5] Emit normal type units in .debug_info comdats. adds 83e11b3b674 [SystemZ] Add a couple of missing tests adds d6b53d87e36 Fix a nondeterminism in the debug info for VLA size expressions. adds df031b62c19 [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD [...] adds 28c365d873b [MS demangler] Use a slightly shorter unmangling for mangle [...] adds 767d9b163ea [llvm-mca] Account for buffered resources when analyzing "S [...] adds 7f0e49005c6 [AArch64] Support HiSilicon's TSV110 processor adds bf59dc76a80 Allow a double-underscore spelling of Clang attributes usin [...] adds 347e4d14c2c Use the correct address space when bitcasting func pointer [...] adds 16e925a7ecb Revert rL346454: Fix a use-after-free introduced by r344915. adds c669678c1f6 Branch/tag all projects with a single commit in release-tag [...] adds e053b4ae068 [OPENMP][NVPTX]Extend number of constructs executed in SPMD mode. adds 0c5dd9671de [X86] Move the promotion of v16i16->v16i8 for avx512f but n [...] adds 8162d499679 Remove llvm include from debugserver, change LLVM_FALLTHROU [...] adds 0d8dd3d3dc8 [ASTMatchers] overload ignoringParens for Expr adds 8c4fcc6dd9f [clang-tidy] fix PR39583 - ignoring ParenCast for string-li [...] adds 0b2715ed4c1 Revert "Revert rL346454: Fix a use-after-free introduced by [...] adds a08bdc97843 [hwasan] Add entire report to abort message on Android. adds 163b3844160 [WebAssembly] Disable custom NaN payload tests adds 1f69b414ec1 Revert "Exclude wasm target from Windows packaging due to PR39448" adds 9533708db1a Re-land r343606 "[winasan] Unpoison the stack in NtTerminat [...] adds bf31a8e1a73 Work with a gdb-remote target that doesn't handle the qWatc [...] adds 9f5373361af [JumpThreading] Fix exponential time algorithm computing kn [...] adds a55948126a1 [ARM] Add MemOperand to LDRcp to enable DCE. adds d2e172a9e3c [SelectionDAG] Fix a -Wparentheses warning from gcc in an a [...] adds 77048c71df1 [AVR] Reorder the CHECK lines in directmem.ll to match curr [...] adds ad0100b498b Fix ClangFormat issue of recognizing ObjC subscript as C++ [...] adds c36087f929e [libcxx] Provide thread annotations for shared_mutex adds 17b8def7673 [ARM64] [Windows] Handle funclets adds 460d692a102 [GC] Simplify linking of GC builtin GC strategies adds b7c98df1d3d [WebAssembly] Update bleeding-edge cpu features adds b3428b42447 Enable listening for EXC_RESOURCE events, and format mach e [...] adds b19b35e4f69 Add extra diagnostics to test adds 62c644e4ac5 Unbreak the linux bot from the previous commit. Fred neede [...] adds 5d6ad16de04 [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes [...] adds fd50d05d355 test/CodeGen/X86: Relax test case adds b91a72edc92 RegAllocFast: Further cleanups; NFC adds dcad980da5b Fix DragonFlyBSD build adds 6a887d2c52a [PDB] Simplify some ghash code, NFC adds 3bfaaaca6c3 Correct atexit(3) support in MSan/NetBSD No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 9 +- clang-tools-extra/clangd/AST.cpp | 11 +- clang-tools-extra/clangd/ClangdUnit.cpp | 3 + ...uidelines-pro-bounds-array-to-pointer-decay.cpp | 4 + .../unittests/clangd/ClangdUnitTests.cpp | 22 + .../unittests/clangd/QualityTests.cpp | 38 +- .../unittests/clangd/SymbolCollectorTests.cpp | 22 +- clang-tools-extra/unittests/clangd/TestTU.cpp | 36 +- clang-tools-extra/unittests/clangd/TestTU.h | 10 +- clang/docs/LibASTMatchersReference.html | 11 + clang/include/clang/ASTMatchers/ASTMatchers.h | 21 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 4 + clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 +- clang/lib/Basic/Attributes.cpp | 22 +- clang/lib/CodeGen/CGDecl.cpp | 17 +- clang/lib/CodeGen/CGException.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 260 +++++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 6 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 5 +- clang/lib/Driver/SanitizerArgs.cpp | 2 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 4 + clang/lib/Driver/ToolChains/MSVC.cpp | 6 + clang/lib/Format/TokenAnnotator.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 44 +- clang/lib/Sema/ParsedAttr.cpp | 25 +- clang/lib/Tooling/Tooling.cpp | 6 + clang/test/CodeGen/debug-info-vla.c | 4 +- clang/test/CodeGen/ubsan-debuglog-return.c | 2 +- clang/test/CodeGenCXX/debug-info-vla.cpp | 2 +- clang/test/Driver/cl-options.c | 2 + clang/test/Driver/fsanitize.c | 4 + clang/test/FixIt/fixit-cxx11-attributes.cpp | 3 + clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 13 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 11 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 8 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 11 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 4 +- .../nvptx_target_parallel_proc_bind_codegen.cpp | 6 +- .../nvptx_target_parallel_reduction_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 2 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 11 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 26 +- clang/test/Parser/cxx0x-attributes.cpp | 8 + clang/test/Preprocessor/has_attribute.cpp | 38 +- clang/test/SemaCXX/attr-optnone.cpp | 8 + clang/test/SemaCXX/switch-implicit-fallthrough.cpp | 15 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 8 + clang/unittests/Format/FormatTest.cpp | 2 + compiler-rt/lib/asan/asan_win.cc | 12 +- compiler-rt/lib/hwasan/hwasan.cc | 1 + compiler-rt/lib/hwasan/hwasan.h | 2 + compiler-rt/lib/hwasan/hwasan_linux.cc | 7 +- compiler-rt/lib/hwasan/hwasan_report.cc | 51 +- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/msan/msan_interceptors.cc | 68 +- .../lib/xray/tests/unit/fdr_controller_test.cc | 87 +++ compiler-rt/lib/xray/xray_fdr_controller.h | 15 +- compiler-rt/lib/xray/xray_fdr_log_writer.h | 65 ++ compiler-rt/lib/xray/xray_fdr_logging.cc | 7 + .../test/asan/TestCases/Windows/dll_host.cc | 1 + .../test/hwasan/TestCases/abort-message-android.cc | 28 + libcxx/include/shared_mutex | 15 +- lld/COFF/PDB.cpp | 38 +- lld/test/wasm/cxx-mangling.ll | 10 +- lld/wasm/Driver.cpp | 6 +- lld/wasm/Symbols.cpp | 8 +- lld/wasm/Symbols.h | 1 + lld/wasm/Writer.cpp | 6 +- .../SymbolFile/NativePDB/Inputs/bitfields.lldbinit | 5 + .../NativePDB/Inputs/globals-bss.lldbinit | 3 + .../SymbolFile/NativePDB/ast-reconstruction.cpp | 15 +- lldb/lit/SymbolFile/NativePDB/bitfields.cpp | 61 ++ lldb/lit/SymbolFile/NativePDB/globals-bss.cpp | 35 + .../test/functionalities/exec/TestExec.py | 4 + .../TestNoWatchpointSupportInfo.py | 64 ++ .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 6 +- .../Process/Utility/StopInfoMachException.cpp | 51 ++ .../gdb-remote/GDBRemoteCommunicationClient.cpp | 5 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 1 + .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 24 +- lldb/source/Target/Target.cpp | 10 +- lldb/tools/debugserver/source/DNBRegisterInfo.cpp | 1 + .../debugserver/source/MacOSX/MachException.cpp | 55 +- lldb/tools/debugserver/source/RNBRemote.cpp | 4 +- llvm/docs/CommandGuide/llvm-cov.rst | 22 +- llvm/docs/ReleaseNotes.rst | 3 +- llvm/docs/Statepoints.rst | 104 +-- llvm/include/llvm/CodeGen/GCs.h | 18 +- .../llvm/CodeGen/LinkAllCodegenComponents.h | 6 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 29 +- llvm/include/llvm/CodeGen/MachinePassRegistry.h | 80 ++- llvm/include/llvm/CodeGen/MachineScheduler.h | 10 +- llvm/include/llvm/CodeGen/RegAllocRegistry.h | 16 +- llvm/include/llvm/CodeGen/SchedulerRegistry.h | 13 +- llvm/include/llvm/IR/Instruction.h | 8 + llvm/include/llvm/IR/Instructions.h | 19 + llvm/include/llvm/MC/MCObjectFileInfo.h | 8 +- llvm/include/llvm/Support/AArch64TargetParser.def | 3 + llvm/include/llvm/Support/VirtualFileSystem.h | 17 +- llvm/include/llvm/Target/TargetPfmCounters.td | 4 + .../include/llvm/Transforms/Scalar/JumpThreading.h | 25 +- llvm/include/llvm/Transforms/Scalar/SCCP.h | 11 +- llvm/include/llvm/XRay/FDRRecordProducer.h | 5 + llvm/include/llvm/XRay/FDRRecords.h | 234 +++++-- llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 7 +- llvm/lib/CodeGen/BuiltinGCs.cpp | 8 +- llvm/lib/CodeGen/MIRPrinter.cpp | 26 +- llvm/lib/CodeGen/MachinePassRegistry.cpp | 38 -- llvm/lib/CodeGen/MachineScheduler.cpp | 3 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 28 + llvm/lib/CodeGen/RegAllocFast.cpp | 427 ++++++------ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 73 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 3 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 3 +- llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 9 +- llvm/lib/IR/Instruction.cpp | 7 + llvm/lib/IR/Instructions.cpp | 29 + llvm/lib/MC/MCObjectFileInfo.cpp | 9 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 3 + llvm/lib/MC/MCSectionELF.cpp | 3 + llvm/lib/Support/Host.cpp | 11 + llvm/lib/Support/Unix/Path.inc | 4 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64.td | 23 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 147 +++- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 11 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 24 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 30 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 13 + llvm/lib/Target/AArch64/AArch64PfmCounters.td | 19 + llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 13 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 3 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 5 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 5 +- llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 4 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 136 ++-- llvm/lib/Target/ARM/ARMFastISel.cpp | 7 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 275 ++++---- llvm/lib/Target/Hexagon/Hexagon.td | 3 + llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 33 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 11 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 3 + .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 15 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 24 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 10 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 3 - llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 21 +- llvm/lib/Target/PowerPC/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPC.td | 18 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 139 +++- llvm/lib/Target/PowerPC/PPCFrameLowering.h | 7 + llvm/lib/Target/PowerPC/PPCPfmCounters.td | 19 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 2 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 4 +- .../Disassembler/WebAssemblyDisassembler.cpp | 2 + llvm/lib/Target/WebAssembly/WebAssembly.td | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 92 ++- llvm/lib/Target/X86/X86InstrAVX512.td | 12 + llvm/lib/Target/X86/X86PfmCounters.td | 4 + llvm/lib/Target/X86/X86SchedBroadwell.td | 6 +- llvm/lib/Target/X86/X86SchedHaswell.td | 6 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 7 + llvm/lib/Target/X86/X86SchedSkylakeClient.td | 6 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 6 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 368 +++++----- llvm/lib/Transforms/IPO/SCCP.cpp | 35 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 37 +- llvm/lib/Transforms/Scalar/LICM.cpp | 14 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 65 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 16 + llvm/lib/XRay/FDRRecordProducer.cpp | 117 +++- llvm/lib/XRay/FDRRecords.cpp | 34 + llvm/lib/XRay/FDRTraceWriter.cpp | 6 +- llvm/lib/XRay/RecordInitializer.cpp | 54 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 94 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 124 ++-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduction.ll | 36 +- .../CostModel/X86/shuffle-extract_subvector.ll | 128 ++-- llvm/test/CodeGen/AArch64/cpus.ll | 1 + llvm/test/CodeGen/AArch64/remat.ll | 1 + llvm/test/CodeGen/AArch64/select_cc.ll | 54 ++ .../test/CodeGen/AArch64/wineh-try-catch-nobase.ll | 49 ++ .../CodeGen/AArch64/wineh-try-catch-realign.ll | 59 ++ llvm/test/CodeGen/AArch64/wineh-try-catch-vla.ll | 52 ++ llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 197 ++++++ .../CodeGen/AMDGPU/optimize-if-exec-masking.mir | 314 ++------- llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir | 36 + llvm/test/CodeGen/ARM/CGP/arm-cgp-calls.ll | 29 +- llvm/test/CodeGen/ARM/CGP/arm-cgp-casts.ll | 242 ++++++- llvm/test/CodeGen/ARM/CGP/arm-cgp-signed-icmps.ll | 7 +- llvm/test/CodeGen/ARM/ldrcppic.ll | 56 ++ llvm/test/CodeGen/AVR/directmem.ll | 33 +- llvm/test/CodeGen/Hexagon/noreturn-stack-elim.ll | 94 +++ .../test/CodeGen/Hexagon/sdata-explicit-section.ll | 6 + .../test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir | 62 ++ llvm/test/CodeGen/Mips/cconv/vector.ll | 121 ++-- llvm/test/CodeGen/RISCV/calling-conv.ll | 24 +- llvm/test/CodeGen/RISCV/fp128.ll | 1 - llvm/test/CodeGen/RISCV/get-setcc-result-type.ll | 4 - llvm/test/CodeGen/RISCV/i32-icmp.ll | 20 + .../RISCV/umulo-128-legalisation-lowering.ll | 196 +++--- llvm/test/CodeGen/SystemZ/fp-round-01.ll | 65 +- llvm/test/CodeGen/SystemZ/vec-move-19.ll | 20 + llvm/test/CodeGen/Thumb/branchless-cmp.ll | 16 +- llvm/test/CodeGen/WebAssembly/immediates.ll | 34 +- .../X86/2009-04-12-FastIselOverflowCrash.ll | 10 +- llvm/test/CodeGen/X86/avx-schedule.ll | 84 +-- llvm/test/CodeGen/X86/avx2-schedule.ll | 40 +- llvm/test/CodeGen/X86/avx512-ext.ll | 96 +-- llvm/test/CodeGen/X86/avx512-fma.ll | 40 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 44 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 64 +- llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll | 14 +- llvm/test/CodeGen/X86/avx512-schedule.ll | 140 ++-- llvm/test/CodeGen/X86/avx512-select.ll | 8 +- llvm/test/CodeGen/X86/avx512-trunc.ll | 26 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 3 +- llvm/test/CodeGen/X86/avx512vpopcntdq-schedule.ll | 8 +- llvm/test/CodeGen/X86/compress_expand.ll | 10 +- llvm/test/CodeGen/X86/dwarf-headers.ll | 12 +- llvm/test/CodeGen/X86/f16c-schedule.ll | 10 +- llvm/test/CodeGen/X86/fma-schedule.ll | 120 ++-- llvm/test/CodeGen/X86/fma4-schedule.ll | 24 +- llvm/test/CodeGen/X86/haddsub-undef.ll | 4 +- .../CodeGen/X86/insert-into-constant-vector.ll | 30 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 7 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 64 +- llvm/test/CodeGen/X86/masked_memop.ll | 6 +- llvm/test/CodeGen/X86/pmul.ll | 32 +- llvm/test/CodeGen/X86/pr39187-g.ll | 121 ++++ .../test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 8 +- llvm/test/CodeGen/X86/prefer-avx256-trunc.ll | 2 +- llvm/test/CodeGen/X86/setcc-lowering.ll | 2 +- .../test/CodeGen/X86/shuffle-of-splat-multiuses.ll | 6 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 4 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 8 +- llvm/test/CodeGen/X86/vec_cast.ll | 34 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 38 +- llvm/test/CodeGen/X86/vector-compare-results.ll | 28 +- llvm/test/CodeGen/X86/vector-popcnt-128.ll | 2 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llvm/test/Demangle/ms-operators.test | 2 +- llvm/test/Demangle/ms-string-literals.test | 742 ++++++++++----------- llvm/test/MC/AArch64/armv8.1a-lse.s | 2 + llvm/test/MC/AArch64/armv8.2a-dotprod.s | 1 + llvm/test/MC/AArch64/crc.s | 2 + llvm/test/MC/AArch64/ras-extension.s | 1 + .../MC/Disassembler/AArch64/armv8.2a-dotprod.txt | 1 + llvm/test/MC/Hexagon/gprel-shflag.s | 10 + llvm/test/Transforms/JumpThreading/crash.ll | 62 +- .../Transforms/SCCP/ipsccp-preserve-domtree.ll | 63 ++ .../SLPVectorizer/X86/reduction_unrolled.ll | 2 +- .../llvm-cov/showLineExecutionCounts-lcov.test | 38 ++ llvm/test/tools/llvm-dwarfdump/X86/statistics.ll | 3 + .../tools/llvm-mca/X86/Broadwell/resources-avx1.s | 6 +- .../tools/llvm-mca/X86/Generic/resources-avx1.s | 6 +- .../tools/llvm-mca/X86/Haswell/resources-avx1.s | 6 +- .../llvm-mca/X86/SandyBridge/resources-avx1.s | 6 +- .../llvm-mca/X86/SkylakeClient/resources-avx1.s | 6 +- .../llvm-mca/X86/SkylakeServer/resources-avx1.s | 6 +- llvm/test/tools/llvm-strings/file-filename.test | 2 +- llvm/test/tools/llvm-strings/negative-char.test | 2 +- llvm/test/tools/llvm-strings/radix-filename.test | 36 + llvm/test/tools/llvm-strings/radix.test | 55 +- llvm/test/tools/llvm-strings/whitespace.test | 2 + llvm/tools/llvm-cov/CMakeLists.txt | 1 + llvm/tools/llvm-cov/CodeCoverage.cpp | 45 +- llvm/tools/llvm-cov/CoverageExporterLcov.cpp | 125 ++++ llvm/tools/llvm-cov/CoverageExporterLcov.h | 36 + llvm/tools/llvm-cov/CoverageViewOptions.h | 3 +- llvm/tools/llvm-cov/SourceCoverageView.cpp | 8 + llvm/tools/llvm-dwarfdump/Statistics.cpp | 46 +- llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp | 27 +- llvm/tools/llvm-exegesis/lib/Latency.cpp | 11 +- llvm/tools/llvm-exegesis/lib/Latency.h | 2 - llvm/tools/llvm-exegesis/lib/PowerPC/Target.cpp | 20 +- llvm/tools/llvm-exegesis/lib/Target.cpp | 11 +- llvm/tools/llvm-mca/include/Stages/EntryStage.h | 8 +- .../lib/HardwareUnits/RetireControlUnit.cpp | 3 +- llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 29 +- llvm/tools/llvm-mca/lib/Stages/EntryStage.cpp | 15 +- llvm/tools/llvm-strings/llvm-strings.cpp | 10 +- llvm/unittests/Support/Host.cpp | 5 + llvm/unittests/Support/TargetParserTest.cpp | 33 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 4 +- llvm/unittests/XRay/FDRProducerConsumerTest.cpp | 100 ++- .../tools/llvm-exegesis/AArch64/TargetTest.cpp | 7 + .../tools/llvm-exegesis/PowerPC/TargetTest.cpp | 7 + llvm/utils/TableGen/ExegesisEmitter.cpp | 32 +- llvm/utils/release/build_llvm_package.bat | 4 +- llvm/utils/release/tag.sh | 46 +- 329 files changed, 7178 insertions(+), 3916 deletions(-) create mode 100644 compiler-rt/test/hwasan/TestCases/abort-message-android.cc create mode 100644 lldb/lit/SymbolFile/NativePDB/Inputs/bitfields.lldbinit create mode 100644 lldb/lit/SymbolFile/NativePDB/Inputs/globals-bss.lldbinit create mode 100644 lldb/lit/SymbolFile/NativePDB/bitfields.cpp create mode 100644 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100644 llvm/test/CodeGen/X86/pr39187-g.ll delete mode 100644 llvm/test/DebugInfo/NVPTX/debug-file-loc-only.ll create mode 100644 llvm/test/MC/Hexagon/gprel-shflag.s create mode 100644 llvm/test/Transforms/SCCP/ipsccp-preserve-domtree.ll create mode 100644 llvm/test/tools/llvm-cov/showLineExecutionCounts-lcov.test create mode 100644 llvm/test/tools/llvm-strings/radix-filename.test create mode 100644 llvm/test/tools/llvm-strings/whitespace.test create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.cpp create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig updated (1e933856f34 -> 3bfaaaca6c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allyesconfig in repository toolchain/ci/llvm-monorepo. from 1e933856f34 [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr [...] adds 762612de08d [NFC] Add utility function for SafetyInfo updates for moveBefore adds 1b48fc32b48 [XRay] Improve FDR trace handling and error messaging adds 140e7074de0 [XRay] Add atomic fences around non-atomic reads and writes adds 21c99463a84 [XRay] Fix enter function tracing for record unwriting adds 174721be954 [XRay] Add a static assertion on size of metadata payload (NFC) adds 988a47c487d [XRay] Add a test for function id encoding/decoding (NFC) adds 723e2c61d29 [lldb] Fix signature in test to match rL346453 adds ea430d2cf42 [ARM] Small reorganisation in ARMParallelDSP adds e14abd1b6a0 [ARM] Enable mixed types in ARM CGP adds 7c53e8aa88e [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds cedab8cbffc [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX. adds 010a2a8a26e [CallSiteSplitting] Only record conditions up to the IDom(c [...] adds b66005f1065 [SelectionDAG] swap select_cc operands to enable folding adds 087fab3f498 [Tooling] Avoid diagnosing missing input files in an edge-c [...] adds f1c1b8c9688 [IPSCCP,PM] Preserve DT in the new pass manager. adds 68344e23d89 [llvm-mca] Use a small vector for instructions in the EntryStage. adds 716b2769ac7 [clangd] Make TestTU build with preamble, and fix the fallout. adds 5d6bfdd9fe9 [llvm-exegesis][NFC] Add a way to declare the default count [...] adds 2bde1dbc44d [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI. adds 24ffd701f13 [clang-cl] Add warning for /Zc:dllexportInlines- when the f [...] adds bc2f97c6b6b Revert r346483: [CallSiteSplitting] Only record conditions [...] adds 7274f3cfc08 [llvm-exegesis] Fix unit tests on PowerPC/AArch64. adds 1147f735880 [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag adds e7fd729d38d [MIPS GlobalISel] narrowScalar G_CONSTANT adds a18f367e343 [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432 adds c5fe2c0b4eb [RISCV] Avoid unnecessary XOR for seteq/setne 0 adds 8525790ec6b [x86] try to form broadcast before widening shuffle elements adds 3667f05fa1a [ARM] Don't promote i1 types in ARM CGP adds b7e9ec5f693 Revert "[VFS] Add "expand tilde" argument to getRealPath." adds 99af66aa4fb AMDGPU: Add testcase to demonstrate a condition with pre-ex [...] adds 76adc99d6c4 revert rL346478 adds 96bb3a56db9 [clangd] Don't treat top-level decls as "local" if they are [...] adds 16a498d61ac [SystemZ] Avoid inserting same value after replication adds b9b243759dd Resubmit "Fix bug in PE/COFF plugin." adds b89cbe785b3 [llvm-cov] Add lcov tracefile export format. adds 77670ca7069 [OPENMP][NVPTX]Allow to use shared memory for the target|te [...] adds 9457816f3cc Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no [...] adds e4464af240e [docs][statepoint] tweak a title adds ebb4aeb0d75 [CostModel] Add SK_ExtractSubvector handling to getInstruct [...] adds ee314e0d62f [NativePDB] Add support for bitfield records. adds e41c9b1e152 [Power9] Allow gpr callee saved spills in prologue to vecto [...] adds 7285ad9fb95 [docs][statepoint] Expand a bit on problems with mixing ref [...] adds 0546dc6976a [llvm-cov] Remove "default:" label in the switch covering a [...] adds fe7b75e5bf2 Fix -Wsign-compare warning adds ec144f39442 [WebAssembly] Respect `--no-mangle` in more locations adds 034461b4a7e [NativePDB] Fix completion of enum types. adds 490ddc5b44e [docs][statepoints] Reformulate open issues list adds 7634123d275 Annotate switch with LLVM_FALLTHROUGH adds dab692c9913 Use the correct address space when emitting the ctor function list adds 18fccafbec7 Introduce the _Clang scoped attribute token. adds 0a3951c61c7 Type safe version of MachinePassRegistry adds f58624d66ad [Hexagon] Place globals with explicit .sdata section in small data adds dfce0f047ab [clangd] Fix clang-tidy warnings. adds f6fc66cd0f7 Add missing include adds eb8082a6988 Driver: Make -fsanitize=shadow-call-stack compatible with - [...] adds 6f30daf8a99 Add missing include adds 7b03fd136fc [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx adds 5852473383e [llvm-strings] Fix whitespaces to match strings output. adds 0145d4376fa [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to [...] adds 4a07891c955 Add total function byte size and inline function byte size [...] adds 7e4949b3d3a [Hexagon] Implement noreturn optimization adds a29648c8329 [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC. adds 046667c9fa8 [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call adds f3b8cad9b1f [WebAssembly] Hotfix of WebAssemblyInstructionTableSize aft [...] adds 5c069385a7d [HIP] Remove useless sections in linked files adds f3080e73205 [Hexagon] Fix unused variable warning in release builds adds 27669fe71a8 [CostModel][X86] SK_ExtractSubvector is free if the subvect [...] adds 4254aa24dac [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bi [...] adds 4b007fcc9d2 [DWARFv5] Emit normal type units in .debug_info comdats. adds 83e11b3b674 [SystemZ] Add a couple of missing tests adds d6b53d87e36 Fix a nondeterminism in the debug info for VLA size expressions. adds df031b62c19 [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD [...] adds 28c365d873b [MS demangler] Use a slightly shorter unmangling for mangle [...] adds 767d9b163ea [llvm-mca] Account for buffered resources when analyzing "S [...] adds 7f0e49005c6 [AArch64] Support HiSilicon's TSV110 processor adds bf59dc76a80 Allow a double-underscore spelling of Clang attributes usin [...] adds 347e4d14c2c Use the correct address space when bitcasting func pointer [...] adds 16e925a7ecb Revert rL346454: Fix a use-after-free introduced by r344915. adds c669678c1f6 Branch/tag all projects with a single commit in release-tag [...] adds e053b4ae068 [OPENMP][NVPTX]Extend number of constructs executed in SPMD mode. adds 0c5dd9671de [X86] Move the promotion of v16i16->v16i8 for avx512f but n [...] adds 8162d499679 Remove llvm include from debugserver, change LLVM_FALLTHROU [...] adds 0d8dd3d3dc8 [ASTMatchers] overload ignoringParens for Expr adds 8c4fcc6dd9f [clang-tidy] fix PR39583 - ignoring ParenCast for string-li [...] adds 0b2715ed4c1 Revert "Revert rL346454: Fix a use-after-free introduced by [...] adds a08bdc97843 [hwasan] Add entire report to abort message on Android. adds 163b3844160 [WebAssembly] Disable custom NaN payload tests adds 1f69b414ec1 Revert "Exclude wasm target from Windows packaging due to PR39448" adds 9533708db1a Re-land r343606 "[winasan] Unpoison the stack in NtTerminat [...] adds bf31a8e1a73 Work with a gdb-remote target that doesn't handle the qWatc [...] adds 9f5373361af [JumpThreading] Fix exponential time algorithm computing kn [...] adds a55948126a1 [ARM] Add MemOperand to LDRcp to enable DCE. adds d2e172a9e3c [SelectionDAG] Fix a -Wparentheses warning from gcc in an a [...] adds 77048c71df1 [AVR] Reorder the CHECK lines in directmem.ll to match curr [...] adds ad0100b498b Fix ClangFormat issue of recognizing ObjC subscript as C++ [...] adds c36087f929e [libcxx] Provide thread annotations for shared_mutex adds 17b8def7673 [ARM64] [Windows] Handle funclets adds 460d692a102 [GC] Simplify linking of GC builtin GC strategies adds b7c98df1d3d [WebAssembly] Update bleeding-edge cpu features adds b3428b42447 Enable listening for EXC_RESOURCE events, and format mach e [...] adds b19b35e4f69 Add extra diagnostics to test adds 62c644e4ac5 Unbreak the linux bot from the previous commit. Fred neede [...] adds 5d6ad16de04 [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes [...] adds fd50d05d355 test/CodeGen/X86: Relax test case adds b91a72edc92 RegAllocFast: Further cleanups; NFC adds dcad980da5b Fix DragonFlyBSD build adds 6a887d2c52a [PDB] Simplify some ghash code, NFC adds 3bfaaaca6c3 Correct atexit(3) support in MSan/NetBSD No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 9 +- clang-tools-extra/clangd/AST.cpp | 11 +- clang-tools-extra/clangd/ClangdUnit.cpp | 3 + ...uidelines-pro-bounds-array-to-pointer-decay.cpp | 4 + .../unittests/clangd/ClangdUnitTests.cpp | 22 + .../unittests/clangd/QualityTests.cpp | 38 +- .../unittests/clangd/SymbolCollectorTests.cpp | 22 +- clang-tools-extra/unittests/clangd/TestTU.cpp | 36 +- clang-tools-extra/unittests/clangd/TestTU.h | 10 +- clang/docs/LibASTMatchersReference.html | 11 + clang/include/clang/ASTMatchers/ASTMatchers.h | 21 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 4 + clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 +- clang/lib/Basic/Attributes.cpp | 22 +- clang/lib/CodeGen/CGDecl.cpp | 17 +- clang/lib/CodeGen/CGException.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 260 +++++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 6 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 5 +- clang/lib/Driver/SanitizerArgs.cpp | 2 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 4 + clang/lib/Driver/ToolChains/MSVC.cpp | 6 + clang/lib/Format/TokenAnnotator.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 44 +- clang/lib/Sema/ParsedAttr.cpp | 25 +- clang/lib/Tooling/Tooling.cpp | 6 + clang/test/CodeGen/debug-info-vla.c | 4 +- clang/test/CodeGen/ubsan-debuglog-return.c | 2 +- clang/test/CodeGenCXX/debug-info-vla.cpp | 2 +- clang/test/Driver/cl-options.c | 2 + clang/test/Driver/fsanitize.c | 4 + clang/test/FixIt/fixit-cxx11-attributes.cpp | 3 + clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 13 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 11 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 8 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 11 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 4 +- .../nvptx_target_parallel_proc_bind_codegen.cpp | 6 +- .../nvptx_target_parallel_reduction_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 2 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 11 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 26 +- clang/test/Parser/cxx0x-attributes.cpp | 8 + clang/test/Preprocessor/has_attribute.cpp | 38 +- clang/test/SemaCXX/attr-optnone.cpp | 8 + clang/test/SemaCXX/switch-implicit-fallthrough.cpp | 15 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 8 + clang/unittests/Format/FormatTest.cpp | 2 + compiler-rt/lib/asan/asan_win.cc | 12 +- compiler-rt/lib/hwasan/hwasan.cc | 1 + compiler-rt/lib/hwasan/hwasan.h | 2 + compiler-rt/lib/hwasan/hwasan_linux.cc | 7 +- compiler-rt/lib/hwasan/hwasan_report.cc | 51 +- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/msan/msan_interceptors.cc | 68 +- .../lib/xray/tests/unit/fdr_controller_test.cc | 87 +++ compiler-rt/lib/xray/xray_fdr_controller.h | 15 +- compiler-rt/lib/xray/xray_fdr_log_writer.h | 65 ++ compiler-rt/lib/xray/xray_fdr_logging.cc | 7 + .../test/asan/TestCases/Windows/dll_host.cc | 1 + .../test/hwasan/TestCases/abort-message-android.cc | 28 + libcxx/include/shared_mutex | 15 +- lld/COFF/PDB.cpp | 38 +- lld/test/wasm/cxx-mangling.ll | 10 +- lld/wasm/Driver.cpp | 6 +- lld/wasm/Symbols.cpp | 8 +- lld/wasm/Symbols.h | 1 + lld/wasm/Writer.cpp | 6 +- .../SymbolFile/NativePDB/Inputs/bitfields.lldbinit | 5 + .../NativePDB/Inputs/globals-bss.lldbinit | 3 + .../SymbolFile/NativePDB/ast-reconstruction.cpp | 15 +- lldb/lit/SymbolFile/NativePDB/bitfields.cpp | 61 ++ lldb/lit/SymbolFile/NativePDB/globals-bss.cpp | 35 + .../test/functionalities/exec/TestExec.py | 4 + .../TestNoWatchpointSupportInfo.py | 64 ++ .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 6 +- .../Process/Utility/StopInfoMachException.cpp | 51 ++ .../gdb-remote/GDBRemoteCommunicationClient.cpp | 5 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 1 + 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llvm/lib/MC/MCObjectFileInfo.cpp | 9 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 3 + llvm/lib/MC/MCSectionELF.cpp | 3 + llvm/lib/Support/Host.cpp | 11 + llvm/lib/Support/Unix/Path.inc | 4 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64.td | 23 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 147 +++- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 11 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 24 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 30 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 13 + llvm/lib/Target/AArch64/AArch64PfmCounters.td | 19 + llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 13 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 3 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 5 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 5 +- llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 4 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 136 ++-- llvm/lib/Target/ARM/ARMFastISel.cpp | 7 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 275 ++++---- llvm/lib/Target/Hexagon/Hexagon.td | 3 + llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 33 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 11 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 3 + .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 15 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 24 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 10 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 3 - llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 21 +- llvm/lib/Target/PowerPC/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPC.td | 18 +- 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100644 llvm/test/CodeGen/X86/pr39187-g.ll delete mode 100644 llvm/test/DebugInfo/NVPTX/debug-file-loc-only.ll create mode 100644 llvm/test/MC/Hexagon/gprel-shflag.s create mode 100644 llvm/test/Transforms/SCCP/ipsccp-preserve-domtree.ll create mode 100644 llvm/test/tools/llvm-cov/showLineExecutionCounts-lcov.test create mode 100644 llvm/test/tools/llvm-strings/radix-filename.test create mode 100644 llvm/test/tools/llvm-strings/whitespace.test create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.cpp create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (1e933856f34 -> 3bfaaaca6c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-monorepo. from 1e933856f34 [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr [...] adds 762612de08d [NFC] Add utility function for SafetyInfo updates for moveBefore adds 1b48fc32b48 [XRay] Improve FDR trace handling and error messaging adds 140e7074de0 [XRay] Add atomic fences around non-atomic reads and writes adds 21c99463a84 [XRay] Fix enter function tracing for record unwriting adds 174721be954 [XRay] Add a static assertion on size of metadata payload (NFC) adds 988a47c487d [XRay] Add a test for function id encoding/decoding (NFC) adds 723e2c61d29 [lldb] Fix signature in test to match rL346453 adds ea430d2cf42 [ARM] Small reorganisation in ARMParallelDSP adds e14abd1b6a0 [ARM] Enable mixed types in ARM CGP adds 7c53e8aa88e [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds cedab8cbffc [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX. adds 010a2a8a26e [CallSiteSplitting] Only record conditions up to the IDom(c [...] adds b66005f1065 [SelectionDAG] swap select_cc operands to enable folding adds 087fab3f498 [Tooling] Avoid diagnosing missing input files in an edge-c [...] adds f1c1b8c9688 [IPSCCP,PM] Preserve DT in the new pass manager. adds 68344e23d89 [llvm-mca] Use a small vector for instructions in the EntryStage. adds 716b2769ac7 [clangd] Make TestTU build with preamble, and fix the fallout. adds 5d6bfdd9fe9 [llvm-exegesis][NFC] Add a way to declare the default count [...] adds 2bde1dbc44d [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI. adds 24ffd701f13 [clang-cl] Add warning for /Zc:dllexportInlines- when the f [...] adds bc2f97c6b6b Revert r346483: [CallSiteSplitting] Only record conditions [...] adds 7274f3cfc08 [llvm-exegesis] Fix unit tests on PowerPC/AArch64. adds 1147f735880 [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag adds e7fd729d38d [MIPS GlobalISel] narrowScalar G_CONSTANT adds a18f367e343 [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432 adds c5fe2c0b4eb [RISCV] Avoid unnecessary XOR for seteq/setne 0 adds 8525790ec6b [x86] try to form broadcast before widening shuffle elements adds 3667f05fa1a [ARM] Don't promote i1 types in ARM CGP adds b7e9ec5f693 Revert "[VFS] Add "expand tilde" argument to getRealPath." adds 99af66aa4fb AMDGPU: Add testcase to demonstrate a condition with pre-ex [...] adds 76adc99d6c4 revert rL346478 adds 96bb3a56db9 [clangd] Don't treat top-level decls as "local" if they are [...] adds 16a498d61ac [SystemZ] Avoid inserting same value after replication adds b9b243759dd Resubmit "Fix bug in PE/COFF plugin." adds b89cbe785b3 [llvm-cov] Add lcov tracefile export format. adds 77670ca7069 [OPENMP][NVPTX]Allow to use shared memory for the target|te [...] adds 9457816f3cc Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no [...] adds e4464af240e [docs][statepoint] tweak a title adds ebb4aeb0d75 [CostModel] Add SK_ExtractSubvector handling to getInstruct [...] adds ee314e0d62f [NativePDB] Add support for bitfield records. adds e41c9b1e152 [Power9] Allow gpr callee saved spills in prologue to vecto [...] adds 7285ad9fb95 [docs][statepoint] Expand a bit on problems with mixing ref [...] adds 0546dc6976a [llvm-cov] Remove "default:" label in the switch covering a [...] adds fe7b75e5bf2 Fix -Wsign-compare warning adds ec144f39442 [WebAssembly] Respect `--no-mangle` in more locations adds 034461b4a7e [NativePDB] Fix completion of enum types. adds 490ddc5b44e [docs][statepoints] Reformulate open issues list adds 7634123d275 Annotate switch with LLVM_FALLTHROUGH adds dab692c9913 Use the correct address space when emitting the ctor function list adds 18fccafbec7 Introduce the _Clang scoped attribute token. adds 0a3951c61c7 Type safe version of MachinePassRegistry adds f58624d66ad [Hexagon] Place globals with explicit .sdata section in small data adds dfce0f047ab [clangd] Fix clang-tidy warnings. adds f6fc66cd0f7 Add missing include adds eb8082a6988 Driver: Make -fsanitize=shadow-call-stack compatible with - [...] adds 6f30daf8a99 Add missing include adds 7b03fd136fc [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx adds 5852473383e [llvm-strings] Fix whitespaces to match strings output. adds 0145d4376fa [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to [...] adds 4a07891c955 Add total function byte size and inline function byte size [...] adds 7e4949b3d3a [Hexagon] Implement noreturn optimization adds a29648c8329 [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC. adds 046667c9fa8 [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call adds f3b8cad9b1f [WebAssembly] Hotfix of WebAssemblyInstructionTableSize aft [...] adds 5c069385a7d [HIP] Remove useless sections in linked files adds f3080e73205 [Hexagon] Fix unused variable warning in release builds adds 27669fe71a8 [CostModel][X86] SK_ExtractSubvector is free if the subvect [...] adds 4254aa24dac [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bi [...] adds 4b007fcc9d2 [DWARFv5] Emit normal type units in .debug_info comdats. adds 83e11b3b674 [SystemZ] Add a couple of missing tests adds d6b53d87e36 Fix a nondeterminism in the debug info for VLA size expressions. adds df031b62c19 [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD [...] adds 28c365d873b [MS demangler] Use a slightly shorter unmangling for mangle [...] adds 767d9b163ea [llvm-mca] Account for buffered resources when analyzing "S [...] adds 7f0e49005c6 [AArch64] Support HiSilicon's TSV110 processor adds bf59dc76a80 Allow a double-underscore spelling of Clang attributes usin [...] adds 347e4d14c2c Use the correct address space when bitcasting func pointer [...] adds 16e925a7ecb Revert rL346454: Fix a use-after-free introduced by r344915. adds c669678c1f6 Branch/tag all projects with a single commit in release-tag [...] adds e053b4ae068 [OPENMP][NVPTX]Extend number of constructs executed in SPMD mode. adds 0c5dd9671de [X86] Move the promotion of v16i16->v16i8 for avx512f but n [...] adds 8162d499679 Remove llvm include from debugserver, change LLVM_FALLTHROU [...] adds 0d8dd3d3dc8 [ASTMatchers] overload ignoringParens for Expr adds 8c4fcc6dd9f [clang-tidy] fix PR39583 - ignoring ParenCast for string-li [...] adds 0b2715ed4c1 Revert "Revert rL346454: Fix a use-after-free introduced by [...] adds a08bdc97843 [hwasan] Add entire report to abort message on Android. adds 163b3844160 [WebAssembly] Disable custom NaN payload tests adds 1f69b414ec1 Revert "Exclude wasm target from Windows packaging due to PR39448" adds 9533708db1a Re-land r343606 "[winasan] Unpoison the stack in NtTerminat [...] adds bf31a8e1a73 Work with a gdb-remote target that doesn't handle the qWatc [...] adds 9f5373361af [JumpThreading] Fix exponential time algorithm computing kn [...] adds a55948126a1 [ARM] Add MemOperand to LDRcp to enable DCE. adds d2e172a9e3c [SelectionDAG] Fix a -Wparentheses warning from gcc in an a [...] adds 77048c71df1 [AVR] Reorder the CHECK lines in directmem.ll to match curr [...] adds ad0100b498b Fix ClangFormat issue of recognizing ObjC subscript as C++ [...] adds c36087f929e [libcxx] Provide thread annotations for shared_mutex adds 17b8def7673 [ARM64] [Windows] Handle funclets adds 460d692a102 [GC] Simplify linking of GC builtin GC strategies adds b7c98df1d3d [WebAssembly] Update bleeding-edge cpu features adds b3428b42447 Enable listening for EXC_RESOURCE events, and format mach e [...] adds b19b35e4f69 Add extra diagnostics to test adds 62c644e4ac5 Unbreak the linux bot from the previous commit. Fred neede [...] adds 5d6ad16de04 [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes [...] adds fd50d05d355 test/CodeGen/X86: Relax test case adds b91a72edc92 RegAllocFast: Further cleanups; NFC adds dcad980da5b Fix DragonFlyBSD build adds 6a887d2c52a [PDB] Simplify some ghash code, NFC adds 3bfaaaca6c3 Correct atexit(3) support in MSan/NetBSD No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 9 +- clang-tools-extra/clangd/AST.cpp | 11 +- clang-tools-extra/clangd/ClangdUnit.cpp | 3 + ...uidelines-pro-bounds-array-to-pointer-decay.cpp | 4 + .../unittests/clangd/ClangdUnitTests.cpp | 22 + .../unittests/clangd/QualityTests.cpp | 38 +- .../unittests/clangd/SymbolCollectorTests.cpp | 22 +- clang-tools-extra/unittests/clangd/TestTU.cpp | 36 +- clang-tools-extra/unittests/clangd/TestTU.h | 10 +- clang/docs/LibASTMatchersReference.html | 11 + clang/include/clang/ASTMatchers/ASTMatchers.h | 21 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 4 + clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 +- clang/lib/Basic/Attributes.cpp | 22 +- clang/lib/CodeGen/CGDecl.cpp | 17 +- clang/lib/CodeGen/CGException.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 260 +++++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 6 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 5 +- clang/lib/Driver/SanitizerArgs.cpp | 2 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 4 + clang/lib/Driver/ToolChains/MSVC.cpp | 6 + clang/lib/Format/TokenAnnotator.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 44 +- clang/lib/Sema/ParsedAttr.cpp | 25 +- clang/lib/Tooling/Tooling.cpp | 6 + clang/test/CodeGen/debug-info-vla.c | 4 +- clang/test/CodeGen/ubsan-debuglog-return.c | 2 +- clang/test/CodeGenCXX/debug-info-vla.cpp | 2 +- clang/test/Driver/cl-options.c | 2 + clang/test/Driver/fsanitize.c | 4 + clang/test/FixIt/fixit-cxx11-attributes.cpp | 3 + clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 13 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 11 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 8 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 11 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 4 +- .../nvptx_target_parallel_proc_bind_codegen.cpp | 6 +- .../nvptx_target_parallel_reduction_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 2 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 11 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 26 +- clang/test/Parser/cxx0x-attributes.cpp | 8 + clang/test/Preprocessor/has_attribute.cpp | 38 +- clang/test/SemaCXX/attr-optnone.cpp | 8 + clang/test/SemaCXX/switch-implicit-fallthrough.cpp | 15 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 8 + clang/unittests/Format/FormatTest.cpp | 2 + compiler-rt/lib/asan/asan_win.cc | 12 +- compiler-rt/lib/hwasan/hwasan.cc | 1 + compiler-rt/lib/hwasan/hwasan.h | 2 + compiler-rt/lib/hwasan/hwasan_linux.cc | 7 +- compiler-rt/lib/hwasan/hwasan_report.cc | 51 +- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/msan/msan_interceptors.cc | 68 +- .../lib/xray/tests/unit/fdr_controller_test.cc | 87 +++ compiler-rt/lib/xray/xray_fdr_controller.h | 15 +- compiler-rt/lib/xray/xray_fdr_log_writer.h | 65 ++ compiler-rt/lib/xray/xray_fdr_logging.cc | 7 + .../test/asan/TestCases/Windows/dll_host.cc | 1 + .../test/hwasan/TestCases/abort-message-android.cc | 28 + libcxx/include/shared_mutex | 15 +- lld/COFF/PDB.cpp | 38 +- lld/test/wasm/cxx-mangling.ll | 10 +- lld/wasm/Driver.cpp | 6 +- lld/wasm/Symbols.cpp | 8 +- lld/wasm/Symbols.h | 1 + lld/wasm/Writer.cpp | 6 +- .../SymbolFile/NativePDB/Inputs/bitfields.lldbinit | 5 + .../NativePDB/Inputs/globals-bss.lldbinit | 3 + .../SymbolFile/NativePDB/ast-reconstruction.cpp | 15 +- lldb/lit/SymbolFile/NativePDB/bitfields.cpp | 61 ++ lldb/lit/SymbolFile/NativePDB/globals-bss.cpp | 35 + .../test/functionalities/exec/TestExec.py | 4 + .../TestNoWatchpointSupportInfo.py | 64 ++ .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 6 +- .../Process/Utility/StopInfoMachException.cpp | 51 ++ .../gdb-remote/GDBRemoteCommunicationClient.cpp | 5 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 1 + .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 24 +- lldb/source/Target/Target.cpp | 10 +- lldb/tools/debugserver/source/DNBRegisterInfo.cpp | 1 + .../debugserver/source/MacOSX/MachException.cpp | 55 +- lldb/tools/debugserver/source/RNBRemote.cpp | 4 +- llvm/docs/CommandGuide/llvm-cov.rst | 22 +- llvm/docs/ReleaseNotes.rst | 3 +- llvm/docs/Statepoints.rst | 104 +-- llvm/include/llvm/CodeGen/GCs.h | 18 +- .../llvm/CodeGen/LinkAllCodegenComponents.h | 6 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 29 +- llvm/include/llvm/CodeGen/MachinePassRegistry.h | 80 ++- llvm/include/llvm/CodeGen/MachineScheduler.h | 10 +- llvm/include/llvm/CodeGen/RegAllocRegistry.h | 16 +- llvm/include/llvm/CodeGen/SchedulerRegistry.h | 13 +- llvm/include/llvm/IR/Instruction.h | 8 + llvm/include/llvm/IR/Instructions.h | 19 + llvm/include/llvm/MC/MCObjectFileInfo.h | 8 +- llvm/include/llvm/Support/AArch64TargetParser.def | 3 + llvm/include/llvm/Support/VirtualFileSystem.h | 17 +- llvm/include/llvm/Target/TargetPfmCounters.td | 4 + .../include/llvm/Transforms/Scalar/JumpThreading.h | 25 +- llvm/include/llvm/Transforms/Scalar/SCCP.h | 11 +- llvm/include/llvm/XRay/FDRRecordProducer.h | 5 + llvm/include/llvm/XRay/FDRRecords.h | 234 +++++-- llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 7 +- llvm/lib/CodeGen/BuiltinGCs.cpp | 8 +- llvm/lib/CodeGen/MIRPrinter.cpp | 26 +- llvm/lib/CodeGen/MachinePassRegistry.cpp | 38 -- llvm/lib/CodeGen/MachineScheduler.cpp | 3 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 28 + llvm/lib/CodeGen/RegAllocFast.cpp | 427 ++++++------ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 73 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 3 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 3 +- llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 9 +- llvm/lib/IR/Instruction.cpp | 7 + llvm/lib/IR/Instructions.cpp | 29 + llvm/lib/MC/MCObjectFileInfo.cpp | 9 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 3 + llvm/lib/MC/MCSectionELF.cpp | 3 + llvm/lib/Support/Host.cpp | 11 + llvm/lib/Support/Unix/Path.inc | 4 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64.td | 23 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 147 +++- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 11 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 24 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 30 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 13 + llvm/lib/Target/AArch64/AArch64PfmCounters.td | 19 + llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 13 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 3 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 5 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 5 +- llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 4 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 136 ++-- llvm/lib/Target/ARM/ARMFastISel.cpp | 7 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 275 ++++---- llvm/lib/Target/Hexagon/Hexagon.td | 3 + llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 33 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 11 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 3 + .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 15 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 24 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 10 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 3 - llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 21 +- llvm/lib/Target/PowerPC/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPC.td | 18 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 139 +++- llvm/lib/Target/PowerPC/PPCFrameLowering.h | 7 + llvm/lib/Target/PowerPC/PPCPfmCounters.td | 19 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 2 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 4 +- .../Disassembler/WebAssemblyDisassembler.cpp | 2 + llvm/lib/Target/WebAssembly/WebAssembly.td | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 92 ++- llvm/lib/Target/X86/X86InstrAVX512.td | 12 + llvm/lib/Target/X86/X86PfmCounters.td | 4 + llvm/lib/Target/X86/X86SchedBroadwell.td | 6 +- llvm/lib/Target/X86/X86SchedHaswell.td | 6 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 7 + llvm/lib/Target/X86/X86SchedSkylakeClient.td | 6 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 6 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 368 +++++----- llvm/lib/Transforms/IPO/SCCP.cpp | 35 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 37 +- llvm/lib/Transforms/Scalar/LICM.cpp | 14 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 65 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 16 + llvm/lib/XRay/FDRRecordProducer.cpp | 117 +++- llvm/lib/XRay/FDRRecords.cpp | 34 + llvm/lib/XRay/FDRTraceWriter.cpp | 6 +- llvm/lib/XRay/RecordInitializer.cpp | 54 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 94 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 124 ++-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduction.ll | 36 +- .../CostModel/X86/shuffle-extract_subvector.ll | 128 ++-- llvm/test/CodeGen/AArch64/cpus.ll | 1 + llvm/test/CodeGen/AArch64/remat.ll | 1 + llvm/test/CodeGen/AArch64/select_cc.ll | 54 ++ .../test/CodeGen/AArch64/wineh-try-catch-nobase.ll | 49 ++ .../CodeGen/AArch64/wineh-try-catch-realign.ll | 59 ++ llvm/test/CodeGen/AArch64/wineh-try-catch-vla.ll | 52 ++ llvm/test/CodeGen/AArch64/wineh-try-catch.ll | 197 ++++++ .../CodeGen/AMDGPU/optimize-if-exec-masking.mir | 314 ++------- llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir | 36 + llvm/test/CodeGen/ARM/CGP/arm-cgp-calls.ll | 29 +- llvm/test/CodeGen/ARM/CGP/arm-cgp-casts.ll | 242 ++++++- llvm/test/CodeGen/ARM/CGP/arm-cgp-signed-icmps.ll | 7 +- llvm/test/CodeGen/ARM/ldrcppic.ll | 56 ++ llvm/test/CodeGen/AVR/directmem.ll | 33 +- llvm/test/CodeGen/Hexagon/noreturn-stack-elim.ll | 94 +++ .../test/CodeGen/Hexagon/sdata-explicit-section.ll | 6 + .../test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir | 62 ++ llvm/test/CodeGen/Mips/cconv/vector.ll | 121 ++-- llvm/test/CodeGen/RISCV/calling-conv.ll | 24 +- llvm/test/CodeGen/RISCV/fp128.ll | 1 - llvm/test/CodeGen/RISCV/get-setcc-result-type.ll | 4 - llvm/test/CodeGen/RISCV/i32-icmp.ll | 20 + .../RISCV/umulo-128-legalisation-lowering.ll | 196 +++--- llvm/test/CodeGen/SystemZ/fp-round-01.ll | 65 +- llvm/test/CodeGen/SystemZ/vec-move-19.ll | 20 + llvm/test/CodeGen/Thumb/branchless-cmp.ll | 16 +- llvm/test/CodeGen/WebAssembly/immediates.ll | 34 +- .../X86/2009-04-12-FastIselOverflowCrash.ll | 10 +- llvm/test/CodeGen/X86/avx-schedule.ll | 84 +-- llvm/test/CodeGen/X86/avx2-schedule.ll | 40 +- llvm/test/CodeGen/X86/avx512-ext.ll | 96 +-- llvm/test/CodeGen/X86/avx512-fma.ll | 40 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 44 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 64 +- llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll | 14 +- llvm/test/CodeGen/X86/avx512-schedule.ll | 140 ++-- llvm/test/CodeGen/X86/avx512-select.ll | 8 +- llvm/test/CodeGen/X86/avx512-trunc.ll | 26 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 3 +- llvm/test/CodeGen/X86/avx512vpopcntdq-schedule.ll | 8 +- llvm/test/CodeGen/X86/compress_expand.ll | 10 +- llvm/test/CodeGen/X86/dwarf-headers.ll | 12 +- llvm/test/CodeGen/X86/f16c-schedule.ll | 10 +- llvm/test/CodeGen/X86/fma-schedule.ll | 120 ++-- llvm/test/CodeGen/X86/fma4-schedule.ll | 24 +- llvm/test/CodeGen/X86/haddsub-undef.ll | 4 +- .../CodeGen/X86/insert-into-constant-vector.ll | 30 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 7 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 64 +- llvm/test/CodeGen/X86/masked_memop.ll | 6 +- llvm/test/CodeGen/X86/pmul.ll | 32 +- llvm/test/CodeGen/X86/pr39187-g.ll | 121 ++++ .../test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 8 +- llvm/test/CodeGen/X86/prefer-avx256-trunc.ll | 2 +- llvm/test/CodeGen/X86/setcc-lowering.ll | 2 +- .../test/CodeGen/X86/shuffle-of-splat-multiuses.ll | 6 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 4 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 8 +- llvm/test/CodeGen/X86/vec_cast.ll | 34 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 38 +- llvm/test/CodeGen/X86/vector-compare-results.ll | 28 +- llvm/test/CodeGen/X86/vector-popcnt-128.ll | 2 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100644 llvm/test/CodeGen/X86/pr39187-g.ll delete mode 100644 llvm/test/DebugInfo/NVPTX/debug-file-loc-only.ll create mode 100644 llvm/test/MC/Hexagon/gprel-shflag.s create mode 100644 llvm/test/Transforms/SCCP/ipsccp-preserve-domtree.ll create mode 100644 llvm/test/tools/llvm-cov/showLineExecutionCounts-lcov.test create mode 100644 llvm/test/tools/llvm-strings/radix-filename.test create mode 100644 llvm/test/tools/llvm-strings/whitespace.test create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.cpp create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig updated (ada02d0a97b -> ac3f271ad1a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-allnoconfig in repository toolchain/gcc. from ada02d0a97b 2018-11-08 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> adds 742da49920e Add PTWRITE builtins for x86 adds 6ae9e0a7952 2018-11-09 Prathamesh Kulkarni <prathamesh.kulkarni(a)linaro.org> adds baf9970bdc1 * tree.c (fld_type_variant_equal_p): Test user align flag. [...] adds ecf7930550f Fallback in libsanitizer for scudo sanitizer (PR sanitizer/87892). adds 47b2004781c Include patch in LOCAL_PATCHES. adds 3485e096c04 * gimple-fold.c (size_must_be_zero_p): Use value_range API [...] adds de5067215b1 * vr-values.c (vr_values::get_value_range): Use value_rang [...] adds 9ddb6e830d8 * tree-vrp.c (may_contain_p): Do not access m_min/m_max directly. adds 7a262d5d96f * tree-vrp.c (value_range::check): Do not access internals [...] adds 2a6c0337e4d [PR87793] reject non-toplevel unspecs in debug loc exprs on x86 adds f7d5c905780 [PR86438] compare-elim: cope with set of in_b adds 5636c189f3a large-addr-aware for biarch non-w64 mingw32 adds 687f61e6ac8 2018-11-09 Richard Biener <rguenther(a)suse.de> adds 1efe0507bc2 arm - use the new CPU alias option to simplify the list of CPUs. adds 2acd4f1dd30 or1k: libgcc: initial support for openrisc adds 094de206522 or1k: testsuite: initial support for openrisc adds d61fdfe71cf or1k: gcc: initial support for openrisc adds 0f78245e5f4 2018-11-09 Richard Biener <rguenther(a)suse.de> adds 6b37c55fddb Remove extra memory allocation of strings. adds cd4c163c6b4 2018-11-09 Jakub Jelinek <jakub(a)redhat.com> adds 4cd96a00b06 json.cc: fix comment adds 8c8b8b8626b Come up with -fipa-reference-addressable flag. adds 51bdb99d316 Come up with the flag -fipa-stack-alignment. adds d71a5603ee2 Update ChangeLog entry adds 6bfb70cd1c3 syscall: change RLIM_INFINITY from 0xffffffffffffffff to -1 adds 8d5bfcf7746 2018-11-09 Bill Schmidt <wschmidt(a)linux.ibm.com> Jin [...] adds ff31e352b2c PR c/87795 - Excessive alignment permitted for functions an [...] adds d2bdcd52c42 arm - minor cleanups for CPU alias support adds 3dfda6a646d 2018-11-09 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> adds 08cc1019cf2 PR middle-end/81824 - Warn for missing attributes with func [...] adds bcfdeaffea7 cmd/cgo: fix typo in gccgo name mangling recipe adds cc9a0d23a78 gcc.dg/torture/stackalign/builtin-apply-2.c: Skip on v850. adds a621bf1638f Fix whitespace in ChangeLog adds d64015d25eb PR libstdc++/87787 fix UBsan error in std::vector adds f9e599b94fb * affinity-fmt.c: Include inttypes.h if HAVE_INTTYPES_H. [...] adds 01a3f678dbc * config/mips/mips.c (mips_loongson_ext2_prefetch_cookie): [...] adds a25ce2830f2 * gimplify.c (gimplify_scan_omp_clauses): Call sorry_at fo [...] adds 9c99c6cfb4c * c-parser.c (c_parser_omp_requires): Call sorry_at on req [...] adds a4f212f2495 * c-parser.c (c_parser_omp_clause_reduction): Call sorry_a [...] adds 16642817e65 c/ * c-parser.c (c_parser_omp_clause_final): Use c_parser [...] adds 50a42decc9e S/390: Allow relative addressing of literal pool entries adds d8d322de33e 2018-11-09 Bernd Edlinger <bernd.edlinger(a)hotmail.de> adds 13eb159d22d 2018-11-09 Sandra Loosemore <sandra(a)codesourcery.com> adds e48dbef2c3e PR target/87221 * config/netbsd-elf.h (NETBSD_STARTFILE_S [...] adds 961d85be405 * gcc.dg/Walloca-16.c: Ignore conflicting types for built- [...] adds f9f83457694 MAINTAINERS: add myself as or1k maintainer adds 106ffb17286 gcc/testsuite/ChangeLog: adds ac3f271ad1a Daily bump. No new revisions were added by this update. Summary of changes: ChangeLog | 5 + MAINTAINERS | 2 +- gcc/ChangeLog | 248 ++- gcc/DATESTAMP | 2 +- gcc/attribs.c | 189 ++ gcc/attribs.h | 6 + gcc/c-family/ChangeLog | 10 + gcc/c-family/c-attribs.c | 588 +++++- gcc/c-family/c-common.c | 50 +- gcc/c-family/c-common.h | 2 +- gcc/c/ChangeLog | 21 + gcc/c/c-decl.c | 2 +- gcc/c/c-parser.c | 46 +- gcc/cgraph.h | 2 +- gcc/cgraphunit.c | 8 +- gcc/common.opt | 20 +- gcc/common/config/i386/i386-common.c | 15 + .../{csky/csky-common.c => or1k/or1k-common.c} | 17 +- gcc/compare-elim.c | 25 +- gcc/config.gcc | 45 + gcc/config/aarch64/aarch64.c | 32 +- gcc/config/arm/arm-cpus.in | 93 +- gcc/config/arm/arm-tables.opt | 39 - gcc/config/arm/arm-tune.md | 52 +- gcc/config/arm/arm.md | 4 +- gcc/config/arm/arm1020e.md | 36 +- gcc/config/arm/neon.md | 32 + gcc/config/arm/parsecpu.awk | 3 +- gcc/config/i386/cpuid.h | 4 + gcc/config/i386/driver-i386.c | 12 + gcc/config/i386/i386-builtin.def | 4 + gcc/config/i386/i386-c.c | 2 + gcc/config/i386/i386.c | 21 +- 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gcc/testsuite/gcc.target/or1k/div-mul-2.c | 9 + .../gcc.target/{riscv/riscv.exp => or1k/or1k.exp} | 4 +- gcc/testsuite/gcc.target/or1k/return-1.c | 10 + gcc/testsuite/gcc.target/or1k/return-2.c | 19 + gcc/testsuite/gcc.target/or1k/return-3.c | 19 + gcc/testsuite/gcc.target/or1k/return-4.c | 19 + gcc/testsuite/gcc.target/or1k/ror-1.c | 8 + gcc/testsuite/gcc.target/or1k/ror-2.c | 9 + gcc/testsuite/gcc.target/or1k/ror-3.c | 8 + gcc/testsuite/gcc.target/or1k/shftimm-1.c | 8 + gcc/testsuite/gcc.target/or1k/shftimm-2.c | 8 + gcc/testsuite/gcc.target/or1k/sibcall-1.c | 18 + gcc/testsuite/lib/target-supports.exp | 1 + gcc/tree-ssa-loop-ch.c | 46 +- gcc/tree-ssanames.c | 30 + gcc/tree-ssanames.h | 5 +- gcc/tree-vect-loop.c | 9 +- gcc/tree-vrp.c | 22 +- gcc/tree-vrp.h | 4 +- gcc/tree.c | 9 +- gcc/vr-values.c | 25 +- libgcc/ChangeLog | 6 + libgcc/config.host | 12 + libgcc/config/or1k/lib1funcs.S | 222 ++ libgcc/config/{alpha => or1k}/linux-unwind.h | 64 +- libgcc/config/{lm32 => or1k}/sfp-machine.h | 5 +- .../moxie/t-moxie => libgcc/config/or1k/t-or1k | 11 +- libgfortran/ChangeLog | 6 + libgfortran/io/transfer.c | 1 - libgo/go/cmd/cgo/out.go | 2 +- libgo/mksysinfo.sh | 13 +- libgomp/ChangeLog | 11 + libgomp/affinity-fmt.c | 62 +- libgomp/libgomp.h | 14 +- .../libgomp.c-c++-common/task-reduction-13.c | 50 + .../libgomp.c-c++-common/task-reduction-14.c | 51 + libsanitizer/ChangeLog | 10 + libsanitizer/LOCAL_PATCHES | 1 + .../sanitizer_common/sanitizer_linux_libcdep.cc | 4 + libstdc++-v3/ChangeLog | 8 +- libstdc++-v3/include/bits/stl_uninitialized.h | 3 +- 223 files changed, 9000 insertions(+), 717 deletions(-) copy gcc/common/config/{csky/csky-common.c => or1k/or1k-common.c} (74%) copy gcc/config/{moxie => or1k}/constraints.md (53%) copy gcc/config/{c6x => or1k}/elf.h (55%) copy gcc/config/{rtems.opt => or1k/elf.opt} (80%) create mode 100644 gcc/config/or1k/linux.h create mode 100644 gcc/config/or1k/or1k-protos.h create mode 100644 gcc/config/or1k/or1k.c create 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gcc/testsuite/gcc.dg/gomp/workshare-reduction-1.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-10.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-11.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-12.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-13.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-14.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-15.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-16.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-17.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-18.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-19.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-2.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-20.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-21.c create mode 100644 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gcc/testsuite/gcc.dg/gomp/workshare-reduction-8.c create mode 100644 gcc/testsuite/gcc.dg/gomp/workshare-reduction-9.c create mode 100644 gcc/testsuite/gcc.dg/pr87793.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr86438.c copy gcc/testsuite/gcc.dg/tree-ssa/{writeonly.c => writeonly-2.c} (61%) create mode 100644 gcc/testsuite/gcc.target/arm/neon-vect-div-1.c create mode 100644 gcc/testsuite/gcc.target/arm/neon-vect-div-2.c create mode 100644 gcc/testsuite/gcc.target/i386/ipa-stack-alignment.c create mode 100644 gcc/testsuite/gcc.target/i386/ptwrite1.c create mode 100644 gcc/testsuite/gcc.target/i386/ptwrite2.c create mode 100644 gcc/testsuite/gcc.target/or1k/args-1.c create mode 100644 gcc/testsuite/gcc.target/or1k/args-2.c create mode 100644 gcc/testsuite/gcc.target/or1k/cmov-1.c create mode 100644 gcc/testsuite/gcc.target/or1k/cmov-2.c create mode 100644 gcc/testsuite/gcc.target/or1k/div-mul-1.c create mode 100644 gcc/testsuite/gcc.target/or1k/div-mul-2.c copy gcc/testsuite/gcc.target/{riscv/riscv.exp => or1k/or1k.exp} (93%) create mode 100644 gcc/testsuite/gcc.target/or1k/return-1.c create mode 100644 gcc/testsuite/gcc.target/or1k/return-2.c create mode 100644 gcc/testsuite/gcc.target/or1k/return-3.c create mode 100644 gcc/testsuite/gcc.target/or1k/return-4.c create mode 100644 gcc/testsuite/gcc.target/or1k/ror-1.c create mode 100644 gcc/testsuite/gcc.target/or1k/ror-2.c create mode 100644 gcc/testsuite/gcc.target/or1k/ror-3.c create mode 100644 gcc/testsuite/gcc.target/or1k/shftimm-1.c create mode 100644 gcc/testsuite/gcc.target/or1k/shftimm-2.c create mode 100644 gcc/testsuite/gcc.target/or1k/sibcall-1.c create mode 100644 libgcc/config/or1k/lib1funcs.S copy libgcc/config/{alpha => or1k}/linux-unwind.h (54%) copy libgcc/config/{lm32 => or1k}/sfp-machine.h (98%) copy gcc/config/moxie/t-moxie => libgcc/config/or1k/t-or1k (74%) create mode 100644 libgomp/testsuite/libgomp.c-c++-common/task-reduction-13.c create mode 100644 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7 years

[toolchain/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig updated (f410bf4641b -> 3e0e7d8b5b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-allyesconfig in repository toolchain/gcc. from f410bf4641b Daily bump. adds 339ca09f7be [PATCH, arm] Backport -- Fix ICE during thunk generation wi [...] adds 71def3842c8 syscall: change RLIM_INFINITY from 0xffffffffffffffff to -1 adds 60bf7ce71ae 2018-11-09 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> adds 3e0e7d8b5b9 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 23 +++++- gcc/testsuite/ChangeLog | 15 ++++ gcc/testsuite/g++.dg/other/{vthunk1.C => thunk1.C} | 0 gcc/testsuite/g++.dg/other/thunk2a.C | 15 ++++ gcc/testsuite/g++.dg/other/thunk2b.C | 16 ++++ gcc/testsuite/gfortran.dg/read_legacy_comma.f90 | 31 +++++++ libgfortran/ChangeLog | 7 ++ libgfortran/io/transfer.c | 94 ++++++++++++++++------ libgo/mksysinfo.sh | 13 ++- 11 files changed, 196 insertions(+), 29 deletions(-) rename gcc/testsuite/g++.dg/other/{vthunk1.C => thunk1.C} (100%) create mode 100644 gcc/testsuite/g++.dg/other/thunk2a.C create mode 100644 gcc/testsuite/g++.dg/other/thunk2b.C create mode 100644 gcc/testsuite/gfortran.dg/read_legacy_comma.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (1e933856f34 -> 3bfaaaca6c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-monorepo. from 1e933856f34 [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr [...] adds 762612de08d [NFC] Add utility function for SafetyInfo updates for moveBefore adds 1b48fc32b48 [XRay] Improve FDR trace handling and error messaging adds 140e7074de0 [XRay] Add atomic fences around non-atomic reads and writes adds 21c99463a84 [XRay] Fix enter function tracing for record unwriting adds 174721be954 [XRay] Add a static assertion on size of metadata payload (NFC) adds 988a47c487d [XRay] Add a test for function id encoding/decoding (NFC) adds 723e2c61d29 [lldb] Fix signature in test to match rL346453 adds ea430d2cf42 [ARM] Small reorganisation in ARMParallelDSP adds e14abd1b6a0 [ARM] Enable mixed types in ARM CGP adds 7c53e8aa88e [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds cedab8cbffc [X86] Fix VZEROUPPER scheduling info on SNB,HSW,BDW,SXL,SKX. adds 010a2a8a26e [CallSiteSplitting] Only record conditions up to the IDom(c [...] adds b66005f1065 [SelectionDAG] swap select_cc operands to enable folding adds 087fab3f498 [Tooling] Avoid diagnosing missing input files in an edge-c [...] adds f1c1b8c9688 [IPSCCP,PM] Preserve DT in the new pass manager. adds 68344e23d89 [llvm-mca] Use a small vector for instructions in the EntryStage. adds 716b2769ac7 [clangd] Make TestTU build with preamble, and fix the fallout. adds 5d6bfdd9fe9 [llvm-exegesis][NFC] Add a way to declare the default count [...] adds 2bde1dbc44d [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI. adds 24ffd701f13 [clang-cl] Add warning for /Zc:dllexportInlines- when the f [...] adds bc2f97c6b6b Revert r346483: [CallSiteSplitting] Only record conditions [...] adds 7274f3cfc08 [llvm-exegesis] Fix unit tests on PowerPC/AArch64. adds 1147f735880 [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag adds e7fd729d38d [MIPS GlobalISel] narrowScalar G_CONSTANT adds a18f367e343 [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432 adds c5fe2c0b4eb [RISCV] Avoid unnecessary XOR for seteq/setne 0 adds 8525790ec6b [x86] try to form broadcast before widening shuffle elements adds 3667f05fa1a [ARM] Don't promote i1 types in ARM CGP adds b7e9ec5f693 Revert "[VFS] Add "expand tilde" argument to getRealPath." adds 99af66aa4fb AMDGPU: Add testcase to demonstrate a condition with pre-ex [...] adds 76adc99d6c4 revert rL346478 adds 96bb3a56db9 [clangd] Don't treat top-level decls as "local" if they are [...] adds 16a498d61ac [SystemZ] Avoid inserting same value after replication adds b9b243759dd Resubmit "Fix bug in PE/COFF plugin." adds b89cbe785b3 [llvm-cov] Add lcov tracefile export format. adds 77670ca7069 [OPENMP][NVPTX]Allow to use shared memory for the target|te [...] adds 9457816f3cc Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no [...] adds e4464af240e [docs][statepoint] tweak a title adds ebb4aeb0d75 [CostModel] Add SK_ExtractSubvector handling to getInstruct [...] adds ee314e0d62f [NativePDB] Add support for bitfield records. adds e41c9b1e152 [Power9] Allow gpr callee saved spills in prologue to vecto [...] adds 7285ad9fb95 [docs][statepoint] Expand a bit on problems with mixing ref [...] adds 0546dc6976a [llvm-cov] Remove "default:" label in the switch covering a [...] adds fe7b75e5bf2 Fix -Wsign-compare warning adds ec144f39442 [WebAssembly] Respect `--no-mangle` in more locations adds 034461b4a7e [NativePDB] Fix completion of enum types. adds 490ddc5b44e [docs][statepoints] Reformulate open issues list adds 7634123d275 Annotate switch with LLVM_FALLTHROUGH adds dab692c9913 Use the correct address space when emitting the ctor function list adds 18fccafbec7 Introduce the _Clang scoped attribute token. adds 0a3951c61c7 Type safe version of MachinePassRegistry adds f58624d66ad [Hexagon] Place globals with explicit .sdata section in small data adds dfce0f047ab [clangd] Fix clang-tidy warnings. adds f6fc66cd0f7 Add missing include adds eb8082a6988 Driver: Make -fsanitize=shadow-call-stack compatible with - [...] adds 6f30daf8a99 Add missing include adds 7b03fd136fc [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx adds 5852473383e [llvm-strings] Fix whitespaces to match strings output. adds 0145d4376fa [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to [...] adds 4a07891c955 Add total function byte size and inline function byte size [...] adds 7e4949b3d3a [Hexagon] Implement noreturn optimization adds a29648c8329 [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC. adds 046667c9fa8 [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call adds f3b8cad9b1f [WebAssembly] Hotfix of WebAssemblyInstructionTableSize aft [...] adds 5c069385a7d [HIP] Remove useless sections in linked files adds f3080e73205 [Hexagon] Fix unused variable warning in release builds adds 27669fe71a8 [CostModel][X86] SK_ExtractSubvector is free if the subvect [...] adds 4254aa24dac [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bi [...] adds 4b007fcc9d2 [DWARFv5] Emit normal type units in .debug_info comdats. adds 83e11b3b674 [SystemZ] Add a couple of missing tests adds d6b53d87e36 Fix a nondeterminism in the debug info for VLA size expressions. adds df031b62c19 [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD [...] adds 28c365d873b [MS demangler] Use a slightly shorter unmangling for mangle [...] adds 767d9b163ea [llvm-mca] Account for buffered resources when analyzing "S [...] adds 7f0e49005c6 [AArch64] Support HiSilicon's TSV110 processor adds bf59dc76a80 Allow a double-underscore spelling of Clang attributes usin [...] adds 347e4d14c2c Use the correct address space when bitcasting func pointer [...] adds 16e925a7ecb Revert rL346454: Fix a use-after-free introduced by r344915. adds c669678c1f6 Branch/tag all projects with a single commit in release-tag [...] adds e053b4ae068 [OPENMP][NVPTX]Extend number of constructs executed in SPMD mode. adds 0c5dd9671de [X86] Move the promotion of v16i16->v16i8 for avx512f but n [...] adds 8162d499679 Remove llvm include from debugserver, change LLVM_FALLTHROU [...] adds 0d8dd3d3dc8 [ASTMatchers] overload ignoringParens for Expr adds 8c4fcc6dd9f [clang-tidy] fix PR39583 - ignoring ParenCast for string-li [...] adds 0b2715ed4c1 Revert "Revert rL346454: Fix a use-after-free introduced by [...] adds a08bdc97843 [hwasan] Add entire report to abort message on Android. adds 163b3844160 [WebAssembly] Disable custom NaN payload tests adds 1f69b414ec1 Revert "Exclude wasm target from Windows packaging due to PR39448" adds 9533708db1a Re-land r343606 "[winasan] Unpoison the stack in NtTerminat [...] adds bf31a8e1a73 Work with a gdb-remote target that doesn't handle the qWatc [...] adds 9f5373361af [JumpThreading] Fix exponential time algorithm computing kn [...] adds a55948126a1 [ARM] Add MemOperand to LDRcp to enable DCE. adds d2e172a9e3c [SelectionDAG] Fix a -Wparentheses warning from gcc in an a [...] adds 77048c71df1 [AVR] Reorder the CHECK lines in directmem.ll to match curr [...] adds ad0100b498b Fix ClangFormat issue of recognizing ObjC subscript as C++ [...] adds c36087f929e [libcxx] Provide thread annotations for shared_mutex adds 17b8def7673 [ARM64] [Windows] Handle funclets adds 460d692a102 [GC] Simplify linking of GC builtin GC strategies adds b7c98df1d3d [WebAssembly] Update bleeding-edge cpu features adds b3428b42447 Enable listening for EXC_RESOURCE events, and format mach e [...] adds b19b35e4f69 Add extra diagnostics to test adds 62c644e4ac5 Unbreak the linux bot from the previous commit. Fred neede [...] adds 5d6ad16de04 [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes [...] adds fd50d05d355 test/CodeGen/X86: Relax test case adds b91a72edc92 RegAllocFast: Further cleanups; NFC adds dcad980da5b Fix DragonFlyBSD build adds 6a887d2c52a [PDB] Simplify some ghash code, NFC adds 3bfaaaca6c3 Correct atexit(3) support in MSan/NetBSD No new revisions were added by this update. Summary of changes: .../ProBoundsArrayToPointerDecayCheck.cpp | 9 +- clang-tools-extra/clangd/AST.cpp | 11 +- clang-tools-extra/clangd/ClangdUnit.cpp | 3 + ...uidelines-pro-bounds-array-to-pointer-decay.cpp | 4 + .../unittests/clangd/ClangdUnitTests.cpp | 22 + .../unittests/clangd/QualityTests.cpp | 38 +- .../unittests/clangd/SymbolCollectorTests.cpp | 22 +- clang-tools-extra/unittests/clangd/TestTU.cpp | 36 +- clang-tools-extra/unittests/clangd/TestTU.h | 10 +- clang/docs/LibASTMatchersReference.html | 11 + clang/include/clang/ASTMatchers/ASTMatchers.h | 21 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 4 + clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/lib/ASTMatchers/Dynamic/Registry.cpp | 2 +- clang/lib/Basic/Attributes.cpp | 22 +- clang/lib/CodeGen/CGDecl.cpp | 17 +- clang/lib/CodeGen/CGException.cpp | 6 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 260 +++++--- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h | 6 +- clang/lib/CodeGen/CodeGenFunction.h | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 5 +- clang/lib/Driver/SanitizerArgs.cpp | 2 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 4 + clang/lib/Driver/ToolChains/MSVC.cpp | 6 + clang/lib/Format/TokenAnnotator.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 44 +- clang/lib/Sema/ParsedAttr.cpp | 25 +- clang/lib/Tooling/Tooling.cpp | 6 + clang/test/CodeGen/debug-info-vla.c | 4 +- clang/test/CodeGen/ubsan-debuglog-return.c | 2 +- clang/test/CodeGenCXX/debug-info-vla.cpp | 2 +- clang/test/Driver/cl-options.c | 2 + clang/test/Driver/fsanitize.c | 4 + clang/test/FixIt/fixit-cxx11-attributes.cpp | 3 + clang/test/OpenMP/nvptx_SPMD_codegen.cpp | 13 +- clang/test/OpenMP/nvptx_data_sharing.cpp | 11 +- ...tx_distribute_parallel_generic_mode_codegen.cpp | 8 +- clang/test/OpenMP/nvptx_parallel_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 11 +- .../test/OpenMP/nvptx_target_parallel_codegen.cpp | 4 +- .../nvptx_target_parallel_proc_bind_codegen.cpp | 6 +- .../nvptx_target_parallel_reduction_codegen.cpp | 6 +- clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 2 +- ...arget_teams_distribute_parallel_for_codegen.cpp | 11 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 11 +- clang/test/OpenMP/nvptx_teams_codegen.cpp | 26 +- clang/test/Parser/cxx0x-attributes.cpp | 8 + clang/test/Preprocessor/has_attribute.cpp | 38 +- clang/test/SemaCXX/attr-optnone.cpp | 8 + clang/test/SemaCXX/switch-implicit-fallthrough.cpp | 15 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 8 + clang/unittests/Format/FormatTest.cpp | 2 + compiler-rt/lib/asan/asan_win.cc | 12 +- compiler-rt/lib/hwasan/hwasan.cc | 1 + compiler-rt/lib/hwasan/hwasan.h | 2 + compiler-rt/lib/hwasan/hwasan_linux.cc | 7 +- compiler-rt/lib/hwasan/hwasan_report.cc | 51 +- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/msan/msan_interceptors.cc | 68 +- .../lib/xray/tests/unit/fdr_controller_test.cc | 87 +++ compiler-rt/lib/xray/xray_fdr_controller.h | 15 +- compiler-rt/lib/xray/xray_fdr_log_writer.h | 65 ++ compiler-rt/lib/xray/xray_fdr_logging.cc | 7 + .../test/asan/TestCases/Windows/dll_host.cc | 1 + .../test/hwasan/TestCases/abort-message-android.cc | 28 + libcxx/include/shared_mutex | 15 +- lld/COFF/PDB.cpp | 38 +- lld/test/wasm/cxx-mangling.ll | 10 +- lld/wasm/Driver.cpp | 6 +- lld/wasm/Symbols.cpp | 8 +- lld/wasm/Symbols.h | 1 + lld/wasm/Writer.cpp | 6 +- .../SymbolFile/NativePDB/Inputs/bitfields.lldbinit | 5 + .../NativePDB/Inputs/globals-bss.lldbinit | 3 + .../SymbolFile/NativePDB/ast-reconstruction.cpp | 15 +- lldb/lit/SymbolFile/NativePDB/bitfields.cpp | 61 ++ lldb/lit/SymbolFile/NativePDB/globals-bss.cpp | 35 + .../test/functionalities/exec/TestExec.py | 4 + .../TestNoWatchpointSupportInfo.py | 64 ++ .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 6 +- .../Process/Utility/StopInfoMachException.cpp | 51 ++ .../gdb-remote/GDBRemoteCommunicationClient.cpp | 5 + .../SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 1 + .../SymbolFile/NativePDB/UdtRecordCompleter.cpp | 24 +- lldb/source/Target/Target.cpp | 10 +- lldb/tools/debugserver/source/DNBRegisterInfo.cpp | 1 + .../debugserver/source/MacOSX/MachException.cpp | 55 +- lldb/tools/debugserver/source/RNBRemote.cpp | 4 +- llvm/docs/CommandGuide/llvm-cov.rst | 22 +- llvm/docs/ReleaseNotes.rst | 3 +- llvm/docs/Statepoints.rst | 104 +-- llvm/include/llvm/CodeGen/GCs.h | 18 +- .../llvm/CodeGen/LinkAllCodegenComponents.h | 6 +- llvm/include/llvm/CodeGen/MachineFrameInfo.h | 29 +- llvm/include/llvm/CodeGen/MachinePassRegistry.h | 80 ++- llvm/include/llvm/CodeGen/MachineScheduler.h | 10 +- llvm/include/llvm/CodeGen/RegAllocRegistry.h | 16 +- llvm/include/llvm/CodeGen/SchedulerRegistry.h | 13 +- llvm/include/llvm/IR/Instruction.h | 8 + llvm/include/llvm/IR/Instructions.h | 19 + llvm/include/llvm/MC/MCObjectFileInfo.h | 8 +- llvm/include/llvm/Support/AArch64TargetParser.def | 3 + llvm/include/llvm/Support/VirtualFileSystem.h | 17 +- llvm/include/llvm/Target/TargetPfmCounters.td | 4 + .../include/llvm/Transforms/Scalar/JumpThreading.h | 25 +- llvm/include/llvm/Transforms/Scalar/SCCP.h | 11 +- llvm/include/llvm/XRay/FDRRecordProducer.h | 5 + llvm/include/llvm/XRay/FDRRecords.h | 234 +++++-- llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 7 +- llvm/lib/CodeGen/BuiltinGCs.cpp | 8 +- llvm/lib/CodeGen/MIRPrinter.cpp | 26 +- llvm/lib/CodeGen/MachinePassRegistry.cpp | 38 -- llvm/lib/CodeGen/MachineScheduler.cpp | 3 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 28 + llvm/lib/CodeGen/RegAllocFast.cpp | 427 ++++++------ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 73 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 3 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 3 +- llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 9 +- llvm/lib/IR/Instruction.cpp | 7 + llvm/lib/IR/Instructions.cpp | 29 + llvm/lib/MC/MCObjectFileInfo.cpp | 9 +- llvm/lib/MC/MCParser/ELFAsmParser.cpp | 3 + llvm/lib/MC/MCSectionELF.cpp | 3 + llvm/lib/Support/Host.cpp | 11 + llvm/lib/Support/Unix/Path.inc | 4 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64.td | 23 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 147 +++- llvm/lib/Target/AArch64/AArch64FrameLowering.h | 11 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 24 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 30 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + llvm/lib/Target/AArch64/AArch64MCInstLower.cpp | 13 + llvm/lib/Target/AArch64/AArch64PfmCounters.td | 19 + llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 13 +- llvm/lib/Target/AArch64/AArch64RegisterInfo.h | 3 + llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 5 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 3 +- llvm/lib/Target/AArch64/CMakeLists.txt | 1 + llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 5 +- llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 4 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 +- llvm/lib/Target/ARM/ARMCodeGenPrepare.cpp | 136 ++-- llvm/lib/Target/ARM/ARMFastISel.cpp | 7 +- llvm/lib/Target/ARM/ARMParallelDSP.cpp | 275 ++++---- llvm/lib/Target/Hexagon/Hexagon.td | 3 + llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 33 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.h | 2 + llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 11 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 3 + .../lib/Target/Hexagon/HexagonTargetObjectFile.cpp | 15 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 24 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp | 10 +- .../NVPTX/MCTargetDesc/NVPTXTargetStreamer.h | 3 - llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 21 +- llvm/lib/Target/PowerPC/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPC.td | 18 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 139 +++- llvm/lib/Target/PowerPC/PPCFrameLowering.h | 7 + llvm/lib/Target/PowerPC/PPCPfmCounters.td | 19 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 2 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 4 +- .../Disassembler/WebAssemblyDisassembler.cpp | 2 + llvm/lib/Target/WebAssembly/WebAssembly.td | 3 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 92 ++- llvm/lib/Target/X86/X86InstrAVX512.td | 12 + llvm/lib/Target/X86/X86PfmCounters.td | 4 + llvm/lib/Target/X86/X86SchedBroadwell.td | 6 +- llvm/lib/Target/X86/X86SchedHaswell.td | 6 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 7 + llvm/lib/Target/X86/X86SchedSkylakeClient.td | 6 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 6 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 368 +++++----- llvm/lib/Transforms/IPO/SCCP.cpp | 35 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 37 +- llvm/lib/Transforms/Scalar/LICM.cpp | 14 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 65 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 16 + llvm/lib/XRay/FDRRecordProducer.cpp | 117 +++- llvm/lib/XRay/FDRRecords.cpp | 34 + llvm/lib/XRay/FDRTraceWriter.cpp | 6 +- llvm/lib/XRay/RecordInitializer.cpp | 54 +- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 94 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 124 ++-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 70 +- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 144 ++-- llvm/test/Analysis/CostModel/X86/reduction.ll | 36 +- .../CostModel/X86/shuffle-extract_subvector.ll | 128 ++-- llvm/test/CodeGen/AArch64/cpus.ll | 1 + llvm/test/CodeGen/AArch64/remat.ll | 1 + llvm/test/CodeGen/AArch64/select_cc.ll | 54 ++ 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| 20 + .../RISCV/umulo-128-legalisation-lowering.ll | 196 +++--- llvm/test/CodeGen/SystemZ/fp-round-01.ll | 65 +- llvm/test/CodeGen/SystemZ/vec-move-19.ll | 20 + llvm/test/CodeGen/Thumb/branchless-cmp.ll | 16 +- llvm/test/CodeGen/WebAssembly/immediates.ll | 34 +- .../X86/2009-04-12-FastIselOverflowCrash.ll | 10 +- llvm/test/CodeGen/X86/avx-schedule.ll | 84 +-- llvm/test/CodeGen/X86/avx2-schedule.ll | 40 +- llvm/test/CodeGen/X86/avx512-ext.ll | 96 +-- llvm/test/CodeGen/X86/avx512-fma.ll | 40 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 44 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 64 +- llvm/test/CodeGen/X86/avx512-masked-memop-64-32.ll | 14 +- llvm/test/CodeGen/X86/avx512-schedule.ll | 140 ++-- llvm/test/CodeGen/X86/avx512-select.ll | 8 +- llvm/test/CodeGen/X86/avx512-trunc.ll | 26 +- llvm/test/CodeGen/X86/avx512-vec-cmp.ll | 3 +- llvm/test/CodeGen/X86/avx512vpopcntdq-schedule.ll | 8 +- llvm/test/CodeGen/X86/compress_expand.ll | 10 +- llvm/test/CodeGen/X86/dwarf-headers.ll | 12 +- llvm/test/CodeGen/X86/f16c-schedule.ll | 10 +- llvm/test/CodeGen/X86/fma-schedule.ll | 120 ++-- llvm/test/CodeGen/X86/fma4-schedule.ll | 24 +- llvm/test/CodeGen/X86/haddsub-undef.ll | 4 +- .../CodeGen/X86/insert-into-constant-vector.ll | 30 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 7 +- llvm/test/CodeGen/X86/masked_gather_scatter.ll | 64 +- llvm/test/CodeGen/X86/masked_memop.ll | 6 +- llvm/test/CodeGen/X86/pmul.ll | 32 +- llvm/test/CodeGen/X86/pr39187-g.ll | 121 ++++ .../test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 8 +- llvm/test/CodeGen/X86/prefer-avx256-trunc.ll | 2 +- llvm/test/CodeGen/X86/setcc-lowering.ll | 2 +- .../test/CodeGen/X86/shuffle-of-splat-multiuses.ll | 6 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 4 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 8 +- llvm/test/CodeGen/X86/vec_cast.ll | 34 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 38 +- llvm/test/CodeGen/X86/vector-compare-results.ll | 28 +- llvm/test/CodeGen/X86/vector-popcnt-128.ll | 2 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llvm/tools/llvm-mca/lib/InstrBuilder.cpp | 29 +- llvm/tools/llvm-mca/lib/Stages/EntryStage.cpp | 15 +- llvm/tools/llvm-strings/llvm-strings.cpp | 10 +- llvm/unittests/Support/Host.cpp | 5 + llvm/unittests/Support/TargetParserTest.cpp | 33 +- llvm/unittests/Support/VirtualFileSystemTest.cpp | 4 +- llvm/unittests/XRay/FDRProducerConsumerTest.cpp | 100 ++- .../tools/llvm-exegesis/AArch64/TargetTest.cpp | 7 + .../tools/llvm-exegesis/PowerPC/TargetTest.cpp | 7 + llvm/utils/TableGen/ExegesisEmitter.cpp | 32 +- llvm/utils/release/build_llvm_package.bat | 4 +- llvm/utils/release/tag.sh | 46 +- 329 files changed, 7178 insertions(+), 3916 deletions(-) create mode 100644 compiler-rt/test/hwasan/TestCases/abort-message-android.cc create mode 100644 lldb/lit/SymbolFile/NativePDB/Inputs/bitfields.lldbinit create mode 100644 lldb/lit/SymbolFile/NativePDB/Inputs/globals-bss.lldbinit create mode 100644 lldb/lit/SymbolFile/NativePDB/bitfields.cpp create mode 100644 lldb/lit/SymbolFile/NativePDB/globals-bss.cpp create mode 100644 lldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_ [...] create mode 100644 llvm/lib/Target/AArch64/AArch64PfmCounters.td create mode 100644 llvm/lib/Target/PowerPC/PPCPfmCounters.td create mode 100644 llvm/test/CodeGen/AArch64/select_cc.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-try-catch-nobase.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-try-catch-vla.ll create mode 100644 llvm/test/CodeGen/AArch64/wineh-try-catch.ll create mode 100644 llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir create mode 100644 llvm/test/CodeGen/ARM/ldrcppic.ll create mode 100644 llvm/test/CodeGen/Hexagon/noreturn-stack-elim.ll create mode 100644 llvm/test/CodeGen/Hexagon/sdata-explicit-section.ll create mode 100644 llvm/test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir create mode 100644 llvm/test/CodeGen/SystemZ/vec-move-19.ll create mode 100644 llvm/test/CodeGen/X86/pr39187-g.ll delete mode 100644 llvm/test/DebugInfo/NVPTX/debug-file-loc-only.ll create mode 100644 llvm/test/MC/Hexagon/gprel-shflag.s create mode 100644 llvm/test/Transforms/SCCP/ipsccp-preserve-domtree.ll create mode 100644 llvm/test/tools/llvm-cov/showLineExecutionCounts-lcov.test create mode 100644 llvm/test/tools/llvm-strings/radix-filename.test create mode 100644 llvm/test/tools/llvm-strings/whitespace.test create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.cpp create mode 100644 llvm/tools/llvm-cov/CoverageExporterLcov.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allyesconfig updated (0e2779e98d -> 00a9f4ce3d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-mainline-allyesconfig in repository toolchain/binutils-gdb. from 0e2779e98d PowerPC, don't use bfd reloc howto in md_assemble adds 13daa8e488 S/390: Fix optional operand handling after memory addresses adds 9325300dc2 [gdb/symtab] Fix language of duplicate static minimal symbol adds 73af69e749 Allow for compilers that do not produce aligned .rdat sectio [...] adds 0f2064107b [ARC] Fix local got entry list. adds 0d0b0a378e [ARC] Update ld tests. adds 71f5e3f7b6 Enhance the strings program so that it can display multibyte [...] adds dcd9adc5cb oops - add missing piece of previous delta adds d2eb0fb5a0 Stop corruption of ihex output shen addresses are sign extended. adds fda57deda7 Updated French translation for the ld subdirectory. adds d07b621f4c [ARC] More fixes for TLS. adds 20b233dc48 Fixed warning from previous patch. Added Changelog. adds dfbfec241a Correct comment concerning PE timestamp insertion. adds 5d762de01c Fix a typo in iconv.m4. adds 4b905ae1b4 [PowerPC] Document requirements for VSX feature adds 9c122c7f9c Fix unsigned overflow in minsyms reader. adds 2179fbc36d Return scoped_fd from open_source_file and find_and_open_source adds eefce37f62 Remove a VEC from remote.c adds 00a9f4ce3d Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 32 +++++++ bfd/arc-got.h | 66 +++++++------- bfd/elf32-arc.c | 119 +++++++++++++++++++------- bfd/ihex.c | 18 ++++ bfd/peXXigen.c | 3 +- bfd/version.h | 2 +- binutils/ChangeLog | 13 +++ binutils/configure | 2 +- binutils/strings.c | 81 +++++++++++++++++- binutils/testsuite/binutils-all/strings-1.bin | Bin 0 -> 31 bytes binutils/testsuite/binutils-all/strings.exp | 41 +++++++++ binutils/testsuite/config/default.exp | 6 ++ config/ChangeLog | 5 ++ config/iconv.m4 | 2 +- gas/config/tc-s390.c | 47 +++++----- gas/testsuite/gas/s390/s390.exp | 1 + gas/testsuite/gas/s390/zarch-optargs.d | 12 +++ gas/testsuite/gas/s390/zarch-optargs.s | 6 ++ gdb/ChangeLog | 42 +++++++++ gdb/common/scoped_fd.h | 19 ++++ gdb/configure | 2 +- gdb/doc/ChangeLog | 5 ++ gdb/doc/gdb.texinfo | 12 +-- gdb/minsyms.c | 5 +- gdb/psymtab.c | 7 +- gdb/remote.c | 51 +++++------ gdb/source.c | 65 +++++++------- gdb/source.h | 10 ++- gdb/symtab.c | 14 +-- gdb/testsuite/ChangeLog | 6 ++ gdb/testsuite/gdb.base/msym-lang-main.c | 28 ++++++ gdb/testsuite/gdb.base/msym-lang.c | 22 +++++ gdb/testsuite/gdb.base/msym-lang.exp | 25 ++++++ gdb/tui/tui-source.c | 47 +++++----- intl/ChangeLog | 4 + intl/configure | 2 +- ld/ChangeLog | 16 ++++ ld/po/fr.po | 6 +- ld/scripttempl/pe.sc | 1 + ld/scripttempl/pep.sc | 1 + ld/testsuite/ld-arc/arclinux-nps.d | 2 +- ld/testsuite/ld-arc/tls_gd-01.d | 4 +- 42 files changed, 637 insertions(+), 215 deletions(-) create mode 100755 binutils/testsuite/binutils-all/strings-1.bin create mode 100644 binutils/testsuite/binutils-all/strings.exp create mode 100644 gas/testsuite/gas/s390/zarch-optargs.d create mode 100644 gas/testsuite/gas/s390/zarch-optargs.s create mode 100644 gdb/testsuite/gdb.base/msym-lang-main.c create mode 100644 gdb/testsuite/gdb.base/msym-lang.c create mode 100644 gdb/testsuite/gdb.base/msym-lang.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

[toolchain/linux-next] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig updated (24ccea7e102d -> aa4330e15c26)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig in repository toolchain/linux-next. from 24ccea7e102d Merge tag 'xfs-4.20-fixes-1' of git://git.kernel.org/pub/s [...] adds ef5febae1543 s390/decompressor: add missing FORCE to build targets adds b44b136a3773 s390/vdso: add missing FORCE to build targets adds 5a2e1853d689 s390: avoid vmlinux segments overlap adds a8874e7e8a88 mm: make the __PAGETABLE_PxD_FOLDED defines non-empty adds 1071fc5779d9 mm: introduce mm_[p4d|pud|pmd]_folded adds 6d212db11947 mm: add mm_pxd_folded checks to pgtable_bytes accounting f [...] adds e12e4044aede s390/mm: fix mis-accounting of pgtable_bytes adds c43e1c5a801f s390/cpum_sf: Rework attribute definition for diagnostic sampling adds 9fed920e6817 s390/kasan: increase instrumented stack size to 64k adds a541f0ebcc08 s390/mm: Fix ERROR: "__node_distance" undefined! adds 02522ad77fb7 s390: update defconfigs adds 0bb2ae1b26e1 s390/perf: Change CPUM_CF return code in event init function adds 3541833fd1f2 Merge tag 's390-4.20-2' of git://git.kernel.org/pub/scm/li [...] adds c0fae7e2452b MIPS: OCTEON: fix out of bounds array access on CN68XX adds d01501f85249 MIPS: Fix `dma_alloc_coherent' returning a non-coherent al [...] adds 26eaed4671af Merge tag 'mips_fixes_4.20_2' of git://git.kernel.org/pub/ [...] adds c2c6d3ce0d9a ceph: add destination file data sync before doing any remote copy adds 71f2cc64d027 ceph: quota: fix null pointer dereference in quota check adds 23c625ce3065 libceph: assume argonaut on the server side adds d757a3b01e72 Merge tag 'ceph-for-4.20-rc2' of https://github.com/ceph/c [...] adds df376b2ed51a block: respect virtual boundary mask in bvecs adds 6961cd4d0fde ubd: fix missing lock around request issue adds e31d36b0a453 MAINTAINERS: Fix remaining pointers to obsolete libata.git adds f3587d76da05 block: Clear kernel memory before copying to user adds 0033dfd92a56 ubd: fix missing initialization of io_req adds bb39ba6a8dea sata_rcar: convert to SPDX identifiers adds 21d3bbdd4c34 nvmet: don't try to add ns to p2p map unless it actually uses it adds 8f676b8508c2 nvme: make sure ns head inherits underlying device limits adds d39aa4979219 Revert "nvmet-rdma: use a private workqueue for delete" adds 1adfc5e4136f block: make sure discard bio is aligned with logical block size adds ba5d73851e71 block: cleanup __blkdev_issue_discard() adds 34ffec60b27a block: make sure writesame bio is aligned with logical block size adds dc5db2186550 Merge tag 'for-linus-20181109' of git://git.kernel.dk/linux-block adds 6778be4e5209 of/device: Really only set bus DMA mask when appropriate adds 89c38422e072 of, numa: Validate some distance map rules adds aa4330e15c26 Merge tag 'devicetree-fixes-for-4.20-2' of git://git.kerne [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 6 +- arch/arm/include/asm/pgtable-2level.h | 2 +- arch/m68k/include/asm/pgtable_mm.h | 4 +- arch/microblaze/include/asm/pgtable.h | 2 +- arch/mips/cavium-octeon/executive/cvmx-helper.c | 2 +- arch/mips/mm/dma-noncoherent.c | 2 +- arch/nds32/include/asm/pgtable.h | 2 +- arch/parisc/include/asm/pgtable.h | 2 +- arch/s390/Makefile | 2 +- arch/s390/boot/compressed/Makefile | 16 ++--- arch/s390/configs/debug_defconfig | 14 ++++- arch/s390/configs/performance_defconfig | 13 +++- arch/s390/defconfig | 79 +++++++++++++------------ arch/s390/include/asm/mmu_context.h | 5 -- arch/s390/include/asm/pgalloc.h | 6 +- arch/s390/include/asm/pgtable.h | 18 ++++++ arch/s390/include/asm/thread_info.h | 2 +- arch/s390/include/asm/tlb.h | 6 +- arch/s390/kernel/entry.S | 6 +- arch/s390/kernel/perf_cpum_cf.c | 2 +- arch/s390/kernel/perf_cpum_sf.c | 33 +++++++++-- arch/s390/kernel/vdso32/Makefile | 6 +- arch/s390/kernel/vdso64/Makefile | 6 +- arch/s390/kernel/vmlinux.lds.S | 4 +- arch/s390/mm/pgalloc.c | 1 + arch/s390/numa/numa.c | 1 + arch/um/drivers/ubd_kern.c | 12 ++-- block/bio.c | 1 + block/blk-lib.c | 26 +++----- block/blk-merge.c | 5 +- block/blk.h | 12 +++- drivers/ata/sata_rcar.c | 6 +- drivers/nvme/host/core.c | 4 +- drivers/nvme/host/multipath.c | 1 + drivers/nvme/target/core.c | 2 +- drivers/nvme/target/rdma.c | 19 ++---- drivers/of/device.c | 4 +- drivers/of/of_numa.c | 9 ++- fs/ceph/file.c | 11 +++- fs/ceph/mds_client.c | 12 +--- fs/ceph/quota.c | 3 +- include/asm-generic/4level-fixup.h | 2 +- include/asm-generic/5level-fixup.h | 2 +- include/asm-generic/pgtable-nop4d-hack.h | 2 +- include/asm-generic/pgtable-nop4d.h | 2 +- include/asm-generic/pgtable-nopmd.h | 2 +- include/asm-generic/pgtable-nopud.h | 2 +- include/asm-generic/pgtable.h | 16 +++++ include/linux/ceph/ceph_features.h | 8 +-- include/linux/mm.h | 8 +++ 50 files changed, 245 insertions(+), 168 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years

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Tcwg-commits November 2018