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from bd8934fa436 [X86] Add CMOV pseudos for VR128X and VR256X register class [...]
new df9220fd714 [RISCV][NFCI] Handle redundant splitf64+buildpairf64 pairs [...]
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lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 51 ++++++++--------------------------
1 file changed, 12 insertions(+), 39 deletions(-)
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from 248336fd97 Add template type and value parameter metadata nodes to temp [...]
new 21352e1ac8 [OPENMP] Add reverse_offload clause to requires directive
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include/clang/AST/OpenMPClause.h | 31 ++++++++++++++++++++++
include/clang/AST/RecursiveASTVisitor.h | 6 +++++
include/clang/Basic/OpenMPKinds.def | 2 ++
include/clang/Sema/Sema.h | 4 +++
lib/AST/OpenMPClause.cpp | 2 ++
lib/AST/StmtPrinter.cpp | 4 +++
lib/AST/StmtProfile.cpp | 3 +++
lib/Basic/OpenMPKinds.cpp | 2 ++
lib/CodeGen/CGStmtOpenMP.cpp | 1 +
lib/Parse/ParseOpenMP.cpp | 1 +
lib/Sema/SemaOpenMP.cpp | 13 +++++++++
lib/Sema/TreeTransform.h | 6 +++++
lib/Serialization/ASTReader.cpp | 5 ++++
lib/Serialization/ASTWriter.cpp | 2 ++
test/OpenMP/requires_unified_address_ast_print.cpp | 3 +++
test/OpenMP/requires_unified_address_messages.cpp | 6 ++++-
tools/libclang/CIndex.cpp | 3 +++
17 files changed, 93 insertions(+), 1 deletion(-)
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from ac37b9e58f5 RISC-V: Add macro for ilp32e ABI. Cleanup white space.
new f1625820c29 * gimple-ssa-sprintf.c (struct fmtresult): Add new member [...]
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gcc/ChangeLog | 10 ++++
gcc/gimple-ssa-sprintf.c | 58 +++++++++++++++++--
gcc/testsuite/ChangeLog | 4 ++
gcc/testsuite/gcc.dg/warn-sprintf-no-nul.c | 90 ++++++++++++++++++++++++++++++
4 files changed, 158 insertions(+), 4 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/warn-sprintf-no-nul.c
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from 58f59fb8cc8 [X86] PUSH/POP 'mem-mem' instructions are not RMW - these a [...]
new 946f07773b3 [X86] Don't break CMOV pseudo instructions down by type. Ju [...]
new bd8934fa436 [X86] Add CMOV pseudos for VR128X and VR256X register class [...]
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lib/Target/X86/X86ISelLowering.cpp | 45 ++++++++++++------------------
lib/Target/X86/X86InstrCompiler.td | 56 ++++++++++++++++++++++++++++----------
2 files changed, 60 insertions(+), 41 deletions(-)
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from 41417a74a24 Enable LRA register allocator for PDP11. -- missed chec [...]
new ac37b9e58f5 RISC-V: Add macro for ilp32e ABI. Cleanup white space.
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gcc/ChangeLog | 5 +++++
gcc/config/riscv/riscv-c.c | 27 +++++++++++++++------------
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from fff44e68bae Emit template type and value parameter DIEs for template va [...]
new 58f59fb8cc8 [X86] PUSH/POP 'mem-mem' instructions are not RMW - these a [...]
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lib/Target/X86/X86InstrInfo.td | 10 +++++-----
lib/Target/X86/X86Schedule.td | 1 +
test/CodeGen/X86/schedule-x86_32.ll | 18 +++++++++---------
test/CodeGen/X86/schedule-x86_64.ll | 20 ++++++++++----------
4 files changed, 25 insertions(+), 24 deletions(-)
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from 796acd42b6d [X86] Move Atomic binops to use WriteALURMW schedule class
new fff44e68bae Emit template type and value parameter DIEs for template va [...]
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include/llvm-c/DebugInfo.h | 34 +++----
include/llvm/IR/DIBuilder.h | 4 +-
include/llvm/IR/DebugInfoMetadata.h | 34 +++----
lib/AsmParser/LLParser.cpp | 13 +--
lib/Bitcode/Reader/MetadataLoader.cpp | 22 ++++-
lib/Bitcode/Writer/BitcodeWriter.cpp | 4 +-
lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 3 +
lib/IR/AsmWriter.cpp | 1 +
lib/IR/DIBuilder.cpp | 8 +-
lib/IR/DebugInfo.cpp | 54 +++++------
lib/IR/DebugInfoMetadata.cpp | 25 +++---
lib/IR/LLVMContextImpl.h | 8 +-
test/Assembler/diglobalvariable.ll | 9 +-
test/DebugInfo/X86/template.ll | 134 ++++++++++++++++------------
tools/llvm-c-test/debuginfo.c | 22 +++--
unittests/IR/MetadataTest.cpp | 76 +++++++++-------
16 files changed, 249 insertions(+), 202 deletions(-)
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from f89b7c303f [test] Use --sysroot instead of -B in print-multi-directory.c
new 248336fd97 Add template type and value parameter metadata nodes to temp [...]
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lib/CodeGen/CGDebugInfo.cpp | 56 +++++++++++++++++++++++---
lib/CodeGen/CGDebugInfo.h | 9 ++++-
test/CodeGenCXX/debug-info-template-member.cpp | 25 ++++++++++++
3 files changed, 84 insertions(+), 6 deletions(-)
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from 90f36954449 Enable LRA register allocator for PDP11. * config/p [...]
new 41417a74a24 Enable LRA register allocator for PDP11. -- missed chec [...]
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gcc/ChangeLog | 10 ++++++++++
1 file changed, 10 insertions(+)
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from e9bd0c92b04 [X86][Btver2] Fix MMX PSHUFB schedule
new 796acd42b6d [X86] Move Atomic binops to use WriteALURMW schedule class
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lib/Target/X86/X86InstrCompiler.td | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
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