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from a6970ac4e2a [Hexagon] Avoid unused variable warnings in Release builds.
new 00b5bff2c2d [InstCombine] remove extract-of-select vector transform (2nd try)
new 408651e8a47 [llvm-objcopy] Refactor code to include initialize method
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Summary of changes:
.../InstCombine/InstCombineVectorOps.cpp | 33 -------
.../InstCombine/select-extractelement.ll | 55 +++++-------
test/Transforms/LoopVectorize/minmax_reduction.ll | 58 ++++++------
tools/llvm-objcopy/Object.cpp | 100 ++++++++++++++-------
tools/llvm-objcopy/Object.h | 26 +++++-
5 files changed, 144 insertions(+), 128 deletions(-)
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from 0e312680f1 Revert "[NVPTX] added match.{any,all}.sync instructions, int [...]
new 2d4bdbc5f5 [x86] remove RUNs that were checking fully optimized IR
new 5572f1b64d Reinstall the patch "Use EmitPointerWithAlignment to get ali [...]
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Summary of changes:
lib/CodeGen/CGAtomic.cpp | 16 +-
test/CodeGen/avx512-reduceMinMaxIntrin.c | 2852 ++++++++++++++++++++++++++----
test/CodeGen/avx512f-builtins.c | 115 +-
test/CodeGenCXX/atomic-align.cpp | 30 +
4 files changed, 2584 insertions(+), 429 deletions(-)
create mode 100644 test/CodeGenCXX/atomic-align.cpp
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from ccc98ee70f6 [X86] [ASM INTEL SYNTAX] fix for incorrect assembler code g [...]
new ba3e4c801a5 Revert "[NVPTX] added match.{any,all}.sync instructions, in [...]
new a6970ac4e2a [Hexagon] Avoid unused variable warnings in Release builds.
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Summary of changes:
include/llvm/IR/IntrinsicsNVVM.td | 27 -------
lib/Target/Hexagon/HexagonBitTracker.cpp | 6 +-
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 33 ---------
lib/Target/NVPTX/NVPTXISelDAGToDAG.h | 1 -
lib/Target/NVPTX/NVPTXInstrInfo.td | 1 -
lib/Target/NVPTX/NVPTXIntrinsics.td | 57 ---------------
test/CodeGen/NVPTX/match.ll | 117 -------------------------------
7 files changed, 4 insertions(+), 238 deletions(-)
delete mode 100644 test/CodeGen/NVPTX/match.ll
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from 31d5daeb5c [analyzer] Fix crash on modeling of pointer arithmetic
new 0e312680f1 Revert "[NVPTX] added match.{any,all}.sync instructions, int [...]
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include/clang/Basic/BuiltinsNVPTX.def | 7 -------
lib/CodeGen/CGBuiltin.cpp | 15 ---------------
lib/Headers/__clang_cuda_intrinsics.h | 32 +++-----------------------------
test/CodeGen/builtins-nvptx-ptx60.cu | 22 +---------------------
4 files changed, 4 insertions(+), 72 deletions(-)
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from 7c4fc66ad6 [MinGW] Don't link -lmsvcrt if a different msvcrt version is [...]
new 31d5daeb5c [analyzer] Fix crash on modeling of pointer arithmetic
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lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp | 8 +++++---
test/Analysis/ptr-arith.cpp | 6 ++++++
2 files changed, 11 insertions(+), 3 deletions(-)
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from cbd061d36af [SLP] Add a test for PR32086, NFC.
new 70035721e40 [SelectionDAG] Teach simplifyDemandedBits to handle shifts [...]
new ccc98ee70f6 [X86] [ASM INTEL SYNTAX] fix for incorrect assembler code g [...]
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include/llvm/CodeGen/SelectionDAGNodes.h | 3 +
lib/CodeGen/SelectionDAG/TargetLowering.cpp | 132 +++++++++++----------
lib/Target/ARM/ARMInstrNEON.td | 6 +
lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp | 1 +
test/CodeGen/ARM/vshll.ll | 2 +-
test/CodeGen/X86/combine-shl.ll | 11 +-
test/CodeGen/X86/not-and-simplify.ll | 4 +-
test/CodeGen/X86/sse2-vector-shifts.ll | 1 -
test/CodeGen/X86/vector-blend.ll | 4 +-
test/CodeGen/X86/vector-rotate-128.ll | 8 --
test/CodeGen/X86/vector-rotate-256.ll | 6 +-
test/CodeGen/X86/widen_cast-4.ll | 2 +-
test/MC/X86/intel-syntax-var-offset.ll | 49 ++++++++
13 files changed, 141 insertions(+), 88 deletions(-)
create mode 100644 test/MC/X86/intel-syntax-var-offset.ll
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from b46c968b1c [NVPTX] added match.{any,all}.sync instructions, intrinsics [...]
new 7c4fc66ad6 [MinGW] Don't link -lmsvcrt if a different msvcrt version is [...]
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lib/Driver/ToolChains/MinGW.cpp | 3 +++
test/Driver/mingw-msvcrt.c | 5 +++++
2 files changed, 8 insertions(+)
create mode 100644 test/Driver/mingw-msvcrt.c
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from 737f60180af [NVPTX] added match.{any,all}.sync instructions, intrinsics [...]
new 3fcdad2025e [Hexagon] Better determination of register classes in bit tracker
new cbd061d36af [SLP] Add a test for PR32086, NFC.
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lib/Target/Hexagon/BitTracker.cpp | 23 +++++++-------
lib/Target/Hexagon/BitTracker.h | 10 ++++++
lib/Target/Hexagon/HexagonBitTracker.cpp | 46 +++++++++++++++++++++++++---
lib/Target/Hexagon/HexagonBitTracker.h | 5 +++
test/Transforms/SLPVectorizer/X86/PR32086.ll | 32 +++++++++++++++++++
5 files changed, 100 insertions(+), 16 deletions(-)
create mode 100644 test/Transforms/SLPVectorizer/X86/PR32086.ll
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from 0e85612ceab [AVX-512] Replace large number of explicit patterns that ch [...]
new 6932000c35e [Hexagon] Make getHexagonSubRegIndex take reference instead [...]
new 737f60180af [NVPTX] added match.{any,all}.sync instructions, intrinsics [...]
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Summary of changes:
include/llvm/IR/IntrinsicsNVVM.td | 27 ++++++
lib/Target/Hexagon/HexagonBitSimplify.cpp | 14 +--
lib/Target/Hexagon/HexagonBitTracker.cpp | 7 +-
lib/Target/Hexagon/HexagonConstPropagation.cpp | 2 +-
lib/Target/Hexagon/HexagonRegisterInfo.cpp | 8 +-
lib/Target/Hexagon/HexagonRegisterInfo.h | 2 +-
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 33 +++++++
lib/Target/NVPTX/NVPTXISelDAGToDAG.h | 1 +
lib/Target/NVPTX/NVPTXInstrInfo.td | 1 +
lib/Target/NVPTX/NVPTXIntrinsics.td | 57 ++++++++++++
test/CodeGen/NVPTX/match.ll | 117 +++++++++++++++++++++++++
11 files changed, 253 insertions(+), 16 deletions(-)
create mode 100644 test/CodeGen/NVPTX/match.ll
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from b204dc0e07 [CUDA] Fix names of __nvvm_vote* intrinsics.
new b46c968b1c [NVPTX] added match.{any,all}.sync instructions, intrinsics [...]
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Summary of changes:
include/clang/Basic/BuiltinsNVPTX.def | 7 +++++++
lib/CodeGen/CGBuiltin.cpp | 15 +++++++++++++++
lib/Headers/__clang_cuda_intrinsics.h | 32 +++++++++++++++++++++++++++++---
test/CodeGen/builtins-nvptx-ptx60.cu | 22 +++++++++++++++++++++-
4 files changed, 72 insertions(+), 4 deletions(-)
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