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from 4397eb6811e Fix bogus CONST_WIDE_INT hash
new 0fdb6b5dc4c Pass rtx and index to read-md.c iterator routines
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Summary of changes:
gcc/ChangeLog | 23 +++++++++++++++
gcc/read-md.h | 3 +-
gcc/read-rtl.c | 89 +++++++++++++++++++++++++++++++++-------------------------
3 files changed, 76 insertions(+), 39 deletions(-)
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from 7c7e6bed7bf [GlobalISel][X86] InstructionSelector, for now use fallback [...]
new e8fad78d5a5 [AsmParser] Recommit: Hash is not a comment on some targets
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lib/MC/MCParser/AsmParser.cpp | 10 --
lib/MC/MCParser/MCAsmParser.cpp | 8 --
test/DebugInfo/AArch64/asan-stack-vars.ll | 2 +-
.../RuntimeDyld/AArch64/ELF_ARM64_relocations.s | 2 +-
test/MC/ARM/directive_parsing.s | 66 +++++------
test/MC/AsmParser/AArch64/directive-parse-err.s | 124 ++++++++++-----------
6 files changed, 97 insertions(+), 115 deletions(-)
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unknown user pushed a change to branch master
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from f84c79550c [ARM][AArch64] Cortex-A75 and Cortex-A55 tests
new a2c55d99d1 [ObjC] Use consistent comment style in inline asm
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lib/CodeGen/TargetInfo.cpp | 6 +++---
test/CodeGenObjC/arc-arm.m | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
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unknown user pushed a change to branch master
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from 272512a875e 2017-08-21 Richard Biener <rguenther(a)suse.de>
new 4397eb6811e Fix bogus CONST_WIDE_INT hash
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gcc/ChangeLog | 7 +++++++
gcc/varasm.c | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
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from cf90ce3e643 [GlobalISel][X86] LowerCall, for now don't handel ByValue f [...]
new 7c7e6bed7bf [GlobalISel][X86] InstructionSelector, for now use fallback [...]
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lib/Target/X86/X86InstructionSelector.cpp | 5 +++++
1 file changed, 5 insertions(+)
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from 076fb389d7a [InterLeaved] Adding lit test for future work interleaved l [...]
new cf90ce3e643 [GlobalISel][X86] LowerCall, for now don't handel ByValue f [...]
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lib/Target/X86/X86CallLowering.cpp | 5 +++++
test/CodeGen/X86/GlobalISel/x86_64-fallback.ll | 11 +++++++++++
2 files changed, 16 insertions(+)
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unknown user pushed a change to branch master
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from 3012e251f Document renameat2
new 6864c08b9 Change license to FreeBSD License for RISC-V
new bd86e9de7 Add myself to RISC-V Port Maintainer
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COPYING.NEWLIB | 2 +-
libgloss/riscv/crt0.S | 2 +-
libgloss/riscv/machine/syscall.h | 2 +-
libgloss/riscv/syscalls.c | 2 +-
newlib/MAINTAINERS | 1 +
newlib/libc/machine/riscv/ffs.c | 2 +-
newlib/libc/machine/riscv/ieeefp.c | 2 +-
newlib/libc/machine/riscv/include/fenv.h | 2 +-
newlib/libc/machine/riscv/memcpy.c | 2 +-
newlib/libc/machine/riscv/memset.S | 2 +-
newlib/libc/machine/riscv/setjmp.S | 2 +-
newlib/libc/machine/riscv/strcmp.S | 2 +-
newlib/libc/machine/riscv/strcpy.c | 2 +-
newlib/libc/machine/riscv/strlen.c | 2 +-
newlib/libc/machine/riscv/sys/asm.h | 2 +-
newlib/libc/machine/riscv/sys/fenv.h | 2 +-
newlib/libc/machine/riscv/sys/string.h | 2 +-
17 files changed, 17 insertions(+), 16 deletions(-)
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from 0b54cd97e17 [x86] Teach the "generic" x86 CPU to avoid patterns that ar [...]
new 076fb389d7a [InterLeaved] Adding lit test for future work interleaved l [...]
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test/CodeGen/X86/x86-interleaved-access.ll | 316 +++++++++++++++++++++
.../InterleavedAccess/X86/interleavedLoad.ll | 60 ++++
2 files changed, 376 insertions(+)
create mode 100644 test/Transforms/InterleavedAccess/X86/interleavedLoad.ll
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unknown user pushed a change to branch master
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from 8982819d15 Allow thiscall attribute in test/Tooling/clang-diff-ast.cpp
new f84c79550c [ARM][AArch64] Cortex-A75 and Cortex-A55 tests
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Summary of changes:
lib/Driver/ToolChains/Arch/ARM.cpp | 11 +++++++++++
test/Driver/aarch64-cpus.c | 35 +++++++++++++++++++++++++++++++++++
test/Driver/aarch64-dotprod.c | 11 +++++++++++
test/Driver/aarch64-ras.c | 2 ++
test/Driver/aarch64-rcpc.s | 14 ++++++++++++++
test/Driver/arm-cortex-cpus.c | 33 +++++++++++++++++++++++++++++++++
test/Driver/arm-dotprod.c | 11 +++++++++++
test/Driver/arm-ras.c | 2 ++
8 files changed, 119 insertions(+)
create mode 100644 test/Driver/aarch64-dotprod.c
create mode 100644 test/Driver/aarch64-rcpc.s
create mode 100644 test/Driver/arm-dotprod.c
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