Tcwg-commits June 2017

tcwg-commits@lists.linaro.org

8 participants
3431 discussions

[gcc] branch master updated (1186e47cd27 -> 1c697db0dc5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 1186e47cd27 [AArch64] Add HF vector modes to lane-to-lane INS pattern new 1c697db0dc5 [PATCH][AArch64] Allow CMP+SHIFT when comparing with zero The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.c | 2 +- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c | 11 +++++++++++ 4 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[llvm] branch master updated (7df090cb2bd -> dfdb788875e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 7df090cb2bd [AArch64][Falkor] Model immediate forwarding. new dfdb788875e AMDGPUAnnotateUniformValue should always treat volatile loa [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/SIISelLowering.cpp | 2 +- lib/Target/AMDGPU/SMInstructions.td | 1 + test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll | 15 +++++++++++++++ 3 files changed, 17 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[gcc] branch master updated (347f1271f99 -> 1186e47cd27)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 347f1271f99 [gcc] new 1186e47cd27 [AArch64] Add HF vector modes to lane-to-lane INS pattern The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64-simd.md | 10 +++++----- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/aarch64/hfmode_ins_1.c | 21 +++++++++++++++++++++ 4 files changed, 35 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/hfmode_ins_1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[clang] branch master updated (5f3537bf30 -> b4530cfcf7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 5f3537bf30 Tie the macOS tests in test/Integration to the latest macOS SDK new b4530cfcf7 ASTPrinter: Objective-C method declarations don't need a spa [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/AST/DeclPrinter.cpp | 6 ++++-- test/Misc/ast-print-objectivec.m | 15 ++++++++++----- test/Modules/lookup.m | 4 ++-- unittests/AST/DeclPrinterTest.cpp | 2 +- 4 files changed, 17 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[binutils-gdb] branch master updated (0efdc7237e -> e7cd2680e0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 0efdc7237e Automatic date update in version.in new e7cd2680e0 Correct check for endianness The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sim/microblaze/ChangeLog | 4 ++++ sim/microblaze/interp.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[gcc] branch master updated (c5dcf8e544c -> 347f1271f99)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from c5dcf8e544c [AArch64] Emit tighter strong atomic compare-exchange loop [...] new 5b62ee9ca47 2017-06-02 Olivier Hainque <hainque(a)adacore.com> new 347f1271f99 [gcc] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 10 +++++ gcc/config/rs6000/rs6000.c | 48 ++++++++++++++++++++++ gcc/config/vx-common.h | 4 +- gcc/testsuite/ChangeLog | 8 ++++ .../gcc.target/powerpc/fold-vec-minmax-char.c | 37 +++++++++++++++++ .../powerpc/fold-vec-minmax-floatdouble.c | 37 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-minmax-int.c | 37 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-minmax-longlong.c | 37 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-minmax-short.c | 37 +++++++++++++++++ 9 files changed, 253 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-char.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-floatdouble.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-int.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-longlong.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-minmax-short.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[gcc] branch master updated (d63d6d5147b -> c5dcf8e544c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from d63d6d5147b * dwarf2out.c (DWARF_INITIAL_LENGTH_SIZE_STR): New. [...] new c5dcf8e544c [AArch64] Emit tighter strong atomic compare-exchange loop [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 6 ++++ gcc/config/aarch64/aarch64.c | 41 ++++++++++++++++++---- gcc/testsuite/ChangeLog | 4 +++ .../aarch64/atomic_cmp_exchange_zero_strong_1.c | 12 +++++++ 4 files changed, 57 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[gcc] branch master updated (5f5862ae462 -> d63d6d5147b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 5f5862ae462 Changlogs: cp/ Remove lang_type_ptrmem. * cp-tree.h (lan [...] new 146b1c1b939 [gcc] new d63d6d5147b * dwarf2out.c (DWARF_INITIAL_LENGTH_SIZE_STR): New. [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 13 ++++++++++++ gcc/config/rs6000/rs6000.c | 18 +++++++++++++++++ gcc/dwarf2out.c | 15 ++++++++++++-- gcc/testsuite/ChangeLog | 12 +++++++++++ .../gcc.target/powerpc/fold-vec-abs-char-fwrapv.c | 18 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-char.c | 18 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-floatdouble.c | 23 ++++++++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-int-fwrapv.c | 18 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-int.c | 18 +++++++++++++++++ .../powerpc/fold-vec-abs-longlong-fwrapv.c | 18 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-longlong.c | 18 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-short-fwrapv.c | 18 +++++++++++++++++ .../gcc.target/powerpc/fold-vec-abs-short.c | 18 +++++++++++++++++ 13 files changed, 223 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char-fwrapv.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-char.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-floatdouble.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-int-fwrapv.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-int.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-longlong.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short-fwrapv.c create mode 100644 gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[llvm] branch master updated (48e0515b4f2 -> 7df090cb2bd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 48e0515b4f2 [AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests. new 7df090cb2bd [AArch64][Falkor] Model immediate forwarding. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AArch64/AArch64SchedFalkorDetails.td | 41 +++++++++++++++++-------- 1 file changed, 28 insertions(+), 13 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[llvm] branch master updated (c4071bcc5b6 -> 48e0515b4f2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from c4071bcc5b6 [Hexagon] Return 0 from getDotNewPredOp when .new opcode do [...] new 9c2941a24ca [mips][microMIPS] Extending size reduction pass with LBU16, [...] new 48e0515b4f2 [AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +- lib/Target/Mips/MicroMipsSizeReduction.cpp | 57 ++++++++++++++++++++++ test/CodeGen/AMDGPU/basic-branch.ll | 2 - test/CodeGen/AMDGPU/branch-condition-and.ll | 3 +- test/CodeGen/AMDGPU/branch-relaxation.ll | 2 - test/CodeGen/AMDGPU/control-flow-fastregalloc.ll | 11 +---- test/CodeGen/AMDGPU/indirect-addressing-si.ll | 9 ++-- test/CodeGen/AMDGPU/infinite-loop.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll | 1 - test/CodeGen/AMDGPU/llvm.amdgcn.image.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll | 4 +- test/CodeGen/AMDGPU/multi-divergent-exit-region.ll | 1 + test/CodeGen/AMDGPU/ret_jump.ll | 2 +- .../si-lower-control-flow-unreachable-block.ll | 3 -- test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 2 +- test/CodeGen/AMDGPU/spill-m0.ll | 2 - test/CodeGen/AMDGPU/valu-i1.ll | 8 +-- .../micromips-lbu16-lhu16-sb16-sh16.ll | 40 +++++++++++++++ 24 files changed, 119 insertions(+), 46 deletions(-) create mode 100644 test/CodeGen/Mips/micromips-sizereduction/micromips-lbu16-lhu16 [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

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Tcwg-commits June 2017