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from 5c0b6f02e56 2017-06-07 Tamar Christina <tamar.christina(a)arm.com>
new 7ec0d375394 * tree-ssa-loop-ivopts.c (ivopts_estimate_reg_pressure): N [...]
new 9a559110feb (aff_combination_expand): Move (T1)(X *+- CST) simplificat [...]
new 1529557042a * tree-affine.c (tree_to_aff_combination): Handle (T1)(X + X).
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gcc/ChangeLog | 17 +++++++++++++
gcc/tree-affine.c | 60 +++++++++++++++++++++++++++++-----------------
gcc/tree-ssa-loop-ivopts.c | 49 +++++++++++++++++++++++++++++--------
3 files changed, 94 insertions(+), 32 deletions(-)
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from acf87402fab [ARM] GlobalISel: Support G_OR
new 39f72a563a9 [X86][SSE] Fix an issue with PEXTRW/PEXTRB indices during s [...]
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lib/Target/X86/X86ISelLowering.cpp | 9 +++--
.../CodeGen/X86/clear_upper_vector_element_bits.ll | 44 ++--------------------
2 files changed, 10 insertions(+), 43 deletions(-)
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from 1f8a87749f [ARM] Fix Neon vector type alignment to 64-bit
new 1741b26b00 [Sema] Silence unused variable warning.
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lib/Sema/SemaExpr.cpp | 2 +-
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from 745796730 Fix test with exceptions disabled
new 3762fe69d Implement LWG 2904.
new 8f0ca5970 Mark LWG 2904 as complete.
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include/variant | 21 ++++++----------
.../variant.variant/variant.assign/T.pass.cpp | 26 -------------------
.../variant.variant/variant.assign/copy.pass.cpp | 29 ----------------------
.../variant.variant/variant.assign/move.pass.cpp | 8 ------
www/cxx1z_status.html | 4 +--
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unknown user pushed a change to branch master
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from a7783d77086 [Linker] Remove llc usage from link-arm-and-thumb.ll test case.
new acf87402fab [ARM] GlobalISel: Support G_OR
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lib/Target/ARM/ARMLegalizerInfo.cpp | 2 +-
lib/Target/ARM/ARMRegisterBankInfo.cpp | 1 +
.../ARM/GlobalISel/arm-instruction-select.mir | 34 +++++++++
test/CodeGen/ARM/GlobalISel/arm-isel.ll | 27 ++++++++
test/CodeGen/ARM/GlobalISel/arm-legalizer.mir | 80 ++++++++++++++++++++++
test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 27 ++++++++
6 files changed, 170 insertions(+), 1 deletion(-)
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unknown user pushed a change to branch master
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from beb17b264 Print sign of NaN values.
new 21ff2cf93 Fix minor issues in memchr NEON implementation
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newlib/libc/machine/arm/memchr.S | 3 ++-
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unknown user pushed a change to branch master
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from 9603aab1e44 RTEMS: Use TLS for Ada run-time
new 5c0b6f02e56 2017-06-07 Tamar Christina <tamar.christina(a)arm.com>
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gcc/ChangeLog | 5 ++++
gcc/config/aarch64/aarch64.c | 14 ++++-----
gcc/testsuite/ChangeLog | 4 +++
gcc/testsuite/gcc.target/aarch64/sdiv_costs_1.c | 38 +++++++++++++++++++++++++
4 files changed, 53 insertions(+), 8 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/sdiv_costs_1.c
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from 98df4e7a69 [Driver] Add test to cover case when LSan is not supported
new 1f8a87749f [ARM] Fix Neon vector type alignment to 64-bit
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lib/Basic/Targets.cpp | 4 ++++
test/CodeGen/neon-aapcs-align.c | 17 +++++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 test/CodeGen/neon-aapcs-align.c
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new 9603aab1e44 RTEMS: Use TLS for Ada run-time
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gcc/ada/ChangeLog | 5 ++
gcc/ada/gcc-interface/Makefile.in | 2 +-
gcc/ada/s-tpopsp-rtems.adb | 113 --------------------------------------
3 files changed, 6 insertions(+), 114 deletions(-)
delete mode 100644 gcc/ada/s-tpopsp-rtems.adb
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from e85cbacb93a [ARM] GlobalISel: Support G_AND
new a7783d77086 [Linker] Remove llc usage from link-arm-and-thumb.ll test case.
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test/Linker/link-arm-and-thumb.ll | 15 ++++++---------
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