Tcwg-commits June 2017

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3431 discussions

[gcc] branch gcc-6-branch updated (821d0ae98aa -> 9627fe710c5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gcc-6-branch in repository gcc. from 821d0ae98aa Daily bump. new 9627fe710c5 PR libstdc++/81002 fix std::basic_regex range constructor The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libstdc++-v3/ChangeLog | 7 +++++++ libstdc++-v3/include/bits/regex_compiler.h | 7 ++++--- .../79114.cc => 28_regex/basic_regex/ctors/basic/iter.cc} | 10 ++++++---- 3 files changed, 17 insertions(+), 7 deletions(-) copy libstdc++-v3/testsuite/{18_support/nested_exception/79114.cc => 28_regex/basi [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[gcc] branch gcc-5-branch updated (d1eb92ffefc -> 1414c3d7f96)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch gcc-5-branch in repository gcc. from d1eb92ffefc Daily bump. new 1414c3d7f96 PR libstdc++/81002 fix std::basic_regex range constructor The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libstdc++-v3/ChangeLog | 7 +++++++ libstdc++-v3/include/bits/regex_compiler.h | 7 ++++--- .../basic_regex/ctors/basic/iter.cc} | 20 ++++++++------------ 3 files changed, 19 insertions(+), 15 deletions(-) copy libstdc++-v3/testsuite/{20_util/reference_wrapper/80504.cc => 28_regex/basic_ [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[lld] branch master updated (edbbcdbf4 -> 4daf21f90)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from edbbcdbf4 [ELF] - Linkerscript: implement NOLOAD section type. new 4daf21f90 [ELF] - Make implementation of .gdb index to be more natural [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/GdbIndex.h | 25 ++++++++- ELF/SyntheticSections.cpp | 140 +++++++++++++++++++++++++++++----------------- ELF/SyntheticSections.h | 19 ++++--- 3 files changed, 125 insertions(+), 59 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[llvm] branch master updated (57caaecac38 -> e156d99231a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 57caaecac38 [CGP] avoid zext/trunc of a memcmp expansion compare new e156d99231a [mssa] Fix case when there is no definition in a block prio [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Analysis/MemorySSAUpdater.cpp | 17 +++++---------- unittests/Analysis/MemorySSA.cpp | 46 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[lld] branch master updated (56a1f8aa5 -> edbbcdbf4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 56a1f8aa5 Delete dead function. new edbbcdbf4 [ELF] - Linkerscript: implement NOLOAD section type. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/LinkerScript.cpp | 2 ++ ELF/LinkerScript.h | 1 + ELF/ScriptParser.cpp | 18 +++++++++++++---- test/ELF/linkerscript/noload.s | 46 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 63 insertions(+), 4 deletions(-) create mode 100644 test/ELF/linkerscript/noload.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[gcc] branch linaro-dev/sve created (now 932eda2e8fe)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch linaro-dev/sve in repository gcc. at 932eda2e8fe Don't require an integer mode for PARALLELs This branch includes the following new commits: new 715b7e9d192 Remove DOS file formatting new 542b8b5a7b7 Test failures new d168c85c8d9 Fix pessimistic DImode handling in combine.c:make_field_assignment new 4ff6909fbdb Use SET_DECL_MODE in libcc1 new a8ec59f10c2 Reorganise machmode.h headers new d8f7f455460 [1/67] Add an E_ prefix to mode names and update case statements new c6f92c83098 [2/67] Make machine_mode a class new 53adf1a27ea [3/67] Add GDB pretty printer for machine mode classes new 74483f83ab0 [4/67] Add FOR_EACH iterators for modes new b3f5632838b [5/67] Small tweak to array_value_type new 574c67122c2 [6/67] Make GET_MODE_WIDER return an opt_mode new 4a0145aaef5 [7/67] Add scalar_float_mode new 5889aa3e34c [8/67] Simplify gen_trunc/extend_conv_libfunc new a4353e4945b [9/67] Add SCALAR_FLOAT_TYPE_MODE new 42a5f01cb94 [10/67] Make assemble_real take a scalar_float_mode new a94e72bb0b6 [11/67] Add a float_mode_for_size helper function new 0ab2f7326d6 [12/67] Use opt_scalar_float_mode when iterating over float modes new 93da3db887e [13/67] Make floatn_mode return an opt_scalar_float_mode new 83e93d9587e [14/67] Make libgcc_floating_mode_supported_p take a scalar [...] new 1080208500e [15/67] Add scalar_int_mode new 74f4d1e80cf [16/67] Add scalar_int_mode_pod new 58839db9041 [17/67] Add an int_mode_for_size helper function new 254648dac54 [18/67] Make int_mode_for_mode return an opt_scalar_int_mode new 4f59ccf72df [19/67] Add a smallest_int_mode_for_size helper function new f9baf4142d5 [20/67] Replace MODE_INT checks with is_int_mode new bcf1eddf556 [21/67] Replace SCALAR_INT_MODE_P checks with is_a <scalar_ [...] new 6fec33d5fd4 [22/67] Replace !VECTOR_MODE_P with is_a <scalar_int_mode> new 91227a598d3 [23/67] Replace != VOIDmode checks with is_a <scalar_int_mode> new 076a104b270 [24/67] Replace a != BLKmode check with is_a <scalar_int_mode> new e7b6925fada [25/67] Use is_a <scalar_int_mode> for bitmask optimisations new 641e98e8c8f [26/67] Use is_a <scalar_int_mode> in subreg/extract simpli [...] new f4e11b45227 [27/67] Use is_a <scalar_int_mode> before LOAD_EXTEND_OP new 146d596868f [28/67] Use is_a <scalar_int_mode> for miscellaneous types of test new 729d01996b2 [29/67] Make some *_loc_descriptor helpers take scalar_int_mode new fe4b81e1013 [30/67] Use scalar_int_mode for doubleword splits new becfe2dc701 [31/67] Use scalar_int_mode for move2add new 461b99d92cb [32/67] Check is_a <scalar_int_mode> before calling valid_p [...] new 71252a192b3 [33/67] Add a NARROWEST_INT_MODE macro new 931ecf152f4 [34/67] Add a SCALAR_INT_TYPE_MODE macro new 25bbfc2a2c6 [35/67] Add uses of as_a <scalar_int_mode> new 0cb1436be6d [36/67] Use scalar_int_mode in the RTL iv routines new fb21c9a9c53 [37/67] Use scalar_int_mode when emitting cstores new e11348e1b2d [38/67] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p new 09245b73fcf [39/67] Two changes to the get_best_mode interface new 33e109dead4 [40/67] Use scalar_int_mode for extraction_insn fields new ad406c7e12a [41/67] Split scalar integer handling out of force_to_mode new 0c247f3adf4 [42/67] Use scalar_int_mode in simplify_shift_const_1 new ce721d3a39c [43/67] Use scalar_int_mode in simplify_comparison new f12e0f30c0a [44/67] Make simplify_and_const_int take a scalar_int_mode new ab15c5992a5 [45/67] Make extract_left_shift take a scalar_int_mode new 53608516536 [46/67] Make widest_int_mode_for_size return a scalar_int_mode new 5f079c556c8 [47/67] Make subroutines of nonzero_bits operate on scalar_ [...] new 0995f7a9f89 [48/67] Make subroutines of num_sign_bit_copies operate on [...] new 3d85ddf31bc [49/67] Simplify nonzero/num_sign_bits hooks new 862f540a659 [50/67] Add helper routines for SUBREG_PROMOTED_VAR_P subregs new 6b9bf243517 [51/67] Use opt_scalar_int_mode when iterating over integer modes new 7c431e454ec [52/67] Use scalar_int_mode in extract/store_bit_field new 8085edb27d7 [53/67] Pass a mode to const_scalar_mask_from_tree new ee1d4598a70 [54/67] Add explicit int checks for alternative optab imple [...] new dfce032b92d [55/67] Use scalar_int_mode in simplify_const_unary_operation new f1f9ced8170 [56/67] Use the more specific type when two modes are known [...] new 325ea6786cc [57/67] Use scalar_int_mode in expand_expr_addr_expr new 31d2ec76fb0 [58/67] Use scalar_int_mode in a try_combine optimisation new 85e9ff52a26 [59/67] Add a rtx_jump_table_data::get_data_mode helper new 9a0b113a3b2 [60/67] Pass scalar_int_modes to do_jump_by_parts_* new 51ceee66a9b [61/67] Use scalar_int_mode in the AArch64 port new 6ff6529a585 [62/67] Big machine_mode to scalar_int_mode replacement new ddd36f34002 [63/67] Simplifications after type switch new 23063e44df7 [64/67] Add a scalar_mode class new 100380b169f [65/67] Use scalar_mode in the AArch64 port new f436a43717b [66/67] Add a scalar_mode_pod class new ff65519aeb4 [67/67] Add a complex_mode class new bd8d9dfa662 Add a mem_alias_size helper class new 0fb7d3d5f19 Add a fixed_size_mode class new fc143c25970 Add a fixed_size_mode_pod class new 4e7222d3902 Widening optab cleanup new eb240456779 Add a full_integral_type_p helper function new 1bb43c8abbb Add a partial_integral_type_p helper function new 44e19328449 Make more use of paradoxical_subreg_p new ea6b25c3216 Add a partial_subreg_p predicate new 73cfb46bf1a Make more use of HWI_COMPUTABLE_MODE_P new 927346984c2 Make more use of df_read_modify_subreg_p new cef6b1c28a4 Make more use of subreg_offset_from_lsb new 8502370e9e9 Make more use of subreg_lowpart_offset new 96132353ec5 Make more use of subreg_size_lowpart_offset new ad298400e47 Make more use of byte_lowpart_offset new 9e0d8a436a1 Add subreg_memory_offset helper functions new df9752d45f0 Add wider_subreg_mode helper functions new 1894be675ef Fix bogus CONST_WIDE_INT hash new bc7d3f07474 Make more use of GET_MODE_UNIT_SIZE new 11fd24953c9 Make more use of GET_MODE_UNIT_BITSIZE new 881d3c81d46 Make more use of GET_MODE_UNIT_PRECISION new 862d3f99bee Add helpers for shift count modes new 8cc912fc964 Simplify pad_below implementation new 7238cf4ff4e Remove the frame size argument from function_prologue/epilogue new f53f38923d9 Turn HARD_REGNO_CALL_PART_CLOBBERED into a target hook new 1e84105a74f Turn HARD_REGNO_MODE_OK into a target hook new e341f92c363 Turn MODES_TIEABLE_P into a target hook new f09bf2fc7d7 Turn SLOW_UNALIGNED_ACCESS into a target hook new 97d36bd318e Turn FUNCTION_ARG_PADDING into a target hook new a38c8e0def1 Use MACRO_MODE for HARD_REGNO_NREGS new 66c3212a047 Use MACRO_MODE for SECONDARY_MEMORY_NEEDED_MODE new 9bea0d490b5 Use MACRO_MODE for SECONDARY_MEMORY_NEEDED new 8a6eb40a79f Use MACRO_MODE for targhooks.c and address.h wrappers new 3464991eabd Use MACRO_MODE for CANNOT_CHANGE_MODE_CLASS new 7ea7564f29b Use MACRO_MODE for TRULY_NOOP_TRUNCATION_MODES_P new df8b0ce55de Use MACRO_MODE for FUNCTION_ARG_OFFSET new cd7a9476f66 Pass rtx and index to read-md.c iterator routines new 2f1bba82237 Factor out the mode handling in lower-subreg.c new 3937127cf27 Add a vect_get_num_copies helper routine new 695cee19fcc Add a vect_worthwhile_without_simd_p helper routine new 5aee280a94e Store VECTOR_CST_NELTS directly in tree node new dbcab9eb46d Pass number of elements alongside tree* when constructing vectors new 1d9528579b1 Add gimple_build_vector* helpers new d8ee166cfe0 Make more use of gimple-fold.h new f25a51d75a5 Add a vect_get_dr_size helper function new 46c1bd71e2d Let the target choose a vectorisation alignment new 241d212fcd8 Pass slp_index down to vect_analyze_stmt new 09aacd2e772 Add rtx const vec_duplicate helpers new 3186b9306f1 Allow vector CONSTs new a4af10b0f14 compare_values use in extract_range_from_multiplicative_op_1 new c6a1d3360dc Add missing int_cst_rangeN checks to tree-vrp.c new 635a943091a Tighten tree-ssa-ccp.c:get_value_for_expr condition new 41f629830b0 Fix unguarded uses of tree_to_uhwi new b1755581939 Add a VEC_SERIES rtl code new 90380c1ec6d Add a VEC_DUPLICATE_EXPR tree code and associated optab new 440421c4ee0 Add VEC_SERIES_EXPR and associated optab new e8b93cacd7a Treat VEC_{DUPLICATE,SERIES}_EXPR as gimple constants new 1f4dd769264 [AArch64] Add an endian_lane_rtx helper routine new 9ea267ca6b6 Fix for match.pd handling of three-constant bitops new 20c4b7c3986 Fix type of bitstart in vectorizable_live_operation new 638424dd639 Add LOOP_VINFO_MAX_VECT_FACTOR new 124b6ed2d7c Add poly-int.h new be52fc584ab Make mode query functions accept poly_ints new ac78964b33c Add polynomial rtx constants new 94fde98d646 Add polynomial tree constants new 83cbea8eb60 Add poly_int dump routines new fb428a853d9 poly_int: compute_data_ref_aligment new e9004adb63e Make REG_OFFSET a poly_int64 new 0f0c64f26ad Add DWARF support for polynomial offsets new b2ff277c0b5 poly_int: fold_ctor_reference new 35c4bdaefaf poly_int: same_addr_size_stores_p new da5879066aa poly_int: ao_ref and vn_reference_op_t new 19a8ac81111 poly_int: dse.c new 9f6a5a0a706 poly_int: rtx_addr_can_trap_p_1 new acf41124be7 poly_int: MEM_OFFSET and MEM_SIZE new ded449ca6a7 poly_int: lra frame offsets new f339133dba4 poly_int: store_bit_field bitrange new 328c01772ae poly_int: extract_bit_field bitrange new 0541b9586b9 poly_int: C++ bitfield regions new 4be7dc2f80e poly_int: store_field & co new 7b833a28d2f poly_int: SUBREG_BYTE new 5750bdf58bb poly_int: operand_subword new 7746dbc106b poly_int: DWARF CFA offsets new ad6a50d28a8 poly_int: ipa_parm_adjustment new c869fb461b0 poly_int: get_ref_base_and_extent new 8cad1eb899f poly_int: get_addr_unit_base_and_extent new 34f1c8fcbe6 poly_int: aff_tree new 69212c71b5d poly_int: symbolic_number new e23a3124548 poly_int: pointer_may_wrap_p new 45e803a121b poly_int: get_inner_reference_aff new 8c9339795e0 poly_int: get_inner_reference & co. new 9ed2134d72e poly_int: reload.c new fd774a531f7 poly_int: reload1.c new 3c6edde3edd poly_int: frame allocations new a05594d382f poly_int: push_block/emit_push_insn new 4948b60b1f5 poly_int: REG_ARGS_SIZE new e6a039cd988 poly_int: argument sizes new 0a8b540e716 poly_int: cfgexpand stack variables new df5e0d12319 poly_int: emit_inc new 9237f139dd7 poly_int: reload<->ira interface new 7b80029b7da poly_int: emit_group_load/store new 3c35c2b51eb poly_int: int_size_in_bytes new 57f42047e03 poly_int: bit_field_size/offset new cb983522b7e poly_int: MEM_REF offsets new 073b595a2dc poly_int: build_ref_for_offset new 68a8d267f41 poly_int: get_binfo_at_offset new ae7fbc31ca5 poly_int: legitimate address offsets in ivopts new bd11ea67e20 poly_int: tree-ssa-loop-ivopts.c:iv_use new b3f560f94cd poly_int: vectoriser vf and uf new 4a92a49fbf5 poly_int: omp_max_vf new 8b27ad0adc7 poly_int: get_mask_mode new a775ab1cb27 poly_int: current_vector_size and TARGET_AUTOVECTORIZE_VECT [...] new 8a571f4acf9 poly_int: vect_no_alias_p new 91a963c60c1 poly_int: GET_MODE_NUNITS new d80e50051dc poly_int: TYPE_VECTOR_SUBPARTS new 5d66711653e poly_int: GET_MODE_PRECISION new 214db1da80b poly_int: GET_MODE_BITSIZE new 2a82f862edd poly_int: GET_MODE_SIZE new 66ee1dc90b3 Base subreg rules on REGMODE_NATURAL_SIZE rather than UNITS [...] new 8d544f3a535 Use poly_int tree accessors instead of hwi accessors new 24a3d141420 Use poly_int rtx accessors instead of hwi accessors new c54f5390c38 Make more use of simplify_gen_binary new d038e8fad36 Don't query the frontend for unsupported types new a6fbcadc812 Improve spilling for variable-width slots new 9fd08e40111 Add support for MODE_VECTOR_BOOL new 10d1f73fd6e Add support for adjusting the number of units in a mode new 5bd3abb2c72 Allow the target to set MAX_BITSIZE_MODE_ANY_MODE new cf0244d0eba Fix vectorizable_live_operation handling of vector booleans new 30e8bac70ff Use extract_bit_field_as_subreg for vectors new 61b6a122668 Fix infinite loop in simplify_operand_subreg new 3931850449e Prevent invalid register mode changes in combine new d075b2128d3 Improve canonicalisation of TARGET_MEM_REFs new 865193b954e Improve vector mask pattern handling new 39ca7debc49 Improve ivopts handling of forced scales new 9fc3d5a3cbc Fix a failure in the Fortran matmul* tests new b8ecbf90477 SUBREG_PROMOTED_VAR_P handling in expand_direct_optab_fn new f1baaf1b191 [AArch64] Move code around new f5ec20bd6ce [AArch64] Rework interface to add constant/offset routines new e3470e94855 [AArch64] Set NUM_POLY_INT_COEFFS to 2 new 111ccdd129a [AArch64] Remove use of wider vector modes new 71182b1a75b [AArch64] Rename cmp_result iterator new ba9215c9418 [AArch64] Rename the internal "Upl" constraint new 64304922d5a [AArch64] Add const_offset field to aarch64_address_info new dcce095b9e3 [AArch64] Tweak aarch64_classify_address interface new 4b9554892ee [AArch64] Fix label mode new 793161bb021 [AArch64] Rewrite aarch64_simd_valid_immediate new 680a52b929f [AArch64] Generate permute patterns using rtx builders new 9dd38ed5feb [AArch64] Tighten address register subreg checks new a58ffe22b4d Add copy_rtx call to RTL loop unroller new 784ff5eb3ef Use asm volatile ("" ::: "memory") new 2ea545c97cc Add VECTOR_BITS to tree-vect.h new c3a0d6aeac1 available_vector_sizes new c996f6789d0 vect_permN new af4c18f204c vect_element_align_preferred new edb04cac740 target_vect_unaligned_possible new 1e1a8a00830 vect_variable_length new 96e17000dd3 vect_align_stack_vars new 8ed20343762 vect_masked_store new 9980dece4bf Revert DECL_USER_ALIGN patch new 81d75f24f76 [AArch64] Add SVE support new 0180df1f0ca [AArch64] Testsuite markup for SVE new b9cd270690f Fix folding of vector mask EQ/NE expressions new 9ead92ebd92 [AArch64] SVE load/store_lanes support new 8c8aa47ab25 Add support for masked load/store_lanes new 3983cda8a95 Add support for bitwise reductions new cf9c02d02f7 Add support for fully-predicated loops new e7557f1bc26 Make ivopts handle calls to internal functions new c00e3787371 Allow the number of iterations to be smaller than VF new 97d16ed0179 Handle peeling for alignment with masking new 45ab7197e7e Add optabs for common types of permutation new 6478f944c5d Handle more SLP constant and extern definitions for variable VF new 124c4bb4bf9 Improve ivopts handling of offset multiples new 28703d70c64 Rework the legitimize_address_displacement hook new e06b7fa894b Allow combine to reorder statements new aaee249b9e8 SLP reductions with variable-length vectors new 9e9a6c3ae7a Predicated comparison folds new 689134976d0 Predicated arithmetic folds new 8987911ecd2 Add an empty_mask_is_expensive hook new f49cbc0ceee Reuse results of vect_create_addr_base_for_vector_ref new 790c9723654 Allow capped vectorisation factors new c170aae99be Add support for BRKA and LASTB new b5b7769ceb5 Add support for CLASTB new 706e40cf599 Add support for FADDA new 044eb60c8d1 Add support for gather loads and scatter stores new f7a8ab7f168 Avoid pessimistic check for overlapping groups new 912a6e5df75 Fix for big field stores new bd01bd85ac8 Support for aliasing with variable strides new 09dfdb1d04c Add support for speculative loads new e5e2ed562f1 Add support for first-faulting loads new c5111d87d71 Make tree-ssa-strlen.c handle partial unterminated strings new 6d3e8c81483 Allow single-element interleaving for non-power-of-2 strides new 34c63b2ac04 Use single-iteration epilogues when peeling for gaps new ded1da7f0ae Replace FMA_EXPR with one internal fn per optab new 542f03cf25c Support fused multiply-adds in fully-masked reductions new a6c9fdebd90 Record equivalences for spill registers new f9ee02d2058 Add early rematerialisation pass new 932eda2e8fe Don't require an integer mode for PARALLELs The 268 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[lldb] branch master updated (154241a9b -> 50a43fd42)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from 154241a9b Move Object format code to lib/BinaryFormat. new 50a43fd42 Switch TaskMapOverInt to llvm::function_ref The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/lldb/Utility/TaskPool.h | 3 ++- source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 5 ++--- source/Utility/TaskPool.cpp | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[llvm] branch master updated (8848866f053 -> 57caaecac38)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 8848866f053 [AMDGPU][MC] Corrected error message for s_waitcnt helpers new 57caaecac38 [CGP] avoid zext/trunc of a memcmp expansion compare The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/CodeGenPrepare.cpp | 8 ++++---- test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[llvm] branch master updated (619317ee76f -> 8848866f053)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 619317ee76f LowerTypeTests: Generate simpler IR for br(llvm.type.test, [...] new 8848866f053 [AMDGPU][MC] Corrected error message for s_waitcnt helpers The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 28 ++++++++++++++----------- test/MC/AMDGPU/sopp-err.s | 8 +++---- 2 files changed, 20 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

[glibc] branch master updated (8f0a947cf5 -> 2e87c7d158)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from 8f0a947cf5 Remove check for NULL buffer passed to `ptsname_r' new 2e87c7d158 x86-64: Fold ifunc-sse4_1.h into wcsnlen.c The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 7 +++++++ sysdeps/x86_64/multiarch/ifunc-sse4_1.h | 34 --------------------------------- sysdeps/x86_64/multiarch/wcsnlen.c | 16 +++++++++++++++- 3 files changed, 22 insertions(+), 35 deletions(-) delete mode 100644 sysdeps/x86_64/multiarch/ifunc-sse4_1.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 5 months

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Tcwg-commits June 2017