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from c746f23920f AMDGPU/GlobalISel: Mark 32-bit G_ADD as legal
new 8cedcc75794 [RS4GC] Drop invalid metadata after pointers are relocated
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lib/Transforms/Scalar/RewriteStatepointsForGC.cpp | 71 +++++++++++++----
.../drop-invalid-metadata.ll | 92 ++++++++++++++++++++++
2 files changed, 146 insertions(+), 17 deletions(-)
create mode 100644 test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
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unknown user pushed a change to branch master
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from 80987ad1a6 IR: Replace the "Linker Options" module flag with "llvm.link [...]
new 7021b250b9 Revert r303316, a change to ExprConstant to evaluate functio [...]
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lib/AST/ExprConstant.cpp | 33 +++++----------------------------
test/Sema/integer-overflow.c | 8 --------
2 files changed, 5 insertions(+), 36 deletions(-)
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unknown user pushed a change to branch master
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from 4bad368d9f Fix build issue on x86.
new 46ee3da55e Remove __need_schedparam and __cpu_set_t_defined.
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Summary of changes:
ChangeLog | 18 +++++
bits/sched.h | 121 ++------------------------------
include/bits/cpu-set.h | 1 +
posix/Makefile | 4 +-
bits/sched.h => posix/bits/cpu-set.h | 47 +++----------
posix/sched.h | 8 ++-
sysdeps/unix/sysv/linux/bits/sched.h | 130 +++--------------------------------
7 files changed, 49 insertions(+), 280 deletions(-)
create mode 100644 include/bits/cpu-set.h
copy bits/sched.h => posix/bits/cpu-set.h (81%)
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unknown user pushed a change to branch master
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from bd6d1e94a1b Fix a null pointer dereference in llvm-pdbutil pretty.
new 4f4997576fa AArch64: don't try to emit an add (shifted reg) for SP.
new 4d6bb2d8906 [ADT] Reduce duplication between {Contextual,}FoldingSet; NFC
new c746f23920f AMDGPU/GlobalISel: Mark 32-bit G_ADD as legal
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Summary of changes:
include/llvm/ADT/FoldingSet.h | 165 ++++++--------
lib/Support/FoldingSet.cpp | 42 ++--
lib/Target/AArch64/AArch64FastISel.cpp | 8 +
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +
test/CodeGen/AArch64/fast-isel-sp-adjust.ll | 288 ++++++++++++++++++++++++
test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 22 ++
6 files changed, 414 insertions(+), 113 deletions(-)
create mode 100644 test/CodeGen/AArch64/fast-isel-sp-adjust.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
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from c37ab5f8054 SplitKit: Fix partially live subreg splitting
new bd6d1e94a1b Fix a null pointer dereference in llvm-pdbutil pretty.
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lib/DebugInfo/PDB/UDTLayout.cpp | 5 +++--
.../PrettyClassLayoutGraphicalDumper.cpp | 24 +++++++++++-----------
2 files changed, 15 insertions(+), 14 deletions(-)
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unknown user pushed a change to branch master
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from 2066114d702 More refinements to fixing sparc's PR target/80968.
new 149d3941ce0 2017-06-12 François Dumont <fdumont(a)gcc.gnu.org>
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libstdc++-v3/ChangeLog | 9 +++
libstdc++-v3/include/bits/stl_tree.h | 15 ++---
.../23_containers/map/allocator/default_init.cc | 67 ++++++++++++++++++++++
.../set/allocator/{move.cc => default_init.cc} | 50 ++++++++--------
libstdc++-v3/testsuite/util/testsuite_allocator.h | 32 +++++++++++
5 files changed, 142 insertions(+), 31 deletions(-)
create mode 100644 libstdc++-v3/testsuite/23_containers/map/allocator/default_init.cc
copy libstdc++-v3/testsuite/23_containers/set/allocator/{move.cc => default_init.c [...]
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unknown user pushed a change to branch master
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from 9283a09c183 IR: Replace the "Linker Options" module flag with "llvm.lin [...]
new c37ab5f8054 SplitKit: Fix partially live subreg splitting
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lib/CodeGen/SplitKit.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
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from ce1a1091e2c Add EOL at EOF to appease source utils like unifdef
new fd2310ef5b4 Remove unneeded conditionals - the code is already conditio [...]
new 9283a09c183 IR: Replace the "Linker Options" module flag with "llvm.lin [...]
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docs/LangRef.rst | 65 +++++++++++-----------
.../llvm/CodeGen/TargetLoweringObjectFileImpl.h | 15 ++---
include/llvm/LTO/legacy/LTOModule.h | 2 +-
include/llvm/Target/TargetLoweringObjectFile.h | 7 +--
lib/Bitcode/Reader/BitcodeReader.cpp | 10 ++++
lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 6 +-
lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 49 ++++++----------
lib/IR/Verifier.cpp | 8 +++
lib/LTO/LTOModule.cpp | 6 +-
lib/Object/IRSymtab.cpp | 6 +-
test/Bitcode/upgrade-linker-options.ll | 15 +++++
test/DebugInfo/COFF/array-odr-violation.ll | 6 +-
test/DebugInfo/COFF/inlining-same-name.ll | 3 +-
test/LTO/Resolution/X86/symtab-elf.ll | 4 +-
test/LTO/Resolution/X86/symtab.ll | 4 +-
test/MC/COFF/cv-compiler-info.ll | 6 +-
test/MC/COFF/linker-options.ll | 8 ++-
test/MC/MachO/linker-options.ll | 7 ++-
tools/llvm-stress/llvm-stress.cpp | 18 +++---
19 files changed, 121 insertions(+), 124 deletions(-)
create mode 100644 test/Bitcode/upgrade-linker-options.ll
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from 1bafd1eab0 Correct debug info bit offset calculation for big-endian targets
new 80987ad1a6 IR: Replace the "Linker Options" module flag with "llvm.link [...]
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lib/CodeGen/CodeGenModule.cpp | 10 +++++-----
lib/CodeGen/CodeGenModule.h | 7 ++++---
test/CodeGen/dependent-lib.c | 8 ++------
test/CodeGen/linker-option.c | 4 +---
test/CodeGen/pragma-comment.c | 4 +---
test/CodeGen/pragma-detect_mismatch.c | 4 +---
test/CodeGenCXX/ms-thread_local.cpp | 4 +---
test/CodeGenObjC/availability-cf-link-guard.m | 5 ++---
test/Modules/autolink.m | 6 ++----
test/Modules/autolinkTBD.m | 6 ++----
test/Modules/module-impl-with-link.c | 3 +--
11 files changed, 22 insertions(+), 39 deletions(-)
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from a07466d98 Allow the GNU gold-style nonstandard SHT_GROUP section.
new f2fc41df7 IR: Replace the "Linker Options" module flag with "llvm.linke [...]
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test/COFF/Inputs/constant-export.ll | 7 ++-----
test/COFF/include-lto.ll | 7 ++-----
test/COFF/lto-linker-opts.ll | 7 ++-----
3 files changed, 6 insertions(+), 15 deletions(-)
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