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from 6e34f0e735 [OpenCL] Emit function-scope variable in constant address sp [...]
new 600a9e6e11 [OPENMP] Check DSA for variables captured by value.
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lib/AST/Stmt.cpp | 2 +-
test/OpenMP/report_default_DSA.cpp | 18 ++++++++++++++++++
2 files changed, 19 insertions(+), 1 deletion(-)
create mode 100644 test/OpenMP/report_default_DSA.cpp
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unknown user pushed a change to branch master
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from fdca717747f * sv.po: Update.
new 415dcd351e6 * config/tilegx/tilegx.c (tilegx_expand_unaligned_load): A [...]
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gcc/ChangeLog | 6 ++++++
gcc/config/tilegx/tilegx.c | 2 +-
gcc/config/tilepro/tilepro.c | 2 +-
3 files changed, 8 insertions(+), 2 deletions(-)
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from eb48e7d58f8 [AArch64] Enable FeatureFuseAES on Cortex-A72.
new 0536db2f708 [SLPVectorizer][X86] Add vectorization tests for vXi64/vXi3 [...]
new 699b16c47c8 Add an extra test for archive symbol tables.
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test/Object/X86/archive-symbol-table.s | 19 +
.../X86/{shift-shl.ll => arith-add.ll} | 525 +++++++------------
.../X86/{shift-shl.ll => arith-mul.ll} | 580 +++++++++------------
.../X86/{shift-shl.ll => arith-sub.ll} | 523 +++++++------------
4 files changed, 611 insertions(+), 1036 deletions(-)
create mode 100644 test/Object/X86/archive-symbol-table.s
copy test/Transforms/SLPVectorizer/X86/{shift-shl.ll => arith-add.ll} (65%)
copy test/Transforms/SLPVectorizer/X86/{shift-shl.ll => arith-mul.ll} (64%)
copy test/Transforms/SLPVectorizer/X86/{shift-shl.ll => arith-sub.ll} (66%)
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Renato Golin pushed a change to branch master
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from d9fe7fb tcwg-llvm-staged-build.yaml: Add repo/branch option
new f6b1fe5 tcwg-llvm-build.sh: updated the wrong argument
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tcwg-llvm-build.sh | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
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from 232c3d52eaf [AMDGPU][MC] Corrected several VI opcodes to avoid printing _e64
new eb48e7d58f8 [AArch64] Enable FeatureFuseAES on Cortex-A72.
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lib/Target/AArch64/AArch64.td | 1 +
test/CodeGen/AArch64/misched-fusion-aes.ll | 33 ++++++++++++++++++++++++++++++
2 files changed, 34 insertions(+)
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unknown user pushed a change to branch master
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from 96ab5e6080 [index] References to fields from template instantiations sh [...]
new 6e34f0e735 [OpenCL] Emit function-scope variable in constant address sp [...]
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include/clang/AST/Decl.h | 9 +++++-
lib/CodeGen/CGDecl.cpp | 13 ++++----
lib/Sema/SemaDecl.cpp | 35 +++++++++++++++-------
.../amdgpu-debug-info-pointer-address-space.cl | 20 ++++++-------
.../amdgpu-debug-info-variable-expression.cl | 30 +++++++++----------
test/CodeGenOpenCL/constant-addr-space-globals.cl | 8 +++--
test/SemaOpenCL/storageclass.cl | 11 ++++++-
7 files changed, 81 insertions(+), 45 deletions(-)
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from e380523e9 [XRay] Fix build with libc++ (NFC).
new 9d786d9ab [sanitizer] Change SizeClassAllocator32 to accept just one template
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lib/asan/asan_allocator.h | 15 ++++++---
lib/lsan/lsan_allocator.h | 16 ++++++---
lib/msan/msan_allocator.cc | 31 +++++++++++++-----
.../sanitizer_allocator_internal.h | 22 ++++++++-----
.../sanitizer_allocator_primary32.h | 27 +++++++++++----
.../tests/sanitizer_allocator_test.cc | 38 +++++++++++++---------
lib/scudo/scudo_allocator.h | 18 +++++++---
lib/tsan/rtl/tsan_rtl.h | 18 ++++++----
8 files changed, 127 insertions(+), 58 deletions(-)
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from 8632b74d7d2 Test commit.
new d9a18c3114b [SLPVectorizer][X86] Add vectorization tests for vXi64/vXi3 [...]
new 232c3d52eaf [AMDGPU][MC] Corrected several VI opcodes to avoid printing _e64
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lib/Target/AMDGPU/VOP2Instructions.td | 33 +-
test/CodeGen/AMDGPU/constant-fold-mi-operands.ll | 12 +-
test/CodeGen/AMDGPU/ctpop.ll | 80 +-
test/CodeGen/AMDGPU/ctpop64.ll | 16 +-
test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 18 +-
test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll | 4 +-
test/MC/AMDGPU/vop2.s | 22 +-
test/MC/AMDGPU/vop3-convert.s | 14 +-
test/MC/Disassembler/AMDGPU/vop2_vi.txt | 22 +-
test/Transforms/SLPVectorizer/X86/shift-ashr.ll | 913 +++++++++++++++++++++++
test/Transforms/SLPVectorizer/X86/shift-lshr.ll | 862 +++++++++++++++++++++
test/Transforms/SLPVectorizer/X86/shift-shl.ll | 814 ++++++++++++++++++++
12 files changed, 2705 insertions(+), 105 deletions(-)
create mode 100644 test/Transforms/SLPVectorizer/X86/shift-ashr.ll
create mode 100644 test/Transforms/SLPVectorizer/X86/shift-lshr.ll
create mode 100644 test/Transforms/SLPVectorizer/X86/shift-shl.ll
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from 41505a7419 JavaScript allows parameter lists to include trailing commas:
new 96ab5e6080 [index] References to fields from template instantiations sh [...]
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lib/Index/IndexingContext.cpp | 15 +++++++++++
test/Index/Core/index-instantiated-source.cpp | 39 +++++++++++++++++++++++++++
2 files changed, 54 insertions(+)
create mode 100644 test/Index/Core/index-instantiated-source.cpp
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