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from 8577a8c0fd7 [XRay][tools] Fixup definition for stat division.
new 123fc0d45e1 [XRay][tools] Remove wayward semicolon (NFC)
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tools/llvm-xray/xray-graph-diff.cc | 2 +-
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at 8c13bcd220 Experimental implementation of RELR-style relocations.
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new 8c13bcd220 Experimental implementation of RELR-style relocations.
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from b7fb17a3b4 [asan] Unconditionally enable GC of globals on COFF.
new fb77f03977 [ubsan] Skip alignment checks on allocas with known alignment
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lib/CodeGen/CGExpr.cpp | 21 +++++++++------------
test/CodeGen/catch-undef-behavior.c | 8 +-------
test/CodeGen/sanitize-recover.c | 10 +---------
test/CodeGenCXX/ubsan-suppress-checks.cpp | 5 +----
4 files changed, 12 insertions(+), 32 deletions(-)
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from 9636fedac31 [AMDGPU] Garbage collect dead code. NFCI.
new 8577a8c0fd7 [XRay][tools] Fixup definition for stat division.
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tools/llvm-xray/xray-graph.h | 6 +++---
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from 3f8d08861b7 [Support] Avoid UB in sys::fs::perms::operator~. NFC.
new 9636fedac31 [AMDGPU] Garbage collect dead code. NFCI.
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lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 10 ----------
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from 1b73841a41 [Hexagon] Handle -O4 when checking optimization level
new b7fb17a3b4 [asan] Unconditionally enable GC of globals on COFF.
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lib/CodeGen/BackendUtil.cpp | 3 +--
test/CodeGen/asan-globals-gc.cpp | 2 +-
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from ed89889572a [MSP430] Fix PR32769: Select8 and Select16 need to have SR [...]
new 3f8d08861b7 [Support] Avoid UB in sys::fs::perms::operator~. NFC.
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include/llvm/Support/FileSystem.h | 4 +++-
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from 4bfa64aac53 [gcov] Sort file info before printing it
new ed89889572a [MSP430] Fix PR32769: Select8 and Select16 need to have SR [...]
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lib/Target/MSP430/MSP430InstrInfo.td | 2 ++
test/CodeGen/MSP430/select-use-sr.ll | 21 +++++++++++++++++++++
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create mode 100644 test/CodeGen/MSP430/select-use-sr.ll
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from 37b4fd9082f revert debugging
new 4bfa64aac53 [gcov] Sort file info before printing it
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lib/IR/GCOV.cpp | 10 +++++++---
test/tools/llvm-cov/Inputs/test_-b.output | 12 ++++++------
test/tools/llvm-cov/Inputs/test_-f.output | 16 ++++++++--------
test/tools/llvm-cov/Inputs/test_long_file_names.output | 8 ++++----
test/tools/llvm-cov/Inputs/test_long_paths.output | 8 ++++----
test/tools/llvm-cov/Inputs/test_missing.output | 8 ++++----
test/tools/llvm-cov/Inputs/test_no_gcda.output | 8 ++++----
test/tools/llvm-cov/Inputs/test_no_options.output | 8 ++++----
test/tools/llvm-cov/Inputs/test_no_output.output | 6 +++---
test/tools/llvm-cov/Inputs/test_no_preserve_paths.output | 8 ++++----
test/tools/llvm-cov/Inputs/test_preserve_paths.output | 8 ++++----
11 files changed, 52 insertions(+), 48 deletions(-)
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from 36766472515 AMDGPU: Shift down reserved SP register like scratch wave offset
new f23578fbc3f [AVR] Do not kill the dest register for a pseudo instruction
new d420e40a969 [WebAssembly] Allow for signed relocation addends
new 37b4fd9082f revert debugging
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include/llvm/ObjectYAML/WasmYAML.h | 2 +-
lib/Object/WasmObjectFile.cpp | 3 ++-
lib/ObjectYAML/WasmYAML.cpp | 2 +-
lib/Target/AVR/AVRExpandPseudoInsts.cpp | 2 +-
test/ObjectYAML/wasm/code_section.yaml | 4 ----
test/ObjectYAML/wasm/data_section.yaml | 32 +++++++++++++++++++++++++-------
6 files changed, 30 insertions(+), 15 deletions(-)
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