Tcwg-commits March 2017

tcwg-commits@lists.linaro.org

7 participants
3096 discussions

[llvm] branch master updated (9be3bb9 -> 956477d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 9be3bb9 GlobalISel: respect BooleanContents when extending i1. new 956477d AMDGPU: Remove hasSideEffects from SI_RETURN_TO_EPILOG The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/SIInstructions.td | 1 - 1 file changed, 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[gcc] branch master updated (fcd8b5a -> da7a26f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from fcd8b5a Use the more formal "cannot" instead of the informal "can't." new da7a26f PR c++/79548 - missing -Wunused-variable on a typedef'd varia [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/c-family/ChangeLog | 6 ++ gcc/c-family/c-common.c | 7 +- gcc/testsuite/ChangeLog | 5 + gcc/testsuite/g++.dg/warn/Wunused-var-26.C | 147 +++++++++++++++++++++++++++++ 4 files changed, 164 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/warn/Wunused-var-26.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (9c890fc -> 9be3bb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 9c890fc SplitKit: Fix subreg copy related problems new dc55587 AMDGPU: Rename SI_RETURN new 9be3bb9 GlobalISel: respect BooleanContents when extending i1. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 20 ++++++++++++++++---- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 5 +++-- lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 +++++++++++-- lib/Target/AMDGPU/AMDGPUInstrInfo.td | 6 +++++- lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 9 +++++---- lib/Target/AMDGPU/SIISelLowering.cpp | 2 +- lib/Target/AMDGPU/SIInsertSkips.cpp | 4 ++-- lib/Target/AMDGPU/SIInsertWaits.cpp | 4 ++-- lib/Target/AMDGPU/SIInstructions.td | 5 +++-- test/CodeGen/AMDGPU/insert-waits-exp.mir | 2 +- test/CodeGen/AMDGPU/scalar-store-cache-flush.mir | 2 +- 11 files changed, 50 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[lldb] branch master updated (bfef72d -> ab7928b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from bfef72d Fix build broken by StringList move. new ab7928b Mirror CMake changes from r298412 to Xcode project The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lldb.xcodeproj/project.pbxproj | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[binutils-gdb] branch users/aoliva/SFN updated (f07a13f -> 45c30a1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch users/aoliva/SFN in repository binutils-gdb. from f07a13f non-LVU: error if .[su]leb128's operand is undefined new 45c30a1 LVU: emit pending line info before changing segments The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gas/subsegs.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (d706d03 -> 9c890fc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from d706d03 AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel new 9c890fc SplitKit: Fix subreg copy related problems The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SplitKit.cpp | 1 - lib/CodeGen/VirtRegMap.cpp | 4 +++- test/CodeGen/AMDGPU/splitkit.mir | 41 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[clang] branch master updated (845442e -> a776ed1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from 845442e Add support for -fno-auto-profile and -fno-profile-sample-use new a776ed1 Remove the -faltivec alias option and replace it with -maltiv [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: docs/ClangCommandLineReference.rst | 2 +- docs/LanguageExtensions.rst | 2 +- include/clang/Basic/DiagnosticDriverKinds.td | 2 ++ include/clang/Driver/Options.td | 10 +++--- lib/Basic/Targets.cpp | 41 ++++++++++++----------- lib/Driver/ToolChains/Arch/PPC.cpp | 4 --- lib/Driver/ToolChains/Clang.cpp | 28 ++++++---------- lib/Frontend/CompilerInstance.cpp | 6 ++++ lib/Frontend/CompilerInvocation.cpp | 3 -- test/CodeGen/altivec.c | 2 +- test/CodeGen/builtins-ppc-altivec.c | 6 ++-- test/CodeGen/builtins-ppc-crypto-disabled.c | 6 ++-- test/CodeGen/builtins-ppc-crypto.c | 4 +-- test/CodeGen/builtins-ppc-error.c | 4 +-- test/CodeGen/builtins-ppc-htm.c | 2 +- test/CodeGen/builtins-ppc-p8vector.c | 6 ++-- test/CodeGen/builtins-ppc-p9vector.c | 4 +-- test/CodeGen/builtins-ppc-quadword.c | 6 ++-- test/CodeGen/builtins-ppc-vsx.c | 4 +-- test/CodeGen/ppc64-align-struct.c | 2 +- test/CodeGen/ppc64-vector.c | 2 +- test/CodeGen/ppc64le-aggregates.c | 2 +- test/Driver/ppc-features.cpp | 49 +++++++++------------------- test/Driver/unsupported-faltivec.c | 10 ++++++ test/Headers/altivec-header.c | 6 ++-- test/Headers/altivec-intrin.c | 2 +- test/Parser/altivec-csk-bool.c | 4 +-- test/Parser/altivec.c | 6 ++-- test/Parser/cxx-altivec.cpp | 6 ++-- test/Parser/vsx.c | 4 +-- test/Sema/altivec-init.c | 6 ++-- test/Sema/builtins-ppc.c | 4 +-- test/SemaCXX/altivec.cpp | 2 +- test/SemaCXX/cxx-altivec.cpp | 2 +- 34 files changed, 118 insertions(+), 131 deletions(-) create mode 100644 test/Driver/unsupported-faltivec.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[compiler-rt] branch master updated (ba802a4 -> 101bbf4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from ba802a4 [compiler-rt] respect CMAKE_EXE_LINKER_FLAGS in compiler and [...] new 101bbf4 Revert "[compiler-rt][asan] Turn on ASAN unittests for win64." The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/asan/CMakeLists.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[lld] branch master updated (635e3de -> afaff6c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lld. from 635e3de Define Config::Endianness. new afaff6c Sort. NFC. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ELF/LinkerScript.cpp | 50 +++++++++++++++++++++++++------------------------- 1 file changed, 25 insertions(+), 25 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

7 years, 8 months

[llvm] branch master updated (123d0b8 -> d706d03)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 123d0b8 Revert "Improve StringMap iterator support." new d706d03 AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: test/Analysis/CostModel/AMDGPU/add-sub.ll | 30 ++-- test/Analysis/CostModel/AMDGPU/bit-ops.ll | 12 +- test/Analysis/CostModel/AMDGPU/br.ll | 4 +- test/Analysis/CostModel/AMDGPU/extractelement.ll | 24 +-- test/Analysis/CostModel/AMDGPU/fabs.ll | 18 +- test/Analysis/CostModel/AMDGPU/fadd.ll | 18 +- test/Analysis/CostModel/AMDGPU/fdiv.ll | 18 +- test/Analysis/CostModel/AMDGPU/fmul.ll | 18 +- test/Analysis/CostModel/AMDGPU/fsub.ll | 18 +- test/Analysis/CostModel/AMDGPU/insertelement.ll | 8 +- test/Analysis/CostModel/AMDGPU/mul.ll | 18 +- test/Analysis/CostModel/AMDGPU/shifts.ll | 12 +- .../DivergenceAnalysis/AMDGPU/intrinsics.ll | 2 +- .../DivergenceAnalysis/AMDGPU/no-return-blocks.ll | 2 +- .../AMDGPU/unreachable-loop-block.ll | 2 +- .../AMDGPU/workitem-intrinsics.ll | 10 +- test/CodeGen/AMDGPU/32-bit-local-address-space.ll | 24 +-- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 2 +- test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir | 6 +- test/CodeGen/AMDGPU/GlobalISel/smrd.ll | 12 +- test/CodeGen/AMDGPU/add-debug.ll | 2 +- test/CodeGen/AMDGPU/add.i16.ll | 16 +- test/CodeGen/AMDGPU/add.ll | 16 +- test/CodeGen/AMDGPU/add.v2i16.ll | 26 +-- test/CodeGen/AMDGPU/add_i128.ll | 8 +- test/CodeGen/AMDGPU/add_i64.ll | 12 +- test/CodeGen/AMDGPU/addrspacecast-captured.ll | 6 +- test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll | 28 +-- test/CodeGen/AMDGPU/addrspacecast.ll | 32 ++-- test/CodeGen/AMDGPU/amdgcn.bitcast.ll | 22 +-- test/CodeGen/AMDGPU/amdgcn.private-memory.ll | 2 +- test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll | 16 +- test/CodeGen/AMDGPU/amdgpu.private-memory.ll | 42 ++--- .../amdgpu.work-item-intrinsics.deprecated.ll | 30 ++-- test/CodeGen/AMDGPU/and-gcn.ll | 2 +- test/CodeGen/AMDGPU/and.ll | 80 ++++----- .../CodeGen/AMDGPU/annotate-kernel-features-hsa.ll | 100 +++++------ test/CodeGen/AMDGPU/annotate-kernel-features.ll | 78 ++++---- test/CodeGen/AMDGPU/anonymous-gv.ll | 4 +- test/CodeGen/AMDGPU/anyext.ll | 4 +- test/CodeGen/AMDGPU/array-ptr-calc-i32.ll | 2 +- test/CodeGen/AMDGPU/array-ptr-calc-i64.ll | 2 +- test/CodeGen/AMDGPU/ashr.v2i16.ll | 16 +- test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll | 10 +- test/CodeGen/AMDGPU/atomic_load_add.ll | 8 +- test/CodeGen/AMDGPU/atomic_load_sub.ll | 8 +- .../AMDGPU/attr-amdgpu-flat-work-group-size.ll | 8 +- test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll | 6 +- test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll | 2 +- test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll | 20 +-- test/CodeGen/AMDGPU/attr-unparseable.ll | 16 +- test/CodeGen/AMDGPU/basic-branch.ll | 4 +- test/CodeGen/AMDGPU/basic-loop.ll | 2 +- test/CodeGen/AMDGPU/bfe-patterns.ll | 16 +- test/CodeGen/AMDGPU/bfe_uint.ll | 4 +- test/CodeGen/AMDGPU/bfi_int.ll | 6 +- test/CodeGen/AMDGPU/bfm.ll | 4 +- test/CodeGen/AMDGPU/bitcast-vector-extract.ll | 12 +- .../CodeGen/AMDGPU/bitreverse-inline-immediates.ll | 54 +++--- test/CodeGen/AMDGPU/bitreverse.ll | 20 +-- test/CodeGen/AMDGPU/br_cc.f16.ll | 6 +- test/CodeGen/AMDGPU/branch-relax-spill.ll | 2 +- test/CodeGen/AMDGPU/branch-relaxation.ll | 20 +-- test/CodeGen/AMDGPU/bswap.ll | 14 +- test/CodeGen/AMDGPU/build_vector.ll | 4 +- test/CodeGen/AMDGPU/call.ll | 6 +- test/CodeGen/AMDGPU/captured-frame-index.ll | 20 +-- test/CodeGen/AMDGPU/cf-loop-on-constant.ll | 10 +- test/CodeGen/AMDGPU/cf-stack-bug.ll | 8 +- test/CodeGen/AMDGPU/cf_end.ll | 2 +- test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll | 6 +- test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 44 ++--- test/CodeGen/AMDGPU/cgp-bitfield-extract.ll | 12 +- test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll | 4 +- test/CodeGen/AMDGPU/coalescer_remat.ll | 2 +- .../AMDGPU/codegen-prepare-addrmode-sext.ll | 2 +- test/CodeGen/AMDGPU/combine_vloads.ll | 2 +- test/CodeGen/AMDGPU/commute-compares.ll | 104 +++++------ test/CodeGen/AMDGPU/commute_modifiers.ll | 20 +-- test/CodeGen/AMDGPU/concat_vectors.ll | 64 +++---- test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir | 16 +- test/CodeGen/AMDGPU/constant-fold-mi-operands.ll | 20 +-- test/CodeGen/AMDGPU/control-flow-fastregalloc.ll | 6 +- test/CodeGen/AMDGPU/convergent-inlineasm.ll | 4 +- test/CodeGen/AMDGPU/copy-illegal-type.ll | 22 +-- test/CodeGen/AMDGPU/copy-to-reg.ll | 2 +- test/CodeGen/AMDGPU/ctlz.ll | 32 ++-- test/CodeGen/AMDGPU/ctlz_zero_undef.ll | 34 ++-- test/CodeGen/AMDGPU/ctpop.ll | 30 ++-- test/CodeGen/AMDGPU/ctpop64.ll | 22 +-- test/CodeGen/AMDGPU/cttz_zero_undef.ll | 8 +- test/CodeGen/AMDGPU/cube.ll | 2 +- test/CodeGen/AMDGPU/cvt_f32_ubyte.ll | 32 ++-- test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll | 12 +- test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll | 10 +- test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll | 2 +- .../dagcombiner-bug-illegal-vec4-int-to-fp.ll | 4 +- test/CodeGen/AMDGPU/debug.ll | 2 +- test/CodeGen/AMDGPU/debugger-emit-prologue.ll | 2 +- test/CodeGen/AMDGPU/debugger-insert-nops.ll | 2 +- test/CodeGen/AMDGPU/debugger-reserve-regs.ll | 2 +- test/CodeGen/AMDGPU/default-fp-mode.ll | 18 +- test/CodeGen/AMDGPU/detect-dead-lanes.mir | 18 +- .../AMDGPU/disconnected-predset-break-bug.ll | 2 +- test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll | 2 +- .../ds-negative-offset-addressing-mode-loop.ll | 2 +- test/CodeGen/AMDGPU/ds-sub-offset.ll | 14 +- test/CodeGen/AMDGPU/ds_read2.ll | 48 ++--- test/CodeGen/AMDGPU/ds_read2_offset_order.ll | 2 +- test/CodeGen/AMDGPU/ds_read2_superreg.ll | 20 +-- test/CodeGen/AMDGPU/ds_read2st64.ll | 26 +-- test/CodeGen/AMDGPU/ds_write2.ll | 42 ++--- test/CodeGen/AMDGPU/ds_write2st64.ll | 10 +- test/CodeGen/AMDGPU/dynamic_stackalloc.ll | 2 +- test/CodeGen/AMDGPU/early-if-convert-cost.ll | 8 +- test/CodeGen/AMDGPU/early-if-convert.ll | 36 ++-- test/CodeGen/AMDGPU/elf.r600.ll | 2 +- test/CodeGen/AMDGPU/empty-function.ll | 4 +- .../AMDGPU/enable-no-signed-zeros-fp-math.ll | 2 +- test/CodeGen/AMDGPU/endcf-loop-header.ll | 2 +- test/CodeGen/AMDGPU/exceed-max-sgprs.ll | 10 +- test/CodeGen/AMDGPU/extend-bit-ops-i16.ll | 6 +- test/CodeGen/AMDGPU/extload-align.ll | 2 +- test/CodeGen/AMDGPU/extload-private.ll | 8 +- test/CodeGen/AMDGPU/extload.ll | 8 +- .../extract-vector-elt-build-vector-combine.ll | 6 +- test/CodeGen/AMDGPU/extract_vector_elt-f16.ll | 14 +- test/CodeGen/AMDGPU/extract_vector_elt-f64.ll | 6 +- test/CodeGen/AMDGPU/extract_vector_elt-i16.ll | 14 +- test/CodeGen/AMDGPU/extract_vector_elt-i64.ll | 12 +- test/CodeGen/AMDGPU/extract_vector_elt-i8.ll | 20 +-- test/CodeGen/AMDGPU/extractelt-to-trunc.ll | 12 +- test/CodeGen/AMDGPU/fabs.f16.ll | 16 +- test/CodeGen/AMDGPU/fabs.f64.ll | 16 +- test/CodeGen/AMDGPU/fabs.ll | 14 +- test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll | 16 +- test/CodeGen/AMDGPU/fadd.f16.ll | 12 +- test/CodeGen/AMDGPU/fadd.ll | 10 +- test/CodeGen/AMDGPU/fadd64.ll | 8 +- test/CodeGen/AMDGPU/fcanonicalize.f16.ll | 84 ++++----- test/CodeGen/AMDGPU/fcanonicalize.ll | 84 ++++----- test/CodeGen/AMDGPU/fceil.ll | 12 +- test/CodeGen/AMDGPU/fceil64.ll | 12 +- test/CodeGen/AMDGPU/fcmp-cnd.ll | 2 +- test/CodeGen/AMDGPU/fcmp-cnde-int-args.ll | 2 +- test/CodeGen/AMDGPU/fcmp.f16.ll | 58 +++--- test/CodeGen/AMDGPU/fcmp.ll | 4 +- test/CodeGen/AMDGPU/fcmp64.ll | 12 +- test/CodeGen/AMDGPU/fconst64.ll | 2 +- test/CodeGen/AMDGPU/fcopysign.f16.ll | 24 +-- test/CodeGen/AMDGPU/fcopysign.f32.ll | 6 +- test/CodeGen/AMDGPU/fcopysign.f64.ll | 8 +- test/CodeGen/AMDGPU/fdiv.f16.ll | 24 +-- test/CodeGen/AMDGPU/fdiv.f64.ll | 22 +-- test/CodeGen/AMDGPU/fdiv.ll | 28 +-- test/CodeGen/AMDGPU/ffloor.f64.ll | 16 +- test/CodeGen/AMDGPU/ffloor.ll | 6 +- test/CodeGen/AMDGPU/flat-address-space.ll | 32 ++-- .../AMDGPU/flat-for-global-subtarget-feature.ll | 4 +- test/CodeGen/AMDGPU/flat-scratch-reg.ll | 8 +- test/CodeGen/AMDGPU/flat_atomics.ll | 192 ++++++++++---------- test/CodeGen/AMDGPU/flat_atomics_i64.ll | 194 ++++++++++---------- test/CodeGen/AMDGPU/fma-combine.ll | 52 +++--- test/CodeGen/AMDGPU/fma.f64.ll | 6 +- test/CodeGen/AMDGPU/fma.ll | 10 +- test/CodeGen/AMDGPU/fmax3.f64.ll | 2 +- test/CodeGen/AMDGPU/fmax3.ll | 4 +- test/CodeGen/AMDGPU/fmax_legacy.f64.ll | 8 +- test/CodeGen/AMDGPU/fmax_legacy.ll | 14 +- test/CodeGen/AMDGPU/fmaxnum.f64.ll | 10 +- test/CodeGen/AMDGPU/fmaxnum.ll | 34 ++-- test/CodeGen/AMDGPU/fmed3.ll | 84 ++++----- test/CodeGen/AMDGPU/fmin3.ll | 4 +- test/CodeGen/AMDGPU/fmin_legacy.f64.ll | 10 +- test/CodeGen/AMDGPU/fmin_legacy.ll | 20 +-- test/CodeGen/AMDGPU/fminnum.f64.ll | 10 +- test/CodeGen/AMDGPU/fminnum.ll | 34 ++-- test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 24 +-- test/CodeGen/AMDGPU/fmul.f16.ll | 12 +- test/CodeGen/AMDGPU/fmul.ll | 12 +- test/CodeGen/AMDGPU/fmul64.ll | 6 +- test/CodeGen/AMDGPU/fmuladd.f16.ll | 34 ++-- test/CodeGen/AMDGPU/fmuladd.f32.ll | 36 ++-- test/CodeGen/AMDGPU/fmuladd.f64.ll | 16 +- test/CodeGen/AMDGPU/fmuladd.v2f16.ll | 8 +- test/CodeGen/AMDGPU/fnearbyint.ll | 12 +- test/CodeGen/AMDGPU/fneg-combines.ll | 182 +++++++++---------- test/CodeGen/AMDGPU/fneg-fabs.f16.ll | 20 +-- test/CodeGen/AMDGPU/fneg-fabs.f64.ll | 16 +- test/CodeGen/AMDGPU/fneg-fabs.ll | 16 +- test/CodeGen/AMDGPU/fneg.f16.ll | 16 +- test/CodeGen/AMDGPU/fneg.f64.ll | 10 +- test/CodeGen/AMDGPU/fneg.ll | 12 +- test/CodeGen/AMDGPU/fp-classify.ll | 18 +- test/CodeGen/AMDGPU/fp16_to_fp32.ll | 2 +- test/CodeGen/AMDGPU/fp16_to_fp64.ll | 2 +- test/CodeGen/AMDGPU/fp32_to_fp16.ll | 2 +- test/CodeGen/AMDGPU/fp_to_sint.f64.ll | 12 +- test/CodeGen/AMDGPU/fp_to_sint.ll | 20 +-- test/CodeGen/AMDGPU/fp_to_uint.f64.ll | 16 +- test/CodeGen/AMDGPU/fp_to_uint.ll | 18 +- test/CodeGen/AMDGPU/fpext.f16.ll | 28 +-- test/CodeGen/AMDGPU/fpext.ll | 10 +- test/CodeGen/AMDGPU/fptosi.f16.ll | 12 +- test/CodeGen/AMDGPU/fptoui.f16.ll | 12 +- test/CodeGen/AMDGPU/fptrunc.f16.ll | 14 +- test/CodeGen/AMDGPU/fptrunc.ll | 10 +- test/CodeGen/AMDGPU/fract.f64.ll | 8 +- test/CodeGen/AMDGPU/fract.ll | 8 +- test/CodeGen/AMDGPU/frem.ll | 14 +- test/CodeGen/AMDGPU/fsqrt.f64.ll | 4 +- test/CodeGen/AMDGPU/fsqrt.ll | 20 +-- test/CodeGen/AMDGPU/fsub.f16.ll | 12 +- test/CodeGen/AMDGPU/fsub.ll | 20 +-- test/CodeGen/AMDGPU/fsub64.ll | 20 +-- test/CodeGen/AMDGPU/ftrunc.f64.ll | 14 +- test/CodeGen/AMDGPU/ftrunc.ll | 12 +- test/CodeGen/AMDGPU/gep-address-space.ll | 8 +- test/CodeGen/AMDGPU/global-constant.ll | 4 +- test/CodeGen/AMDGPU/global-directive.ll | 2 +- test/CodeGen/AMDGPU/global-extload-i16.ll | 64 +++---- test/CodeGen/AMDGPU/global-variable-relocs.ll | 22 +-- test/CodeGen/AMDGPU/global_atomics.ll | 196 ++++++++++----------- test/CodeGen/AMDGPU/global_atomics_i64.ll | 194 ++++++++++---------- test/CodeGen/AMDGPU/gv-const-addrspace.ll | 10 +- test/CodeGen/AMDGPU/gv-offset-folding.ll | 2 +- test/CodeGen/AMDGPU/half.ll | 88 ++++----- test/CodeGen/AMDGPU/hsa-default-device.ll | 2 +- test/CodeGen/AMDGPU/hsa-fp-mode.ll | 14 +- test/CodeGen/AMDGPU/hsa-globals.ll | 2 +- test/CodeGen/AMDGPU/hsa-group-segment.ll | 2 +- test/CodeGen/AMDGPU/i1-copy-implicit-def.ll | 2 +- test/CodeGen/AMDGPU/i1-copy-phi.ll | 2 +- test/CodeGen/AMDGPU/i8-to-double-to-float.ll | 2 +- .../AMDGPU/icmp-select-sete-reverse-args.ll | 2 +- test/CodeGen/AMDGPU/icmp.i16.ll | 40 ++--- test/CodeGen/AMDGPU/icmp64.ll | 20 +-- test/CodeGen/AMDGPU/image-attributes.ll | 20 +-- test/CodeGen/AMDGPU/image-resource-id.ll | 40 ++--- test/CodeGen/AMDGPU/imm.ll | 136 +++++++------- test/CodeGen/AMDGPU/imm16.ll | 66 +++---- test/CodeGen/AMDGPU/immv216.ll | 66 +++---- .../CodeGen/AMDGPU/indirect-addressing-si-noopt.ll | 2 +- test/CodeGen/AMDGPU/indirect-addressing-si.ll | 48 ++--- test/CodeGen/AMDGPU/indirect-private-64.ll | 8 +- test/CodeGen/AMDGPU/infinite-loop-evergreen.ll | 2 +- test/CodeGen/AMDGPU/infinite-loop.ll | 2 +- test/CodeGen/AMDGPU/inline-asm.ll | 32 ++-- test/CodeGen/AMDGPU/inline-calls.ll | 8 +- test/CodeGen/AMDGPU/inline-constraints.ll | 12 +- test/CodeGen/AMDGPU/inlineasm-16.ll | 8 +- test/CodeGen/AMDGPU/inlineasm-illegal-type.ll | 20 +-- test/CodeGen/AMDGPU/inlineasm-packed.ll | 12 +- test/CodeGen/AMDGPU/insert_subreg.ll | 2 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 64 +++---- test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll | 46 ++--- test/CodeGen/AMDGPU/inserted-wait-states.mir | 22 +-- test/CodeGen/AMDGPU/internalize.ll | 4 +- test/CodeGen/AMDGPU/invalid-addrspacecast.ll | 2 +- .../AMDGPU/invariant-load-no-alias-store.ll | 4 +- test/CodeGen/AMDGPU/invert-br-undef-vcc.mir | 2 +- test/CodeGen/AMDGPU/kcache-fold.ll | 4 +- test/CodeGen/AMDGPU/kernarg-stack-alignment.ll | 10 +- test/CodeGen/AMDGPU/kernel-args.ll | 72 ++++---- test/CodeGen/AMDGPU/large-alloca-compute.ll | 2 +- test/CodeGen/AMDGPU/large-constant-initializer.ll | 2 +- .../AMDGPU/large-work-group-promote-alloca.ll | 22 +-- test/CodeGen/AMDGPU/lds-alignment.ll | 28 +-- test/CodeGen/AMDGPU/lds-initializer.ll | 2 +- test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll | 2 +- test/CodeGen/AMDGPU/lds-oqap-crash.ll | 2 +- test/CodeGen/AMDGPU/lds-output-queue.ll | 4 +- test/CodeGen/AMDGPU/lds-size.ll | 2 +- test/CodeGen/AMDGPU/lds-zero-initializer.ll | 2 +- .../CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll | 2 +- test/CodeGen/AMDGPU/literals.ll | 8 +- test/CodeGen/AMDGPU/liveness.mir | 2 +- test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.i32.ll | 74 ++++---- test/CodeGen/AMDGPU/llvm.AMDGPU.bfe.u32.ll | 104 +++++------ test/CodeGen/AMDGPU/llvm.SI.export.ll | 38 ++-- test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll | 68 +++---- test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll | 68 +++---- test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.wbinvl1.sc.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.wbinvl1.vol.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll | 16 +- test/CodeGen/AMDGPU/llvm.amdgcn.class.ll | 60 +++---- test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 20 +-- test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll | 14 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll | 20 +-- test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll | 40 ++--- test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll | 32 ++-- test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 76 ++++---- test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.ll | 56 +++--- test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll | 10 +- test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll | 12 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll | 12 +- test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll | 44 ++--- test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll | 74 ++++---- test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll | 8 +- test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll | 80 ++++----- test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll | 80 ++++----- .../AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.u32.u8.ll | 10 +- test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll | 8 +- test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll | 28 +-- test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll | 8 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.legacy.ll | 8 +- test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll | 14 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll | 74 ++++---- test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll | 22 +-- test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll | 4 +- test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 104 +++++------ test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll | 2 +- test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll | 6 +- test/CodeGen/AMDGPU/llvm.ceil.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.cos.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.cos.ll | 4 +- test/CodeGen/AMDGPU/llvm.dbg.value.ll | 2 +- test/CodeGen/AMDGPU/llvm.exp2.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.exp2.ll | 6 +- test/CodeGen/AMDGPU/llvm.floor.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.fma.f16.ll | 16 +- test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 8 +- test/CodeGen/AMDGPU/llvm.log2.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.log2.ll | 6 +- test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 12 +- test/CodeGen/AMDGPU/llvm.memcpy.ll | 22 +-- test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 12 +- test/CodeGen/AMDGPU/llvm.r600.dot4.ll | 2 +- test/CodeGen/AMDGPU/llvm.r600.group.barrier.ll | 2 +- test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll | 20 +-- test/CodeGen/AMDGPU/llvm.r600.recipsqrt.clamped.ll | 2 +- test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll | 6 +- test/CodeGen/AMDGPU/llvm.r600.tex.ll | 2 +- test/CodeGen/AMDGPU/llvm.rint.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.rint.f64.ll | 6 +- test/CodeGen/AMDGPU/llvm.rint.ll | 6 +- test/CodeGen/AMDGPU/llvm.round.f64.ll | 10 +- test/CodeGen/AMDGPU/llvm.round.ll | 8 +- test/CodeGen/AMDGPU/llvm.sin.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.sin.ll | 16 +- test/CodeGen/AMDGPU/llvm.sqrt.f16.ll | 4 +- test/CodeGen/AMDGPU/llvm.trunc.f16.ll | 4 +- test/CodeGen/AMDGPU/load-constant-f64.ll | 2 +- test/CodeGen/AMDGPU/load-constant-i1.ll | 88 ++++----- test/CodeGen/AMDGPU/load-constant-i16.ll | 80 ++++----- test/CodeGen/AMDGPU/load-constant-i32.ll | 40 ++--- test/CodeGen/AMDGPU/load-constant-i64.ll | 12 +- test/CodeGen/AMDGPU/load-constant-i8.ll | 112 ++++++------ test/CodeGen/AMDGPU/load-global-f32.ll | 12 +- test/CodeGen/AMDGPU/load-global-f64.ll | 12 +- test/CodeGen/AMDGPU/load-global-i1.ll | 88 ++++----- test/CodeGen/AMDGPU/load-global-i16.ll | 80 ++++----- test/CodeGen/AMDGPU/load-global-i32.ll | 40 ++--- test/CodeGen/AMDGPU/load-global-i64.ll | 12 +- test/CodeGen/AMDGPU/load-global-i8.ll | 112 ++++++------ test/CodeGen/AMDGPU/load-local-f32.ll | 12 +- test/CodeGen/AMDGPU/load-local-f64.ll | 12 +- test/CodeGen/AMDGPU/load-local-i1.ll | 88 ++++----- test/CodeGen/AMDGPU/load-local-i16.ll | 80 ++++----- test/CodeGen/AMDGPU/load-local-i32.ll | 40 ++--- test/CodeGen/AMDGPU/load-local-i64.ll | 12 +- test/CodeGen/AMDGPU/load-local-i8.ll | 112 ++++++------ test/CodeGen/AMDGPU/load-weird-sizes.ll | 4 +- test/CodeGen/AMDGPU/local-64.ll | 32 ++-- test/CodeGen/AMDGPU/local-atomics.ll | 108 ++++++------ test/CodeGen/AMDGPU/local-atomics64.ll | 100 +++++------ test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 4 +- test/CodeGen/AMDGPU/local-memory.ll | 4 +- test/CodeGen/AMDGPU/local-memory.r600.ll | 4 +- test/CodeGen/AMDGPU/loop-address.ll | 2 +- test/CodeGen/AMDGPU/loop-idiom.ll | 4 +- test/CodeGen/AMDGPU/loop_break.ll | 12 +- test/CodeGen/AMDGPU/lower-mem-intrinsics.ll | 22 +-- .../AMDGPU/lower-range-metadata-intrinsic-call.ll | 6 +- test/CodeGen/AMDGPU/lshr.v2i16.ll | 16 +- test/CodeGen/AMDGPU/mad-combine.ll | 28 +-- test/CodeGen/AMDGPU/mad24-get-global-id.ll | 2 +- test/CodeGen/AMDGPU/mad_int24.ll | 2 +- test/CodeGen/AMDGPU/mad_uint24.ll | 8 +- test/CodeGen/AMDGPU/madak.ll | 20 +-- test/CodeGen/AMDGPU/madmk.ll | 20 +-- test/CodeGen/AMDGPU/max.i16.ll | 16 +- test/CodeGen/AMDGPU/max.ll | 46 ++--- test/CodeGen/AMDGPU/max3.ll | 4 +- test/CodeGen/AMDGPU/mem-builtins.ll | 12 +- test/CodeGen/AMDGPU/merge-stores.ll | 76 ++++---- test/CodeGen/AMDGPU/min.ll | 70 ++++---- test/CodeGen/AMDGPU/min3.ll | 8 +- test/CodeGen/AMDGPU/missing-store.ll | 2 +- .../AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll | 2 +- test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll | 4 +- test/CodeGen/AMDGPU/mubuf.ll | 26 +-- test/CodeGen/AMDGPU/mul.ll | 30 ++-- test/CodeGen/AMDGPU/mul_int24.ll | 14 +- test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 26 +-- test/CodeGen/AMDGPU/mul_uint24-r600.ll | 12 +- test/CodeGen/AMDGPU/multilevel-break.ll | 4 +- .../AMDGPU/no-initializer-constant-addrspace.ll | 4 +- test/CodeGen/AMDGPU/no-shrink-extloads.ll | 36 ++-- test/CodeGen/AMDGPU/opencl-image-metadata.ll | 2 +- test/CodeGen/AMDGPU/operand-folding.ll | 14 +- test/CodeGen/AMDGPU/operand-spacing.ll | 2 +- test/CodeGen/AMDGPU/optimize-if-exec-masking.mir | 20 +-- test/CodeGen/AMDGPU/or.ll | 44 ++--- test/CodeGen/AMDGPU/over-max-lds-size.ll | 2 +- test/CodeGen/AMDGPU/pack.v2f16.ll | 20 +-- test/CodeGen/AMDGPU/pack.v2i16.ll | 18 +- test/CodeGen/AMDGPU/packetizer.ll | 2 +- test/CodeGen/AMDGPU/parallelandifcollapse.ll | 2 +- test/CodeGen/AMDGPU/parallelorifcollapse.ll | 2 +- .../partially-dead-super-register-immediate.ll | 2 +- test/CodeGen/AMDGPU/predicates.ll | 8 +- test/CodeGen/AMDGPU/private-access-no-objects.ll | 8 +- test/CodeGen/AMDGPU/private-element-size.ll | 10 +- test/CodeGen/AMDGPU/private-memory-atomics.ll | 4 +- test/CodeGen/AMDGPU/private-memory-broken.ll | 2 +- test/CodeGen/AMDGPU/private-memory-r600.ll | 28 +-- .../AMDGPU/promote-alloca-array-allocation.ll | 4 +- .../AMDGPU/promote-alloca-bitcast-function.ll | 4 +- test/CodeGen/AMDGPU/promote-alloca-globals.ll | 4 +- .../AMDGPU/promote-alloca-invariant-markers.ll | 2 +- test/CodeGen/AMDGPU/promote-alloca-lifetime.ll | 2 +- .../AMDGPU/promote-alloca-mem-intrinsics.ll | 8 +- test/CodeGen/AMDGPU/promote-alloca-no-opts.ll | 4 +- .../AMDGPU/promote-alloca-padding-size-estimate.ll | 6 +- .../AMDGPU/promote-alloca-stored-pointer-value.ll | 10 +- test/CodeGen/AMDGPU/promote-alloca-to-lds-icmp.ll | 8 +- test/CodeGen/AMDGPU/promote-alloca-to-lds-phi.ll | 14 +- .../CodeGen/AMDGPU/promote-alloca-to-lds-select.ll | 16 +- .../AMDGPU/promote-alloca-unhandled-intrinsic.ll | 2 +- test/CodeGen/AMDGPU/promote-alloca-volatile.ll | 6 +- test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll | 2 +- test/CodeGen/AMDGPU/r600.alu-limits.ll | 2 +- test/CodeGen/AMDGPU/r600.bitcast.ll | 16 +- test/CodeGen/AMDGPU/r600.global_atomics.ll | 108 ++++++------ test/CodeGen/AMDGPU/r600.private-memory.ll | 2 +- test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll | 16 +- test/CodeGen/AMDGPU/rcp-pattern.ll | 24 +-- .../AMDGPU/read-register-invalid-subtarget.ll | 2 +- .../AMDGPU/read-register-invalid-type-i32.ll | 2 +- .../AMDGPU/read-register-invalid-type-i64.ll | 2 +- test/CodeGen/AMDGPU/read_register.ll | 14 +- test/CodeGen/AMDGPU/readcyclecounter.ll | 2 +- test/CodeGen/AMDGPU/reduce-load-width-alignment.ll | 6 +- .../CodeGen/AMDGPU/reduce-store-width-alignment.ll | 10 +- test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll | 2 +- test/CodeGen/AMDGPU/regcoalesce-dbg.mir | 2 +- test/CodeGen/AMDGPU/register-count-comments.ll | 4 +- test/CodeGen/AMDGPU/rename-disconnected-bug.ll | 2 +- test/CodeGen/AMDGPU/rename-independent-subregs.mir | 4 +- test/CodeGen/AMDGPU/reorder-stores.ll | 8 +- test/CodeGen/AMDGPU/rotl.i64.ll | 4 +- test/CodeGen/AMDGPU/rotl.ll | 6 +- test/CodeGen/AMDGPU/rotr.i64.ll | 8 +- test/CodeGen/AMDGPU/rotr.ll | 6 +- test/CodeGen/AMDGPU/rsq.ll | 16 +- test/CodeGen/AMDGPU/s_addk_i32.ll | 20 +-- test/CodeGen/AMDGPU/s_movk_i32.ll | 26 +-- test/CodeGen/AMDGPU/s_mulk_i32.ll | 10 +- test/CodeGen/AMDGPU/sad.ll | 34 ++-- test/CodeGen/AMDGPU/saddo.ll | 10 +- test/CodeGen/AMDGPU/salu-to-valu.ll | 36 ++-- test/CodeGen/AMDGPU/sampler-resource-id.ll | 6 +- test/CodeGen/AMDGPU/scalar-store-cache-flush.mir | 12 +- test/CodeGen/AMDGPU/scalar_to_vector.ll | 14 +- test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll | 2 +- test/CodeGen/AMDGPU/schedule-global-loads.ll | 4 +- test/CodeGen/AMDGPU/schedule-if-2.ll | 2 +- test/CodeGen/AMDGPU/schedule-if.ll | 2 +- test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll | 4 +- test/CodeGen/AMDGPU/schedule-regpressure-limit.ll | 2 +- test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll | 2 +- test/CodeGen/AMDGPU/scratch-buffer.ll | 8 +- test/CodeGen/AMDGPU/sdiv.ll | 30 ++-- test/CodeGen/AMDGPU/sdivrem24.ll | 34 ++-- test/CodeGen/AMDGPU/sdivrem64.ll | 12 +- test/CodeGen/AMDGPU/sdwa-peephole.ll | 38 ++-- .../AMDGPU/select-fabs-fneg-extract-legacy.ll | 4 +- test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 84 ++++----- test/CodeGen/AMDGPU/select-i1.ll | 4 +- test/CodeGen/AMDGPU/select-opt.ll | 18 +- test/CodeGen/AMDGPU/select-vectors.ll | 26 +-- test/CodeGen/AMDGPU/select.f16.ll | 20 +-- test/CodeGen/AMDGPU/select.ll | 2 +- test/CodeGen/AMDGPU/select64.ll | 10 +- test/CodeGen/AMDGPU/selectcc-cnd.ll | 2 +- test/CodeGen/AMDGPU/selectcc-cnde-int.ll | 2 +- test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll | 2 +- test/CodeGen/AMDGPU/selectcc-opt.ll | 8 +- test/CodeGen/AMDGPU/selectcc.ll | 2 +- test/CodeGen/AMDGPU/set-dx10.ll | 24 +-- test/CodeGen/AMDGPU/setcc-equivalent.ll | 4 +- test/CodeGen/AMDGPU/setcc-fneg-constant.ll | 32 ++-- test/CodeGen/AMDGPU/setcc-opt.ll | 40 ++--- test/CodeGen/AMDGPU/setcc.ll | 60 +++---- test/CodeGen/AMDGPU/setcc64.ll | 48 ++--- test/CodeGen/AMDGPU/sext-eliminate.ll | 4 +- test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll | 2 +- test/CodeGen/AMDGPU/sext-in-reg.ll | 100 +++++------ test/CodeGen/AMDGPU/sgpr-control-flow.ll | 8 +- test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll | 2 +- test/CodeGen/AMDGPU/sgpr-copy.ll | 2 +- test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll | 10 +- test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll | 44 ++--- test/CodeGen/AMDGPU/shift-i64-opts.ll | 40 ++--- test/CodeGen/AMDGPU/shl.ll | 66 +++---- test/CodeGen/AMDGPU/shl.v2i16.ll | 16 +- test/CodeGen/AMDGPU/shl_add_constant.ll | 10 +- test/CodeGen/AMDGPU/shl_add_ptr.ll | 36 ++-- test/CodeGen/AMDGPU/shrink-add-sub-constant.ll | 24 +-- test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir | 12 +- test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll | 4 +- test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll | 2 +- test/CodeGen/AMDGPU/si-annotate-cf.ll | 8 +- test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll | 2 +- test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir | 2 +- .../si-instr-info-correct-implicit-operands.ll | 2 +- .../si-lower-control-flow-unreachable-block.ll | 4 +- test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll | 2 +- test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll | 20 +-- test/CodeGen/AMDGPU/si-vector-hang.ll | 2 +- test/CodeGen/AMDGPU/sign_extend.ll | 26 +-- test/CodeGen/AMDGPU/sint_to_fp.f64.ll | 10 +- test/CodeGen/AMDGPU/sint_to_fp.i64.ll | 16 +- test/CodeGen/AMDGPU/sint_to_fp.ll | 16 +- test/CodeGen/AMDGPU/sitofp.f16.ll | 8 +- test/CodeGen/AMDGPU/smed3.ll | 58 +++--- test/CodeGen/AMDGPU/sminmax.ll | 22 +-- test/CodeGen/AMDGPU/sminmax.v2i16.ll | 22 +-- test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 4 +- test/CodeGen/AMDGPU/smrd.ll | 12 +- test/CodeGen/AMDGPU/sopk-compares.ll | 76 ++++---- test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll | 2 +- test/CodeGen/AMDGPU/spill-cfg-position.ll | 2 +- test/CodeGen/AMDGPU/spill-m0.ll | 6 +- test/CodeGen/AMDGPU/spill-scavenge-offset.ll | 2 +- test/CodeGen/AMDGPU/split-scalar-i64-add.ll | 10 +- .../AMDGPU/split-vector-memoperand-offsets.ll | 2 +- test/CodeGen/AMDGPU/splitkit.mir | 4 +- test/CodeGen/AMDGPU/sra.ll | 26 +-- test/CodeGen/AMDGPU/srem.ll | 26 +-- test/CodeGen/AMDGPU/srl.ll | 16 +- test/CodeGen/AMDGPU/ssubo.ll | 10 +- test/CodeGen/AMDGPU/store-barrier.ll | 2 +- test/CodeGen/AMDGPU/store-global.ll | 46 ++--- test/CodeGen/AMDGPU/store-local.ll | 24 +-- test/CodeGen/AMDGPU/store-private.ll | 48 ++--- test/CodeGen/AMDGPU/store-v3i64.ll | 16 +- test/CodeGen/AMDGPU/store-vector-ptrs.ll | 2 +- test/CodeGen/AMDGPU/store_typed.ll | 4 +- test/CodeGen/AMDGPU/structurize.ll | 2 +- test/CodeGen/AMDGPU/structurize1.ll | 2 +- test/CodeGen/AMDGPU/sub.i16.ll | 18 +- test/CodeGen/AMDGPU/sub.ll | 20 +-- test/CodeGen/AMDGPU/sub.v2i16.ll | 26 +-- test/CodeGen/AMDGPU/subreg-coalescer-crash.ll | 2 +- test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll | 2 +- test/CodeGen/AMDGPU/subreg-eliminate-dead.ll | 2 +- test/CodeGen/AMDGPU/subreg-intervals.mir | 4 +- test/CodeGen/AMDGPU/target-cpu.ll | 12 +- test/CodeGen/AMDGPU/trap.ll | 6 +- test/CodeGen/AMDGPU/trunc-bitcast-vector.ll | 16 +- test/CodeGen/AMDGPU/trunc-cmp-constant.ll | 26 +-- test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll | 12 +- test/CodeGen/AMDGPU/trunc-store-i1.ll | 8 +- test/CodeGen/AMDGPU/trunc-store.ll | 4 +- .../AMDGPU/trunc-vector-store-assertion-failure.ll | 2 +- test/CodeGen/AMDGPU/trunc.ll | 18 +- test/CodeGen/AMDGPU/tti-unroll-prefs.ll | 2 +- test/CodeGen/AMDGPU/uaddo.ll | 14 +- test/CodeGen/AMDGPU/udiv.ll | 28 +-- test/CodeGen/AMDGPU/udivrem.ll | 6 +- test/CodeGen/AMDGPU/udivrem24.ll | 34 ++-- test/CodeGen/AMDGPU/udivrem64.ll | 12 +- test/CodeGen/AMDGPU/uint_to_fp.f64.ll | 18 +- test/CodeGen/AMDGPU/uint_to_fp.i64.ll | 16 +- test/CodeGen/AMDGPU/uint_to_fp.ll | 18 +- test/CodeGen/AMDGPU/uitofp.f16.ll | 8 +- test/CodeGen/AMDGPU/umed3.ll | 64 +++---- test/CodeGen/AMDGPU/unaligned-load-store.ll | 62 +++---- test/CodeGen/AMDGPU/undefined-subreg-liverange.ll | 4 +- .../AMDGPU/unhandled-loop-condition-assertion.ll | 6 +- test/CodeGen/AMDGPU/uniform-cfg.ll | 40 ++--- test/CodeGen/AMDGPU/uniform-crash.ll | 4 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 2 +- test/CodeGen/AMDGPU/unknown-processor.ll | 2 +- test/CodeGen/AMDGPU/unroll.ll | 2 +- test/CodeGen/AMDGPU/unsupported-cc.ll | 20 +-- test/CodeGen/AMDGPU/urem.ll | 14 +- test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll | 36 ++-- test/CodeGen/AMDGPU/usubo.ll | 14 +- test/CodeGen/AMDGPU/v1i64-kernel-arg.ll | 4 +- test/CodeGen/AMDGPU/v_cndmask.ll | 40 ++--- test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll | 12 +- test/CodeGen/AMDGPU/v_mac.ll | 26 +-- test/CodeGen/AMDGPU/v_mac_f16.ll | 44 ++--- test/CodeGen/AMDGPU/v_madak_f16.ll | 4 +- test/CodeGen/AMDGPU/valu-i1.ll | 8 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 4 +- test/CodeGen/AMDGPU/vector-alloca.ll | 10 +- test/CodeGen/AMDGPU/vector-extract-insert.ll | 8 +- test/CodeGen/AMDGPU/vectorize-global-local.ll | 2 +- test/CodeGen/AMDGPU/vertex-fetch-encoding.ll | 8 +- .../vgpr-spill-emergency-stack-slot-compute.ll | 2 +- test/CodeGen/AMDGPU/vi-removed-intrinsics.ll | 2 +- test/CodeGen/AMDGPU/vop-shrink.ll | 4 +- test/CodeGen/AMDGPU/vselect.ll | 8 +- test/CodeGen/AMDGPU/vselect64.ll | 2 +- test/CodeGen/AMDGPU/vtx-fetch-branch.ll | 2 +- test/CodeGen/AMDGPU/vtx-schedule.ll | 2 +- test/CodeGen/AMDGPU/waitcnt-flat.ll | 2 +- test/CodeGen/AMDGPU/waitcnt.mir | 6 +- .../AMDGPU/write-register-vgpr-into-sgpr.ll | 2 +- test/CodeGen/AMDGPU/write_register.ll | 14 +- test/CodeGen/AMDGPU/wrong-transalu-pos-fix.ll | 2 +- test/CodeGen/AMDGPU/xfail.r600.bitcast.ll | 6 +- test/CodeGen/AMDGPU/xor.ll | 38 ++-- test/CodeGen/AMDGPU/zero_extend.ll | 10 +- test/CodeGen/AMDGPU/zext-i64-bit-operand.ll | 4 +- .../MIR/AMDGPU/expected-target-index-name.mir | 2 +- test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir | 18 +- test/CodeGen/MIR/AMDGPU/intrinsics.mir | 2 +- .../MIR/AMDGPU/invalid-target-index-operand.mir | 2 +- test/CodeGen/MIR/AMDGPU/target-index-operands.mir | 4 +- .../CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll | 2 +- .../IndVarSimplify/AMDGPU/no-widen-to-i64.ll | 6 +- test/Transforms/InferAddressSpaces/AMDGPU/basic.ll | 16 +- .../AMDGPU/infer-address-space.ll | 10 +- .../InferAddressSpaces/AMDGPU/mem-intrinsics.ll | 28 +-- .../AMDGPU/old-pass-regressions.ll | 10 +- .../Transforms/InferAddressSpaces/AMDGPU/select.ll | 42 ++--- .../InferAddressSpaces/AMDGPU/volatile.ll | 18 +- .../LoadStoreVectorizer/AMDGPU/aa-metadata.ll | 2 +- .../AMDGPU/adjust-alloca-alignment.ll | 14 +- .../LoadStoreVectorizer/AMDGPU/extended-index.ll | 10 +- .../LoadStoreVectorizer/AMDGPU/insertion-point.ll | 4 +- .../AMDGPU/interleaved-mayalias-store.ll | 2 +- .../AMDGPU/merge-stores-private.ll | 24 +-- .../LoadStoreVectorizer/AMDGPU/merge-stores.ll | 80 ++++----- .../LoadStoreVectorizer/AMDGPU/merge-vectors.ll | 10 +- .../AMDGPU/missing-alignment.ll | 4 +- .../LoadStoreVectorizer/AMDGPU/multiple_tails.ll | 4 +- .../AMDGPU/no-implicit-float.ll | 2 +- .../LoadStoreVectorizer/AMDGPU/optnone.ll | 4 +- .../LoadStoreVectorizer/AMDGPU/pointer-elements.ll | 38 ++-- .../AMDGPU/store_with_aliasing_load.ll | 2 +- .../AMDGPU/weird-type-accesses.ll | 32 ++-- .../LoopStrengthReduce/AMDGPU/atomics.ll | 4 +- .../different-addrspace-addressing-mode-loops.ll | 8 +- .../AMDGPU/different-addrspace-crash.ll | 2 +- .../AMDGPU/lsr-postinc-pos-addrspace.ll | 8 +- .../AMDGPU/preserve-addrspace-assert.ll | 2 +- .../Transforms/LoopUnroll/AMDGPU/unroll-barrier.ll | 2 +- .../LoopUnroll/AMDGPU/unroll-for-private.ll | 8 +- .../LoopUnswitch/AMDGPU/divergent-unswitch.ll | 8 +- .../AMDGPU/unroll-in-loop-vectorizer.ll | 2 +- test/Transforms/SLPVectorizer/AMDGPU/simplebb.ll | 6 +- ...split-gep-and-gvn-addrspace-addressing-modes.ll | 6 +- .../AMDGPU/reassociate-geps-and-slsr-addrspace.ll | 8 +- 714 files changed, 6249 insertions(+), 6249 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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