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unknown user pushed a change to branch master
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from f58f293 [ARM] Fix insert point for store rescheduling.
new 2880f2d Improve mulhi overflow test. NFC
new b424c9d [GlobalISel] Add a way for targets to enable GISel.
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Summary of changes:
include/llvm/CodeGen/TargetPassConfig.h | 4 ++
lib/CodeGen/LLVMTargetMachine.cpp | 10 +++--
lib/CodeGen/TargetPassConfig.cpp | 5 +++
lib/Target/AArch64/AArch64TargetMachine.cpp | 11 +++++
.../AArch64/GlobalISel/gisel-commandline-option.ll | 48 ++++++++++++++++++++++
test/CodeGen/X86/overflow.ll | 39 +++++++++++-------
6 files changed, 99 insertions(+), 18 deletions(-)
create mode 100644 test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
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unknown user pushed a change to branch master
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from fa41497 2017-03-01 Bill Schmidt <wschmidt(a)linux.vnet.ibm.com>
new 7b2c89e PR middle-end/79692 - [7 Regression] -Wformat-overflow false [...]
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Summary of changes:
gcc/ChangeLog | 11 ++
gcc/gimple-ssa-sprintf.c | 164 +++++++++++++----
gcc/testsuite/ChangeLog | 8 +
gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-3.c | 77 ++++++++
gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-2.c | 14 +-
.../gcc.dg/tree-ssa/builtin-sprintf-warn-10.c | 8 +-
.../gcc.dg/tree-ssa/builtin-sprintf-warn-15.c | 197 +++++++++++++++++++++
7 files changed, 441 insertions(+), 38 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/builtin-snprintf-3.c
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-warn-15.c
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unknown user pushed a change to branch master
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from 57bc519 Add polly to svn:ignore.
new f58f293 [ARM] Fix insert point for store rescheduling.
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Summary of changes:
lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 30 ++++++++++++++++++------------
test/CodeGen/ARM/prera-ldst-insertpt.mir | 32 +++++++++++++++++++-------------
2 files changed, 37 insertions(+), 25 deletions(-)
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from fc70228 [ARM] Check correct instructions for load/store rescheduling.
new 57bc519 Add polly to svn:ignore.
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unknown user pushed a change to branch master
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from c57fb58 Generate the test configuration even when LIBCXX_INCLUDE_TESTS=OFF.
new d3acadc Fix Apple-specific XFAIL directive in libc++ test
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.../utilities/variant/variant.variant/variant.assign/copy.pass.cpp | 2 +-
.../utilities/variant/variant.variant/variant.assign/move.pass.cpp | 2 +-
.../std/utilities/variant/variant.variant/variant.status/index.pass.cpp | 2 +-
.../variant.variant/variant.status/valueless_by_exception.pass.cpp | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
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unknown user pushed a change to branch master
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from ea71f2c Restrict usage of MemoryMappingLayout to platforms which support it
new f8ff7e5 Increase stack size for stack-use-after-return test
new 6e1f230 Use pthreads for thread-local lsan allocator cache on darwin
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lib/lsan/lsan_allocator.cc | 51 ++++------------------
lib/lsan/lsan_allocator.h | 37 ++++++++++++++++
lib/lsan/lsan_common_linux.cc | 4 ++
lib/lsan/lsan_common_mac.cc | 8 +++-
.../asan/TestCases/Posix/stack-use-after-return.cc | 2 +-
5 files changed, 57 insertions(+), 45 deletions(-)
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unknown user pushed a change to branch master
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from 85f2c6d ELF: Add ThinLTO caching support.
new fdfbb6d Add missing test dependency.
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test/CMakeLists.txt | 2 +-
test/ELF/lto/cache.ll | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
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from 506a337 Split GdbIndexBuilder class into non-member functions.
new 85f2c6d ELF: Add ThinLTO caching support.
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ELF/Config.h | 1 +
ELF/Driver.cpp | 1 +
ELF/LTO.cpp | 29 +++++++++++++++++++++++-----
ELF/LTO.h | 1 +
ELF/Options.td | 2 ++
test/ELF/lto/Inputs/{thinlto.ll => cache.ll} | 7 +++++--
test/ELF/lto/cache.ll | 15 ++++++++++++++
7 files changed, 49 insertions(+), 7 deletions(-)
copy test/ELF/lto/Inputs/{thinlto.ll => cache.ll} (54%)
create mode 100644 test/ELF/lto/cache.ll
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from f48bcf7 * es.po: Update.
new fa41497 2017-03-01 Bill Schmidt <wschmidt(a)linux.vnet.ibm.com>
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gcc/ChangeLog | 4 ++++
gcc/doc/invoke.texi | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
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from 386f137 [Constant Hoisting] Avoid inserting instructions before EH pads
new 7685de2 [DAGCombiner] fold binops with constant into select-of-constants
new fc70228 [ARM] Check correct instructions for load/store rescheduling.
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lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 112 +++++
lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 +-
test/CodeGen/ARM/prera-ldst-insertpt.mir | 99 ++++
test/CodeGen/ARM/select_xform.ll | 12 +-
test/CodeGen/ARM/vldm-liveness.ll | 19 +-
test/CodeGen/ARM/vldm-liveness.mir | 40 ++
test/CodeGen/PowerPC/select_const.ll | 507 +++++++++------------
test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 18 +-
test/CodeGen/X86/avx512-insert-extract.ll | 14 +-
test/CodeGen/X86/select_const.ll | 12 +-
test/CodeGen/X86/setcc.ll | 6 +-
11 files changed, 489 insertions(+), 352 deletions(-)
create mode 100644 test/CodeGen/ARM/prera-ldst-insertpt.mir
create mode 100644 test/CodeGen/ARM/vldm-liveness.mir
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